CN111446336A

CN111446336A - Light emitting diode

Info

Publication number: CN111446336A
Application number: CN202010252278.3A
Authority: CN
Inventors: 刘小亮; 陈剑斌; 黄敏; 江宾; 朱秀山; 何安和; 彭康伟; 林素慧
Original assignee: Xiamen Sanan Optoelectronics Technology Co Ltd
Current assignee: Xiamen Sanan Optoelectronics Technology Co Ltd
Priority date: 2020-04-01
Filing date: 2020-04-01
Publication date: 2020-07-24
Anticipated expiration: 2040-04-01
Also published as: CN116154063A; CN111446336B

Abstract

The invention discloses a light emitting diode, comprising: a light emitting epitaxial structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially stacked; a current spreading layer formed on a surface of the second conductive type semiconductor layer and provided with a plurality of first opening portions in which a part of the second conductive type semiconductor layer is exposed, wherein an area ratio of the light emitting epitaxial structure occupied by the current spreading layer is more than 50% and less than 95%; an insulating layer formed on the current spreading layer and in the first opening of the current spreading layer, and provided with a plurality of second openings in which a part of the current spreading layer is exposed, the second openings being arranged to be offset from the first openings; a reflective layer formed over the insulating layer.

Description

Light emitting diode

Technical Field

The invention relates to the technical field of semiconductors, in particular to a light emitting diode.

Background

A light emitting diode (L ED for short) is a semiconductor device that emits light by using energy released during carrier recombination, and particularly, a flip L ED chip has the advantages of no wire bonding, high light efficiency, good heat dissipation, and the like, and is increasingly widely used.

At present, a flip L ED chip usually uses a transparent conductive layer (such as ITO or other conductive metal oxide) as a P-type ohmic contact layer, and although the chip has a high transmittance after high-temperature fusion, the chip still has a certain loss, which is not beneficial to brightness improvement of the chip, and if the transparent conductive layer is not used as the ohmic contact layer, it is difficult to realize ohmic contact of the P-type semiconductor layer.

Disclosure of Invention

In order to solve the technical problem, the invention provides a light emitting diode which can improve the brightness of a device while ensuring enough ohmic contact with a light emitting epitaxial structure.

The light emitting diode includes: a light emitting epitaxial structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially stacked; a current spreading layer formed on a surface of the second conductive type semiconductor layer and provided with a plurality of first opening portions in which a part of the second conductive type semiconductor layer is exposed, wherein an area ratio of the light emitting epitaxial structure occupied by the current spreading layer is more than 50% and less than 95%; an insulating layer formed on the current spreading layer and in the first opening of the current spreading layer, and provided with a plurality of second openings in which a part of the current spreading layer is exposed, the second openings being arranged to be offset from the first openings; a reflective layer formed over the insulating layer.

In some embodiments, a plurality of first openings adjacent to the same second opening form a regular polygon.

Preferably, the diameter of the first opening is 2 to 50 μm. In some embodiments, the light emitting is twoThe polar tube is a tiny L ED chip, for example, the cross-sectional area of L ED chip can be 62500 μm²The diameter of the first opening can be 2-10 μm, and in some embodiments, the two luminescent tubes are L ED chips with medium and large sizes, for example, the cross-sectional area of the L ED chip can be 90000 μm²As described above, the diameter of the first opening may be 2 to 5 μm, or 5 to 10 μm, or 10 to 20 μm, or 20 μm or more, preferably, the diameter of the first opening portion is preferably 1 to 20 μm, and VF (voltage) and L OP (brightness) can be preferably compatible.

Preferably, the pitch between the adjacent first opening portions is 1 to 20 μm.

Preferably, the area ratio of the light emitting epitaxial structure occupied by the plurality of first opening portions is 5% to 50%.

Preferably, three adjacent second opening portions form an isosceles triangle.

Preferably, the area ratio of the light emitting epitaxial structure occupied by the plurality of second opening portions is 3% to 50%.

Preferably, the ratio of the number of the first opening portions to the second opening portions is between 2: 1-20: 1.

preferably, the plurality of second openings are arranged at equal intervals.

Preferably, the plurality of first opening portions have at least two different pitches therebetween.

Preferably, the insulating layer is further provided with a plurality of third openings in which a part of the second conductive type semiconductor layer is exposed.

In some embodiments, the insulating layer is silicon nitride, silicon oxide, or aluminum oxide.

In some embodiments: the insulating layer is a bragg reflection layer, and in an example, the insulating layer may be formed by alternately stacking high-refractive-index and low-refractive-index light-transmitting materials.

Preferably, the insulating layer covers sidewalls of the light emitting epitaxial structure.

In some embodiments, the reflective layer comprises a metal layer comprising a metal reflective layer and a metal barrier layer.

The third opening structure is formed on the insulating layer, so that the reflecting layer is in direct contact with the light-emitting epitaxial structure, the problem of poor adhesion of the reflecting layer (such as a metal reflecting layer) and the insulating layer is solved, and the reliability of the L ED device is enhanced.

Preferably, the ratio of the number of the second opening portions to the number of the third opening portions is between 5: 1-50: 1.

preferably, the first opening and the second opening are arranged in an array, and the third opening is annular or strip-shaped.

In some embodiments, at least one side of the light emitting epitaxial structure is 300 μm or more.

Furthermore, the light emitting diode also comprises a local defect area which is positioned on part of the second conduction type semiconductor layer and extends downwards to the first conduction type semiconductor layer to form a mesa structure, and the mesa structure is exposed out of the side wall of the light emitting epitaxial structure.

In some embodiments, the reflective layer is an insulating reflective layer covering a sidewall of the light emitting epitaxial structure, having a first via and a second via. Preferably, the light emitting diode further comprises a first electrode and a second electrode, wherein the first electrode is electrically connected to the first conductive type semiconductor layer through the first via hole, and the first electrode crosses over a part of the surface of the insulating reflective layer; the second electrode is electrically connected to the second conductive type semiconductor layer through the second via structure, and the second electrode crosses over a part of the surface of the insulating reflective layer.

In some embodiments, at least one side of the light emitting epitaxial structure is 300 μm or less.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

The features and advantages of the present invention will be more clearly understood by reference to the accompanying drawings, which are illustrative and not to be construed as limiting the invention in any way.

Fig. 1 is a schematic structural diagram of a light emitting diode according to an embodiment.

FIG. 2 is a schematic plan view showing the distribution of the current spreading layer and the insulating layer.

Fig. 3 is a schematic structural diagram of a light emitting diode according to a second embodiment.

Fig. 4 to 13 are schematic structural diagrams of steps of a method for manufacturing a light emitting diode according to a second embodiment, where fig. 5 is a sectional view of fig. 4 (L ED chip unit top view) along a-a direction, fig. 7 is a sectional view of fig. 6 (L ED chip unit top view) along a-a direction, fig. 9 is a sectional view of fig. 8 (L ED chip unit top view) along a-a direction, fig. 11 is a sectional view of fig. 10 (L ED chip unit top view) along a-a direction, fig. 12 is a schematic structural diagram after an insulating protection layer is formed on the structure shown in fig. 11, and fig. 13 is a schematic structural diagram after a first electrode layer is manufactured on the structure shown in fig. 12.

Fig. 14 is a schematic plan view showing the patterns of the current spreading layer and the insulating layer according to the third embodiment.

Fig. 15 is a schematic plan view, which is a partially enlarged view of the schematic view shown in fig. 14.

Fig. 16 to 17 are schematic partial structures of the light emitting diode according to the fourth embodiment.

Fig. 18 is a side sectional view showing a schematic structure of a light emitting diode according to a fifth embodiment.

Fig. 19 is a side sectional view showing a structural schematic diagram of a light emitting diode according to a sixth embodiment.

Fig. 20 is a schematic plan view showing a current spreading layer pattern of the light emitting diode shown in example 6.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention.

Example one

The present embodiment discloses an L ED chip, which comprises a transparent substrate 110, a light emitting epitaxial structure, a current spreading layer 130, an insulating layer 141, a metal reflective layer 151, a first electrode 171 and a second electrode 172, as shown in the cross-sectional view of FIG. 1.

The transparent substrate 110 may be a growth substrate for growing a light emitting epitaxial stack, or may be a transparent substrate combined with the light emitting epitaxial stack through a transparent adhesive layer, and specifically includes a planar sapphire substrate, a patterned sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, and the like.

The light emitting epitaxial structure is located on the transparent substrate 110, and includes a first conductive type semiconductor layer 121, an active layer 122, and a second conductive type semiconductor layer 123, which are sequentially stacked. For example, the first conductive type semiconductor layer 121 may be an N-type GaN layer, the active layer 122 may be a GaN-based quantum well layer, and the second conductive type semiconductor layer 123 may be a P-type GaN layer. Of course, other types of epitaxial structures may be selected according to actual requirements, and are not limited to the examples listed herein.

The local defect 1211 is located on a portion of the second conductive type semiconductor layer 122, and extends down to the first conductive type semiconductor layer 121 to form a mesa structure, where the mesa structure exposes sidewalls of the epitaxial structure, specifically, the mesa structure exposes a mesa of the first conductive type semiconductor layer 121 and sidewalls of the first conductive type semiconductor layer 121, the active layer 122, and the second conductive type semiconductor layer 123.

The current spreading layer 130 may be a metal oxide having light transmittance with respect to light emitted from the active layer, such as indium tin oxide, zinc indium tin oxide, indium zinc oxide, zinc tin oxide, gallium indium tin oxide, indium gallium oxide, aluminum-doped zinc oxide, fluorine-doped tin oxide, and the like, and in the structure, preferably, a transparent conductive layer on the surface of the light emitting epitaxial layer is "retracted" so that a subsequent insulating reflective layer may cover the sidewall of the current spreading layer, the current spreading layer 130 may be a metal conductive oxide having good current spreading characteristics and may form good ohmic contact with the semiconductor layer, but the metal conductive oxide has a certain light absorption for wavelengths below 520nm, and the light absorption is more severe as the wavelength decreases, for example, ITO, for light rays in a wavelength band of 400 to 460nm, the light absorption may reach about 3 to 15%, the light rays in a wavelength band below 400nm, the light absorption is more severe for light rays in a wavelength band of about 7 to 15%, the light rays in a wavelength band below 400nm, the light emission current spreading layer 130 may occupy a plurality of first opening portions exposed from the second conductive semiconductor layer 122, and the current spreading layer 130 may preferably, the current spreading layer may be controlled such that the current spreading is greater than 20 μm, and the current spreading is more preferably, such that the light emission current spreading is equal to 20 μm spreading is equal to 10 μm, and equal to 20 μm, and equal to equal.

The insulating layer 141 is formed on the current spreading layer 130 and in the first opening 161 of the current spreading layer, and wraps the side wall of the current spreading layer 130 and wraps the side wall of the light emitting epitaxial structure, further, the insulating layer 141 is provided with a plurality of second opening 162 where a part of the current spreading layer 130 is exposed, the second opening 162 is arranged to be staggered with the first opening 161 as a reserved window of a second electrode, as shown in fig. 2, the sum of the cross-sectional areas of the second openings 162 accounts for 3% to 50%, preferably 5% to 20%, more preferably 10% of the ratio of the cross-sectional area of the light emitting epitaxial structure (L ED chip unit), if the ratio is too low, the area of the metal reflective layer 151 in contact with the current spreading layer 140 through the second opening 162 is too small to control voltage, and if the ratio is too high, the reflective effect of the current spreading layer, the insulating layer (e.g., low refractive index) and the metal reflective layer structure is affected, the insulating layer 141 employs silicon oxide, silicon nitride or aluminum oxide.

Preferably, the first opening 161 and the second opening 162 constitute an array. In a specific embodiment, in the array of the first opening portions 161 and the second opening portions 162, the diameters of the first opening portions 161 and the second opening portions 162 are the same, and the number ratio of the first opening portions 161 to the second opening portions is preferably 2: 1-20: 1, for example, may be 2: 1 or 3:1, or 5: 1. further, six first opening portions 161 adjacent to the same second opening portion 162 constitute a hexagon D1, the second opening portion 162 is located at the center of the hexagon, and the three nearest second opening portions constitute an isosceles triangle, as shown in fig. 2.

The metal reflective layer 151 is formed on the surface of the insulating layer 141, and contacts the current spreading layer 130 through the second opening 162. For example, when the metal reflective layer is made of Al or Ag high reflective metal as the reflector (mirror), it is preferable to further coat a metal protection layer 152, which may be made of TiW, Cr, Pt, Ti, etc., on the surface of the metal reflective layer, and the metal protection layer 152 can completely coat the metal mirror layer to protect the metal reflective layer 151.

Further, an insulating layer 142 covers the metal passivation layer 152, the insulating layer 142 completely covers the metal passivation layer 152, and the material of the insulating layer 142 may be the same as or different from that of the insulating layer 141. The

insulating layers

141 and 142 form a first via hole 181 in the local defect region 1211 and a first via hole 182 over the second conductive type semiconductor layer. As an example, the area of the second through hole is larger than or equal to the area of the first through hole in a top view, and the number of the first through hole structures is equivalent to that of the second through hole structures. The shape of second through-hole can be different with the shape of first through-hole, for example the second through-hole is circular area extension strip, and first through-hole is circular, and is that when the area of second through-hole is greater than when the area of first through-hole, can make things convenient for directly perceivedly to distinguish the positive, negative electrical property of second, first electrode, generally speaking, the quantity of first through-hole structure is equivalent with the quantity of local defect district, and the area of local defect district is greater than the area of first through-hole to do benefit to the insulating layer parcel luminous epitaxial structure lateral wall.

The first electrode 171 is electrically connected to the first conductive type semiconductor layer 121 through the first via hole 181, and crosses over a portion of the surface of the insulating layer 142. Specifically, the first electrode 171 is formed in the first via hole 181 and straddles over a part of the surface of the insulating layer 142. The second electrode 172 is electrically connected to the second conductive type semiconductor layer 23 through the second via structure 182, and spans a portion of the surface of the insulating layer 142. For example, the first electrode and the second electrode preferably have areas equivalent to each other, and the first electrode and the second electrode may have a symmetrical relationship, may be axisymmetric, may be rotationally symmetric, or the like. Furthermore, the area of the first electrode crossing over the partial surface of the insulating layer accounts for more than 90% of the area of the first electrode, and the area of the second electrode crossing over the partial surface of the insulating layer accounts for more than 90% of the area of the second electrode, so that the whole flatness of the top surfaces of the first electrode and the second electrode is facilitated, the die bonding welding of the flip-chip light emitting diode chip is facilitated, the packaging thrust level is improved, and the reliability is enhanced. Further, from a top view, it is preferable that the area of the first electrode is larger than the area of the local defect region. Furthermore, the area of the first electrode on the surface of the light-emitting epitaxial structure/the current spreading surface is larger than that of the first electrode on the local defect area, so that the reduction of the light-emitting area caused by the local defect area is reduced as much as possible, the flatness of the top surface of the first electrode can be considered, and the height difference of the first electrode is reduced.

Example 2

As shown in fig. 3, the difference from embodiment 1 is that the present embodiment is an L ED chip with a middle and large size, which has a plurality of local defect regions 1211, the size of the first opening is preferably 2 to 50 μm, more preferably 2 to 20 μm, and may be, for example, 2 μm or 5 or 10 μm, further, the electrode structure of the present embodiment is different from that of the present embodiment in that a conductive metal layer 173 is formed on an insulating layer 142, which is in contact with a first conductive semiconductor layer through the local defect regions 1211, a third insulating layer 143 is formed on the conductive metal layer 173, and a first via 181 and a second via 182 are reserved, wherein the first via exposes a part of the surface of the conductive metal layer 173, the second via penetrates through the third insulating layer 143, the conductive metal layer 173 and the insulating layer 142, exposes a part of the surface of the metal protection layer 152, the third insulating layer 143 covers the sidewall of the conductive metal layer 173, and the first electrode 171 and the second electrode 172 are formed on the third insulating layer 143, wherein the first electrode 171 contacts the conductive metal layer 173 through the first via 181 and the second via 182 are electrically connected to the reflective metal layer 173.

The following describes the method for manufacturing the light emitting diode shown in fig. 3 in detail with reference to fig. 4 to 13.

First, an optical epitaxial structure is provided, which includes a first conductive type semiconductor layer 121, an active layer 1122, and a second conductive type semiconductor layer 123 stacked in this order. As an example, an epitaxial structure is formed on the substrate 110 by using an MOCVD process, and the epitaxial structure may include a buffer layer (not shown), a first conductive type semiconductor layer 121, an active layer 122, a second conductive type semiconductor layer 123, and the like, wherein the first conductive type semiconductor layer 121 may be an N-type GaN layer, the active layer 122 may be a GaN-based multiple quantum well layer, and the second conductive type semiconductor layer 123 may be a P-type GaN layer. Of course, other types of epitaxial structures may be selected according to actual requirements, and are not limited to the examples listed herein.

As shown in fig. 4 and 5, a plurality of local defect regions 1211 are etched from top to bottom in the epitaxial structure to form a mesa structure, where the mesa structure exposes sidewalls of the epitaxial structure, and specifically, the mesa structure exposes a mesa of the first conductive type semiconductor layer and sidewalls of the first conductive type semiconductor layer 121, the active layer 122, and the second conductive type semiconductor layer 123. for example, an ICP etching or RIE etching process may be used to etch a mesa structure in the epitaxial structure, so that the mesa structure exposes a mesa of the first conductive type semiconductor layer 121 and sidewalls of the first conductive type semiconductor layer 121, the active layer 122, and the second conductive type semiconductor layer 123, the mesa of the first conductive type semiconductor layer is used for electrical connection with a subsequent first electrode.

As shown in fig. 6 and 7, a patterned current spreading layer 130 is formed on a portion of the surface of the light emitting epitaxial structure. For example, the current spreading layer 130 may be an ITO transparent conductive layer formed by an evaporation process, or may be made of other materials, and is fused to form an ohmic contact with the second conductive type semiconductor layer of the light emitting epitaxial structure. Further, the method further comprises the step of etching a part of the current spreading layer through yellow light and an etching process to form a plurality of first opening portions 161 and expose a part of the surface of the second type semiconductor layer 123, so that the area proportion occupied by the current spreading layer of the light-emitting epitaxial structure is 50-95%. Preferably, the first opening portions 161 are distributed in an array, the diameter is 2 to 50 μm, and the distance between adjacent first opening portions 161 is 1 to 20 μm. In this embodiment, the diameter of the first opening is selected to be 2 to 20 μm, and the pitch is selected to be 5 to 20 μm.

As shown in fig. 8 and 9, an insulating layer 141 is formed on the above structure, and fills the first opening 161, and covers the sidewalls of the current spreading layer 130 and the sidewalls of the adjacent light emitting epitaxial structures. Further, etching a portion of the insulating layer 141 by photolithography and etching processes is further included to form a series of second opening portions 162. For example, a chemical vapor deposition process may be used to form the insulating layer 141 on a portion of the surface of the epitaxial structure, where the insulating layer 141 may be a low refractive index material, such as a silicon dioxide layer, magnesium fluoride, etc., or a high refractive index material, such as titanium dioxide, etc., or the insulating layer may be a Distributed Bragg Reflector (DBR) layer including high and low refractive index materials, and is not limited to the examples listed here. If the insulating layer 141 is made of SiO₂The low-refractive index material can enhance the emergence of light by virtue of the refractive index difference between the low-refractive index material insulating layer and the transparent conducting layer. For example, the second openings 162 are array-type, and have a size of 1 to 50 μm, preferably 1 to 20 μm. The sum of the cross-sectional areas of the second openings 162 accounts for 3-50%, preferably 5-20%, and more preferably 10% of the cross-sectional area ratio of the light-emitting epitaxial structure.

As shown in fig. 10 and 11, a metal reflective layer 151 is formed on the surface of the insulating layer 141. The metal reflective layer 151 is in contact with the current spreading layer 130 through the second opening 162. Further, a metal protective layer 152 is coated on the metal reflective layer 151. As an example, when the metal reflective layer 151 is made of Al or Ag highly reflective metal, and is used as a mirror (mirror), the metal protective layer 152 may be made of TiW, Cr, Pt, Ti, or the like.

As shown in fig. 12, a second insulating layer 142 is formed on the metal passivation layer 152. As an example, the second insulating layer 142 may be formed by a chemical vapor deposition process, and the insulating layer 142 may be a low refractive index material, such as a silicon dioxide layer, magnesium fluoride, or the like, or a high refractive index material, such as titanium dioxide, or the like, or may be a distributed bragg reflector layer, and is not limited to the examples listed herein.

As shown in fig. 13, a conductive metal layer 173 (i.e., PAD 1 layer) is formed on the second insulating layer 142, and the conductive metal layer 173 electrically contacts the first conductive type semiconductor layer 121 through the local defect area 1211.

Further, a third insulating layer 143 is formed on the conductive metal layer 172, and a first via 181 and a second via 182 are reserved, wherein the first via exposes a portion of the surface of the conductive metal layer 173, the second via penetrates through the third insulating layer 143, the conductive metal layer 173 and the second insulating layer 142, exposes a portion of the surface of the metal protection layer 152, and the third insulating layer 143 covers a sidewall of the conductive metal layer 173. Finally, a first electrode 171 and a second electrode 172 are formed on the third insulating layer 143, wherein the first electrode 171 contacts the conductive metal layer 173 through the first via 181, and the second electrode 172 is electrically connected to the metal reflective layer through the second via 182, as shown in fig. 3.

Example 3

As shown in fig. 14 and 15, the difference from embodiment 2 is that the distribution pattern of the first opening portions 161 and the second opening portions 162 of the present embodiment is different from embodiment 2. In the present embodiment, 8 first opening portions 161 adjacent to the same second opening portion 162 are combined into one square or rectangle, and the second opening portion is located at the geometric center of the pattern. In the present embodiment, the ratio of the number of the first opening portions 161 to the second opening portions 162 is about 3: 1.

example 4

As shown in fig. 16, the insulating layer 141 of this embodiment is different from embodiment 2 in that it further has a third opening portion 163 where a part of the second conductive type semiconductor layer 123 is exposed. The third opening 163 is preferably ring-shaped or band-shaped, has a size of 1 to 50 μm, preferably 1 to 20 μm, and has a similar shape to the number of local defect regions. The ratio of the number of the second openings 162 to the number of the third openings 163 is between 5: 1-50: 1, preferably the ratio of the number of first via structures to the number of second via structures is between 10: 1-30: 1.

as shown in fig. 17, the metal reflective layer 151 is formed on the surface of the insulating layer 141, wherein a portion of the metal reflective layer is in contact with the current spreading layer 130 through the second opening 162, and another portion of the metal reflective layer is in contact with the light emitting epitaxial structure through the third opening 163, so that the problem of poor adhesion between the metal reflective layer 151 and the insulating layer 141 is solved, and the reliability of the L ED device is enhanced.

Example 5

This embodiment discloses a flip L ED chip, which includes a transparent substrate 110, a light emitting epitaxial structure, a current spreading layer 130, an insulating layer 141, a metal reflective layer 151, an insulating reflective layer 150, a first electrode 171 and a second electrode 172 stacked as shown in a schematic cross-sectional view in FIG. 18, wherein the current spreading layer 130 and the insulating layer 141 form a first opening 161 and a second opening 162 with reference to embodiment 1.

Unlike embodiment 1, the reflective layer of the present embodiment includes a metal reflective layer 151 and an insulating reflective layer 153. The insulating reflective layer 153 covers the sidewalls of the light-emitting epitaxial structure, and when the light emitted from the active layer 122 reaches the surface of the insulating reflective layer 153 through the current spreading layer 130, most of the light is reflected by the insulating reflective layer 153 and returns to the light-emitting epitaxial stack, and most of the light exits through the transparent substrate 110, so that light loss caused by light exiting from the surface and sidewalls of the light-emitting epitaxial stack is reduced. Preferably, the insulating reflective layer 153 is capable of reflecting the intensity of light of a proportion of at least 80% or further at least 90% of the light radiated by the light emitting layer reaching the surface thereof. The insulating reflective layer 153 may specifically include a bragg reflector. The bragg reflector may be formed in a manner that at least two kinds of insulating media having different refractive indexes are repeatedly stacked, and may be formed in 4 to 20 pairs, for example, the insulating reflective layer 150 may include TiO₂、SiO₂、HfO₂、ZrO₂、Nb₂O₅、MgF₂And the like. In some embodiments, the insulating layer 230 may be deposited with TiO alternately₂layer/SiO₂And (3) a layer.

In the case where the insulating reflective layer 153 includes a bragg reflector, the insulating reflective layer further includes a primer layer or an interface layer that improves the film quality of the distributed bragg reflector. For example, the insulating reflective layer comprises SiO with a thickness of about 0.2 to 1.0 μm₂Forming an interfacial layer, and then stacking a layer of TiO on the interfacial layer at a specific period₂/SiO₂。

The insulating reflective layer 153 has at least one first through hole 181 and one second through hole 182, and the first electrode 171 and the second electrode 172 are formed on the surface of the insulating reflective layer 153. The first electrode 171 is electrically connected to the first conductive type semiconductor layer 121 through the first via hole 181, and the second electrode 172 is in contact with the metal reflective layer 151 through the second via hole 182, and is electrically connected to the second conductive type semiconductor layer 123 through the second opening 162 and the current spreading layer 130.

In this embodiment, the light transmissive insulating layer 141 and the metal reflective layer 151 are formed above the patterned current spreading layer 130 to form an omnidirectional reflective layer, which has a better reflective effect than a conventional metal reflective layer or a distributed bragg reflector structure, thereby enhancing the light extraction probability outside the led chip and improving the brightness of L ED devices, the array-type openings are formed on the current spreading layer 130, so that the area ratio of the light emitting epitaxial structure occupied by the current spreading layer is greater than 50% and less than 95%, while ensuring that the current spreading layer 130 has sufficient ohmic contact with the second conductive type semiconductor layer 122, the area of the current spreading layer 130 is reduced, thereby improving the brightness of the led, the insulating reflective layer is covered above the metal reflective layer and the sidewall of the light emitting epitaxial structure, on one hand, the insulating reflective layer can ensure that the light emitting epitaxial layer is more stably covered on the sidewall of the light emitting epitaxial stack, thereby preventing water vapor from entering the periphery of the light emitting epitaxial stack, reducing the risk of leakage, on the other hand, the insulating reflective layer and the metal reflective layer can achieve full coverage of the surface of the light emitting epitaxial stack, and most of light emitted from the light emitting epitaxial stack can pass through the omnidirectional reflective layer and the transparent epitaxial substrate, thereby reducing most of light emitted from the light emitting epitaxial stack.

Example 6

This embodiment discloses a flip L ED chip, which comprises a transparent substrate 110, a light emitting epitaxial structure, a current spreading layer 130, an insulating reflective layer 150, a first electrode 171 and a second electrode 172, the current spreading layer 130 has a first opening 161 distributed in an array to expose a second opening 172, as shown in the schematic cross-sectional view of FIG. 19The surface of the conductive semiconductor layer 123, the openings are preferably uniformly distributed, the area ratio of the light emitting epitaxial structure occupied by the first opening is preferably 10% to 40%, the diameter of the first opening is 0.1 to 50 μm, in some embodiments, the light emitting diode is a small-sized L ED chip, for example, the cross-sectional area of the L ED chip may be 62500 μm²The diameter of the first opening can be 2-10 μm, and in some embodiments, the two luminescent tubes are L ED chips with medium and large sizes, for example, the cross-sectional area of the L ED chip can be 90000 μm²The diameter of the first opening is preferably 2 to 20 μm, which can better balance VF (voltage) and L OP (brightness), and the distance between adjacent first opening portions 161 is 1 to 20 μm in this embodiment, the diameter of the first opening is preferably 2 to 10 μm, which is 5 to 20 μm.

Specifically, an extension electrode 175 is formed on a part of the surface of the current spreading layer 130, and at least a part of the extension electrode 175 contacts the second conductive type semiconductor layer 123 through the first opening 161, and the contact resistance between the extension electrode 175 and the second conductive type semiconductor layer is higher than the contact resistance between the extension electrode 175 and the current spreading layer 130, so that it is ensured that a current flowing into the extension electrode preferably spreads through the current spreading layer 130 and then enters the second conductive type semiconductor layer 123, thereby reducing a forward voltage and improving light emission efficiency.

The foregoing embodiments are merely illustrative of the principles of this invention and its efficacy, rather than limiting it, and various modifications and variations can be made by those skilled in the art without departing from the spirit and scope of the invention, which is defined in the appended claims.

Claims

1. A light emitting diode, comprising:

a light emitting epitaxial structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially stacked;

a current spreading layer formed on a surface of the second conductive type semiconductor layer and provided with a plurality of first opening portions in which a part of the second conductive type semiconductor layer is exposed, wherein an area ratio of the light emitting epitaxial structure occupied by the current spreading layer is more than 50% and less than 95%;

an insulating layer formed on the current spreading layer and in the first opening of the current spreading layer, and provided with at least one second opening through which a part of the current spreading layer is exposed, the second opening being arranged to be offset from the first opening;

a reflective layer formed over the insulating layer.

2. The led of claim 1, wherein: and a plurality of first openings adjacent to the same second opening form a regular polygon.

3. The led of claim 1, wherein: the diameter of the first opening is 2 to 50 μm.

4. The led of claim 1, wherein: the distance between the adjacent first openings is 1 to 20 μm.

5. The led of claim 1, wherein: the following steps: the light-emitting epitaxial structure occupies 5-50% of the area occupied by the plurality of first openings.

6. The led of claim 1, wherein: the first opening parts are distributed in an array manner.

7. The led of claim 1, wherein: the area ratio of the light-emitting epitaxial structure occupied by the second opening is 3% -50%.

8. The led of claim 1, wherein: the ratio of the number of the first opening parts to the number of the second opening parts is between 2: 1-20: 1.

9. the led of claim 1, wherein: the insulating layer has a plurality of second opening portions arranged at equal intervals.

10. The led of claim 9, wherein: the first opening portion and the second opening portion constitute an array.

11. The led of claim 1, wherein: the insulating layer is made of silicon nitride, silicon oxide or aluminum oxide.

12. The led of claim 1, wherein: the insulating layer is a Bragg reflection layer.

13. The light-emitting diode according to claim 12 or 13, wherein: the insulating layer covers the side wall of the light-emitting epitaxial structure.

14. The led of claim 1, wherein: the reflective layer includes a metallic reflective layer.

15. The led of claim 14, wherein: the insulating layer is further provided with a plurality of third openings through which a part of the second conductive type semiconductor layer is exposed, and a part of the reflective layer is in contact with the current spreading layer through the plurality of second openings and in contact with the second conductive type semiconductor layer through the plurality of third openings.

16. The led of claim 15, wherein: the ratio of the number of the second openings to the number of the third openings is between 5: 1-50: 1.

17. the led of claim 15, wherein: the first opening and the second opening are in an array form, and the third opening is in an annular or strip form.

18. The led of claim 15, wherein: the reflective layer is arranged on the first insulating layer, and the reflective layer is arranged on the first insulating layer.

19. The led of claim 18, wherein: at least one side of the light-emitting epitaxial structure is more than 300 mu m.

20. The led of claim 14, wherein: the thickness of the insulating layer is larger than that of the light-transmitting conductive layer.

21. The led of claim 1, wherein: the light emitting diode further comprises a local defect area which is positioned on part of the second conduction type semiconductor layer and extends downwards to the first conduction type semiconductor layer to form a mesa structure, and the mesa structure is exposed out of the side wall of the light emitting epitaxial structure.

22. The led of claim 21, wherein: the reflecting layer is an insulating reflecting layer and covers the side wall of the light-emitting epitaxial structure.

23. The led of claim 22, wherein: the first electrode is connected with the first conductive type semiconductor layer and spans part of the surface of the insulating reflecting layer; the second electrode is electrically connected with the second conductive type semiconductor layer and spans on part of the surface of the insulating reflecting layer.

24. The led of claim 23, wherein: at least one side of the light-emitting epitaxial structure is less than 300 mu m.

25. The led of claim 1, wherein: the thickness of the current spreading layer is 5-60 nm.

26. The led of claim 1, wherein: the active layer has an emission wavelength of 520nm or less.