CN115911216A - Light emitting diode - Google Patents

Abstract

The invention discloses a light emitting diode, comprising: a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; the first mesa is positioned in the edge area of the semiconductor lamination layer and exposes the first surface of the first semiconductor layer; an insulating layer including a portion formed on the first mesa, the insulating layer including a first insulating layer, a fourth insulating layer, and a second insulating layer stacked in this order, the fourth insulating layer being aluminum oxide, the insulating layer including a sixth opening to expose the first surface of the first semiconductor layer; the projection of the sixth opening in the growth direction of the semiconductor lamination is located in the first mesa, the sixth opening comprises a first section and a second section, the first section and the second section are of a continuous structure, the first section extends along a first edge of the light-emitting diode, and the second section extends along a second edge of the light-emitting diode.

Description

Light emitting diode

Technical Field

The invention relates to the technical field of light emitting diode manufacturing, in particular to a light emitting diode.

Background

A Light Emitting Diode (LED) includes different Light Emitting materials and Light Emitting components, and is a solid semiconductor Light Emitting Diode. The LED lamp has the advantages of low cost, low power consumption, high lighting effect, small volume, energy conservation, environmental protection, good photoelectric property and the like, and is widely applied to various scenes such as illumination, visible light communication, luminous display and the like.

Disclosure of Invention

To achieve at least one of the advantages of the present invention or other advantages, an embodiment of the present invention provides a light emitting diode, including: a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; a third insulating layer located over the semiconductor stack; the third insulating layer has a fourth opening and a fifth opening; first pad electrode and second pad electrode, first pad electrode form in the fourth opening with first semiconductor layer electricity is connected, second pad electrode form in the fifth opening with second semiconductor layer electricity is connected, first pad electrode have keep away from the upper edge of semiconductor stromatolite and be close to the lower limb of semiconductor stromatolite, second pad electrode have keep away from the upper edge of semiconductor stromatolite and be close to the lower limb of semiconductor stromatolite, the lower limb of first pad electrode with first maximum horizontal distance has between the fourth opening, the lower limb of second pad electrode with have the second maximum horizontal distance between the fifth opening, first maximum horizontal distance is less than 2 mu m, the second maximum horizontal distance is less than 2 mu m.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description in the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts; in the following description, the drawings are illustrated in a schematic view, and the drawings are not intended to limit the present invention.

Fig. 1 is a cross-sectional view of a light emitting diode 1 according to a first embodiment of the present invention;

fig. 2 to 29 are schematic structural views of steps of a method for manufacturing a light emitting diode 2 according to a second embodiment of the present invention.

FIG. 30 is a top view of a light emitting diode 3 according to a third embodiment of the present invention;

fig. 31 is a partially enlarged view of the led 3 shown in fig. 30;

FIG. 32 is a cross-sectional view of the LED 3 along line I-I' of FIG. 30;

fig. 33 is a partially enlarged view of the led 3 shown in fig. 32;

fig. 34 is a cross-sectional view of a light emitting diode 4 according to a fourth embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments; the technical features designed in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other; all other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it is to be noted that all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs, and are not to be construed as limiting the present invention; it will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

First embodiment

Fig. 1 is a cross-sectional view of a light emitting diode 1 according to a first embodiment of the present invention.

As shown in fig. 1, the light emitting diode 1 includes a substrate 110, and a semiconductor stack 120 formed on the substrate 110, wherein the semiconductor stack 120 includes a first semiconductor layer 121, a second semiconductor layer 123, and an active layer 122 located between the first semiconductor layer 121 and the second semiconductor layer 123.

In one embodiment of the present invention, the substrate 110 may be formed using a carrier wafer suitable for the growth of semiconductor materials. In addition, the substrate 110 may be formed of a material having excellent thermal conductivity or may be a conductive substrate or an insulating substrate. Further, the substrate 110 may be formed of a light-transmitting material and may have a mechanical strength that does not cause the entire semiconductor stack 120 to bend and enables effective division into separate chips through scribing and breaking processes. For example, the substrate 110 may use sapphire (Al) ₂ O ₃ ) A substrate, a silicon carbide (SiC) substrate, a silicon (Si) substrate, a zinc oxide (ZnO) substrate, a gallium nitride (GaN) substrate, a gallium arsenide (GaAs) substrate, a gallium phosphide (GaP) substrate, or the like, and particularly, sapphire (Al) is preferably used ₂ O ₃ ) A substrate. In this embodiment, the substrate 110 is sapphire with a series of protrusions on its surface, including, for example, protrusions with a fixed slope formed by dry etching or protrusions with a certain slope formed by wet etching.

In an embodiment of the present invention, the semiconductor stack 120 having electro-optical characteristics, such as a light-emitting (light-emitting) stack, is formed on the substrate 110 by a Metal Organic Chemical Vapor Deposition (MOCVD), a Molecular Beam Epitaxy (MBE), a hydride vapor deposition (HVPE), a Physical Vapor Deposition (PVD) or an ion plating method, wherein the PVD method includes a Sputtering (Sputtering) or an evaporation (evaporation) method. The first semiconductor layer 121, the active layer 122, and the second semiconductor layer 123 may be formed of a group iii gallium nitride series compound semiconductor, for example, gaN, alN, inGaN, alGaN, inAlGaN, and at least one of these groups. The first semiconductor layer 121 is a layer that supplies electrons and may be formed by injecting an n-type dopant (e.g., si, ge, se, te, C, etc.). The second semiconductor layer 123 is a layer providing holes and may Be formed by injecting p-type dopants (e.g., mg, zn, be, ca, sr, ba, etc.). The active layer 122 is a layer in which electrons supplied from the first semiconductor layer 121 and holes supplied from the second semiconductor layer 123 are recombined to output light having a predetermined wavelength, and may be formed of a semiconductor thin film having a plurality of layers having a single-layer or multi-layer quantum well structure in which well layers and barrier layers are alternately stacked. The active layer 122 has different material compositions or ratios according to different wavelengths of the output light. For example, the light emitting diode 1 of the embodiment of the present invention has an emission wavelength between 420nm and 580 nm. The active layer 122 may be formed to have a pair structure including a well layer and a barrier layer using group III to group V compound semiconductor materials (e.g., at least one of InGaN/GaN, inGaN/InGaN, gaN/AlGaN, inAlGaN/GaN, gaAs (InGaAs)/AlGaAs, or GaP (InGaP)/AlGaP), but the present disclosure is not limited thereto. The well layer may be formed of a material having an energy bandgap smaller than that of the barrier layer.

In an embodiment of the invention, the light emitting diode 1 includes a transparent conductive layer 130, and the transparent conductive layer 130 is formed on the semiconductor stack 120 and contacts the second semiconductor layer 123. The transparent conductive layer 130 may substantially contact the almost entire upper surface of the second semiconductor layer 123. In this structure, current can be spread in a horizontal direction by the transparent conductive layer 130 when supplied to the light emitting diode, and thus can be uniformly supplied to the entirety of the second semiconductor layer 123. In a preferred embodiment, the thickness of the transparent conductive layer 130 is 5 to 60nm, and when the thickness is less than 5nm, the forward voltage (Vf) suitable for the light emitting diode is increased, and the light absorption effect is increased obviously when the thickness exceeds 60 nm. The thickness of the transparent conductive layer 130 is more preferably 10 to 30nm, and may be 15nm or 20nm, for example. The material of the transparent conductive layer 130 may be ITO, inO, snO, CTO, ATO, znO, gaP, or a combination thereof. The transparent conductive layer 130 can be formed by evaporation or sputtering.

In another embodiment (not shown), the transparent conductive layer 130 is provided with a plurality of openings through which a portion of the second semiconductor layer 123 is exposed, and the size and density of the openings are controlled so that the area ratio occupied by the transparent conductive layer 130 of the semiconductor stack 120 is greater than 50% and less than 95%, and the area of the transparent conductive layer 130 is reduced while ensuring that the transparent conductive layer 130 and the second semiconductor layer 123 have sufficient ohmic contact, thereby improving the brightness of the led. Preferably, the area ratio of the semiconductor stack 120 occupied by the transparent conductive layer 130 is 70 to 90%. Specifically, the openings are distributed in an array, the diameter of each opening is 2 to 50 micrometers, and the distance between adjacent first opening OP1 parts is 1 to 20 micrometers. In the present embodiment, the diameter of the opening is selected from 2 to 10 μm, and the pitch is selected from 5 to 20 μm.

In an embodiment of the invention, the light emitting diode 1 includes a first insulating layer 140, and the first insulating layer 140 is formed on the semiconductor stack 120. The first insulating layer 140 includes one or more first openings OP1 to expose a portion of the surface of the transparent conductive layer 130. The sum of the cross-sectional areas of the first opening portions OP1 accounts for 3% to 50%, preferably 5% to 20%, and more preferably 10% of the ratio of the cross-sectional area of the semiconductor stacked layer 120, if the ratio is too low, the area of the reflective electrode layer 150 formed subsequently contacting the transparent conductive layer 130 through the first opening portions OP1 is too small to control the voltage, and if the ratio is too high, the reflective effect of the omnidirectional reflective layer structure formed by the transparent conductive layer 130, the first insulating layer 140 (e.g., low refractive index), and the reflective electrode layer 150 is affected.

The first insulating layer 140 may include SiO ₂ 、SiN、SiOxNy、TiO ₂ 、Si ₃ N ₄ 、Al ₂ O ₃ 、TiN、AlN、ZrO ₂ 、TiAlN、TiSiN、HfO、TaO ₂ And MgF ₂ At least one of (1). In example embodiments, the first insulating layer 140 may have a multilayer film structure in which insulating films having different refractive indices are alternately stacked, and may be provided as a Distributed Bragg Reflector (DBR). The multilayer film structure may be a structure in which first and second insulating films having first and second refractive indices (as different refractive indices) are alternately stacked.

In another example embodiment, the first insulating layer 140 may be formed of a material having a refractive index lower than that of the second semiconductor layer 123. The first insulating layer 140 may constitute an omnidirectional reflector (ODR) together with the reflective electrode layer 150 disposed to contact an upper portion of the first insulating layer 140. In this way, the first insulating layer 140 may be used alone or in combination with the reflective electrode layer 150 as a reflective structure that increases the reflectivity of light emitted from the active layer 122, and thus, the light extraction efficiency may be significantly improved.

The thickness of the first insulating layer 140 may have a thickness in the range of 100nm to 1500nm, and particularly, may have a thickness in the range of 200nm to 1000 nm. When the thickness of the first insulating layer 140 is less than 200nm, the forward voltage is high and the light output is low, which is undesirable. On the other hand, if the thickness of the first insulating layer 140 exceeds 1000nm, the light output is saturated. Therefore, the thickness of the first insulating layer 140 is preferably not more than 1000nm, and may be 900nm or less.

In an embodiment of the invention, the light emitting diode 1 includes a reflective electrode layer 150, and the reflective electrode layer 150 is formed on the semiconductor stack 120. The reflective electrode layer 150 contacts the transparent conductive layer 130 through the first opening OP 1. The reflective electrode layer 150 includes a metal reflective layer 151 and a metal protective layer 152. The metal reflective layer 151 is formed on the metal protection layer 152, and the metal protection layer 152 can reduce the risk that the metal reflective layer 151 may be oxidized by air or corroded by an etching solution during the process of manufacturing (for example, removing the photoresist).

The metal reflective layer 151 includes a reflective metal having a high reflectivity with respect to light emitted from the light emitting diode, such as Ag, al, rh, ru, ti, cr, ni, or an alloy or a stack of the above materials.

The material of the metal protection layer 152 may include nickel (Ni), chromium (Cr), platinum (Pt), titanium (Ti), tungsten (W), zinc (Zn), or an alloy or a stack of the above materials. In one embodiment, when the metal passivation layer 152 is a metal stack, the metal passivation layer 152 is formed by alternately stacking two or more layers of metal, such as Cr/Pt, cr/Ti, cr/TiW, cr/W, cr/Zn, ti/Pt, ti/W, ti/TiW, ti/Zn, pt/TiW, pt/Zn, tiW/W, tiW/Zn, W/Zn, ni/Pt, ni/Ti, ni/TiW, ni/W, or Ni/Zn.

The light emitted from the semiconductor stack 120 can reach the surface of the reflective electrode layer 150 through the first insulating layer 140 and be reflected back by the reflective electrode layer 150, so that the first insulating layer 140 has a certain transmittance for the light emitted from the active layer. Preferably, according to the principle of light reflection, the refractive index of the first insulating layer 140 is lower than that of the material of the semiconductor stack 120, so that a small angle light that part of the light radiated from the active layer 122 reaches the surface thereof can be transmitted or refracted to the first reflective layer 130, and the incident light exceeding the total reflection angle is totally reflected. Therefore, the reflection effect of light by virtue of the combination of the first insulating layer 140 and the reflective electrode layer 150 is higher than the reflection effect of the reflective electrode layer 150 to light.

Since the metal passivation layer 152 formed on the metal reflective layer 151 has a small thickness, which is effective for protecting the electromigration and thermal diffusion of the metal reflective layer 151, in an embodiment of the invention, the light emitting diode 1 includes a metal barrier layer 220, the metal barrier layer 220 is formed on the reflective electrode layer 150, and the edge of the metal barrier layer is located on the upper surface of the second insulating layer 161. The metal barrier layer 220 covers the reflective electrode layer 150 to prevent electromigration or thermal diffusion of the metal contained in the reflective electrode layer 150. In order to effectively protect the reflective electrode layer 150, the metal barrier layer 220 needs to have a sufficient thickness, especially at the edge of the reflective electrode layer 150. Therefore, the thickness between the edge of the metal barrier layer 220 and the edge of the reflective electrode layer 150 is greater than 4 μm. In order to form the metal barrier layer 220 with a sufficient space between the reflective electrode layer 150 and the semiconductor stack 120, the distance between the reflective electrode layer 150 and the semiconductor stack 120 is greater than 8 μm, so that it can be ensured that no leakage or ESD abnormality occurs during the chip process.

In an embodiment of the invention, the thickness of the metal reflective layer 151 is 100 to 200nm, the thickness of the metal protective layer 152 is 100 to 500nm, and the thickness of the metal blocking layer 220 is 500nm to 1500nm.

The metal barrier layer 220 may include a metal such as titanium (Ti), tungsten (W), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), chromium (Cr), gold (Au), titanium Tungsten (TiW), or an alloy thereof. The metal barrier layer 220 may be a single layer or a stacked structure, such as titanium (Ti)/aluminum (Al), and/or titanium (Ti)/tungsten (W).

In an embodiment of the invention, the light emitting diode 1 includes a second insulating layer 161, the second insulating layer 161 is formed on the metal barrier layer 220, and includes a second opening OP2 partially exposing the first semiconductor layer 121 and a third opening OP3 partially exposing the metal barrier layer 220.

The second insulating layer 161 may include an insulating material prepared using a physical vapor deposition method or a chemical vapor deposition method, such as silicon nitride (SiNx), silicon oxide (SiOx), titanium oxide (TiOx), or magnesium fluoride (MgF) ₂ ) And the like. In addition, the second insulating layer 161 may be composed of a plurality of layers, and may include distributed bragg reflectors in which insulating materials having different refractive indexes are alternately stacked one on another. The structure in which the second insulating layer 161 includes the distributed bragg reflector reflects light that has passed through the omnidirectional reflector instead of being reflected again, thereby improving the light emitting efficiency of the light emitting apparatus.

In one embodiment of the present invention, the light emitting diode 1 includes a first connection electrode 171 and a second connection electrode 172. The first connection electrode 171 contacts the first semiconductor layer 121 through the second opening OP2 and extends over the surface of the second insulating layer 161, wherein the first connection electrode 171 is insulated from the second semiconductor layer 123 by the second insulating layer 161. The second connection electrode 172 contacts the metal barrier layer 220 through the third opening OP3 and extends to cover the surface of the second insulating layer 160, wherein the second connection electrode 172 is electrically connected to the second semiconductor layer 123 through the metal barrier layer 220.

In an embodiment of the present invention, the light emitting diode includes a third insulating layer 180, and the third insulating layer 180 is formed on the semiconductor stack 120, covering the first and second connection electrodes 171 and 172. The third insulating layer 180 includes a portion of the surface of the fourth opening OP4 exposing the first connection electrode 171 and a portion of the surface of the fifth opening OP5 exposing the second connection electrode 172.

The third insulating layer 180 may include SiO ₂ SiN, etc. The third insulating layer 180 may have a multilayer film structure in which high-refractive-index dielectric films and low-refractive-index dielectric films are alternately stacked, such as a bragg reflector (DBR). Wherein, the material of the dielectric film with high refractive index can be TiO ₂ 、NB ₂ O ₅ 、TA ₂ O ₅ 、HfO ₂ 、ZrO ₂ Etc.; the material of the low-refractive dielectric film may be SiO ₂ 、MgF ₂ SiON, etc. The thickness of the third insulating layer 180 is between 500nm and 1500nm. The total area of the plurality of fourth openings OP4 and the plurality of fifth openings OP5 in the third insulating layer 180 is preferably greater than 20% of the total area of the semiconductor stack 120.

In an embodiment of the present invention, the light emitting diode 1 includes a first pad electrode 191 and a second pad electrode 192. The first pad electrode 191 contacts the first connection electrode 171 through the fourth opening OP4 and is electrically connected to the first semiconductor layer 121 through the first connection electrode 171. The second pad electrode 192 contacts the second connection electrode 172 through the fifth opening OP5, and is electrically connected to the second semiconductor layer 123 through the second connection electrode 172.

In an embodiment of the present invention, each of the first and second pad electrodes 191 and 192 may include a single film including a single material selected from the group consisting of gold (Au), tin (Sn), nickel (Ni), lead (Pb), silver (Ag), indium (In), chromium (Cr), germanium (Ge), silicon (Si), titanium (Ti), tungsten (W), and platinum (Pt), or an alloy including at least two materials thereof, or a multi-layer structure including a combination thereof.

Each of the first and second pad electrode layers 191 and 192 may be used as an external terminal of the light emitting diode, but the inventive concept is not limited thereto.

Second embodiment

Fig. 2 to 29 are schematic structural views of steps of a method for manufacturing the light emitting diode 2 according to the second embodiment of the present invention.

The light emitting diode 2 and the light emitting diode 1 have substantially the same structure, and therefore, the light emitting diode 2 in fig. 2 to 29 has the same structure, the same material, or the same function as the light emitting diode 1 in fig. 2 with the same name and the same reference numeral, and the description thereof will be omitted or will not be repeated.

As shown in fig. 2, the method for manufacturing the light emitting diode 2 includes the steps of forming a semiconductor stack 120, which includes providing a substrate 110; and forming a semiconductor stack 120 on the substrate 110, wherein the semiconductor stack 120 includes a first semiconductor layer 121, a second semiconductor layer 123, and an active layer 122 between the first semiconductor layer 121 and the second semiconductor layer 123.

As shown in the top view of fig. 3 and the cross-sectional view taken along the line I-I' of fig. 3, after the semiconductor stack 120 is formed on the substrate 110, the method for manufacturing the light emitting diode 2 includes a mesa formation step. The semiconductor stack 120 is patterned by photolithography and etching to form a first mesa 1201 and a plurality of second mesas 1202. Through the photolithography and etching processes, a portion of the inside of the second semiconductor layer 123 and the active layer 122 is removed to form a plurality of second mesas 1202, and the plurality of second mesas 1202 correspondingly expose the second surface 121b of the first semiconductor layer 121. Here, the second mesa 1202 is defined by an inner sidewall 1200c and the second surface 121b. One end of the inner sidewall 1200c is connected to the second surface 121b of the first semiconductor layer 121, and the other end of the inner sidewall 1200c is connected to the surface 123s of the second semiconductor layer 123. In the same or another photolithography (photolithography) and etching process, the second semiconductor layer 123 and the active layer 122 surrounding the periphery of the semiconductor stack 120 are removed to form a first mesa 1201, and the first mesa 1201 exposes the first surface 121a of the first semiconductor layer 121. In another embodiment, a portion of the first semiconductor layer 121 is further etched to a deeper etching depth in the photolithography and etching process to expose the first surface 121a. Herein, the first mesa 1201 is defined by the first outer sidewall 1200a, the second outer sidewall 1200b, and the first surface 121a, wherein the first outer sidewall 1200a is connected to the first surface 121a of the first mesa 1201 at one end and connected to the exposed surface 110s of the substrate 110 at the other end; the second outer sidewall 1200b has one end connected to the first surface 121a of the first mesa 1201 and the other end connected to the surface 123s of the second semiconductor layer 123. The first and second outer sidewalls 1200a and 1200b may be inclined to the first surface 121a. The first mesa 1201 is formed along a periphery of the stack of semiconductor layers 120 at and/or around an edge of one or more of the stack of semiconductor layers 120. In one embodiment, the first outer sidewall 1200a is inclined to the exposed surface 110s of the substrate 110. The first outer sidewall 1200a includes an acute angle with the exposed surface 110s of the substrate 110. In one embodiment, the first outer sidewall 1200a and the exposed surface 110s of the substrate 110 include an obtuse angle therebetween (not shown).

In an embodiment of the invention, as shown in fig. 3, the second mesa 1202 is located inside the stacked semiconductor layer 120 and exposes the second surface 121b of the first semiconductor layer 121. The shape of the second mesa 1202 includes an oval, a circle, a rectangle, or any other shape. The second mesas 1202 may be regularly disposed on the semiconductor stacked layer 120. However, it is to be understood that the present invention is not limited thereto, and the configuration and number of the second mesas 1202 may be changed according to various ways.

Following the step of forming the mesa, as shown in the top view of fig. 5, fig. 6 is a partially enlarged schematic view of fig. 5, and fig. 7 is a cross-sectional view along line I-I' of fig. 5, the method of manufacturing the light emitting diode includes a step of forming a transparent conductive layer. A transparent conductive layer 130 is formed on the semiconductor stack 120 by physical vapor deposition or chemical vapor deposition, and contacts the second semiconductor layer 123. In some embodiments, the horizontal distance between the sidewall 130e of the transparent conductive layer 130 and the second outer sidewall 1200b or the inner sidewall 1200c of the stack of semiconductor layers 120 is a third distance D3, and the third distance D3 may be less than 10 μm, and is preferably 2 to 6 μm. In this structure, current can be spread in a horizontal direction by the transparent conductive layer 130 when supplied to the light emitting diode, and thus can be uniformly supplied to the entirety of the second semiconductor layer 123. If the third distance D3 is greater than 10 μm, the contact area between the transparent conductive layer 130 and the second semiconductor layer 123 is too small, the voltage of the light emitting diode is too large, and the current spreading effect is not good.

In an embodiment of the invention, following the transparent conductive layer forming step, as shown in the top view of fig. 8, fig. 9 is a partially enlarged view of fig. 8, fig. 10 is a cross-sectional view along the line I-I' of fig. 8, and fig. 11 is a partially enlarged view of fig. 10, the manufacturing method of the light emitting diode 2 includes a first insulating layer 140 forming step. The first insulating layer 140 is formed on the semiconductor stack 120 by a physical vapor deposition method or a chemical vapor deposition method, and then the first insulating layer 140 is patterned by photolithography and etching, wherein the first insulating layer 140 may include one or more first openings OP1 to expose a portion of the surface of the transparent conductive layer 130. The first insulating layer 140 is formed on the transparent conductive layer 130, and wraps the sidewall 130e of the transparent conductive layer 130 and the sidewall of the semiconductor stack 120. Specifically, the first insulating layer 140 may cover a part of the surface of the transparent conductive layer 130, the second outer sidewall 1200b of the stack of semiconductor layers 120, the first surface 121a of the first semiconductor layer 121, the first outer sidewall 1200a, the inner sidewall 1200c, and the second surface 121b of the first semiconductor layer 121. When the mesa has an inclined sidewall, the first insulating layer 140 disposed on the mesa sidewall may be more stably formed.

In one embodiment, as shown in fig. 11, the first insulating layer 140 has an upper surface 140S1 far from the semiconductor stack 120 and a lower surface 140S2 opposite to the upper surface 140S1, and the upper surface 140S1 has a first surface 140S1a, a second surface 140S1b and a third surface 140S1c connecting the first surface 140S1a and the second surface 140S 1b. The thickness between the first surface 140S1a and the lower surface 140S2 is smaller than the thickness between the second surface 140S1b and the lower surface 140S2, i.e., the first surface 140S1a is closer to the semiconductor stack 120 than the second surface 140S 1b. The third surface 140S1c is an inclined surface with respect to the first surface 140S1a and the second surface 140S1b, and an included angle between the third surface 140S1c and the first surface 140S1a is an obtuse angle.

Following the step of forming the first insulating layer 140, as shown in fig. 12, fig. 13 is an enlarged view of a portion a of fig. 12, fig. 14 is an enlarged view of a portion B of fig. 12, fig. 15 is a cross-sectional view taken along line I-I' of fig. 12, and fig. 16 is an enlarged view of a portion B of fig. 15, the method of manufacturing the light emitting diode includes a step of forming the reflective electrode layer 150. The reflective electrode layer 150 is directly formed on the semiconductor stack 120 by physical vapor deposition or magnetron sputtering. The reflective electrode layer 150 is disposed on the first surface 140S1a and the third surface 140S1c of the first insulating layer 140, and contacts the transparent conductive layer 130 through the first opening OP 1. Wherein an edge 150e of the reflective electrode layer 150 is formed on the third surface 140S1c of the first insulating layer 140

In one embodiment, as shown in fig. 16, the reflective electrode layer 150 includes a metal reflective layer 151 and a metal protective layer 152, the metal reflective layer 151 is formed on the first surface 140S1a of the first insulating layer 140, and an edge of the metal reflective layer 151 is located on the third surface 140S1c. By controlling the edge of the metal reflective layer 151 to be formed on the third surface 140S1c, the deposition of the metal protection layer 152 over the edge of the metal reflective layer 151 will be facilitated.

The metal protection layer 152 may cover the upper surface and the side surface of the metal reflective layer 151, so as to protect the metal reflective layer 151 from being oxidized or corroded during the process of manufacturing (e.g., photoresist removal), and to inhibit the migration of the metal elements contained in the metal reflective layer 151. The metal protection layer 152 may include an upper portion R1 covering the upper surface of the metal reflective layer 151, a side portion R2 covering the side surface of the metal reflective layer 151, the side portion R2 being formed on the third surface 140S1c of the first insulating layer 140, and the thickness of the side portion R2 being gradually reduced. For example, the upper portion R1 and the side portion R2 may be in contact with and continuous with each other.

In one embodiment, the thickness of the metal reflective layer 151 is 100 to 200nm, and the thickness of the upper portion R1 of the metal protective layer 152 is 100 to 500nm.

In an embodiment, as shown in fig. 16, a thickness between the surface 150S of the reflective electrode layer 150 far away from the semiconductor stack and the lower surface 140S2 of the first insulating layer 140 is smaller than a thickness between the second surface 140S1b of the first insulating layer 140 and the lower surface 140S2, so that the reflective electrode layer 150 can have a sufficient reflectivity, and the adhesion between the reflective electrode layer 150 and the first insulating layer 140 can be ensured.

In an embodiment of the invention, a horizontal distance between the edge 150e of the reflective electrode layer 150 and the second outer sidewall 1200b or the inner sidewall 1200c of the semiconductor stack 120 is a fourth distance D4 (i.e., a horizontal distance between the edge 150e of the reflective electrode layer 150 and an upper edge of the second semiconductor layer 123), and the fourth distance D4 is 1 to 5 μm, for example, 2 μm, 3 μm, or 4 μm. Since the fourth distance D4 is small, if the metal blocking layer 220 is designed as in the light emitting diode 1, the problems of leakage and EDS abnormality may be caused. Therefore, in an embodiment of the invention, the metal barrier layer 220 is eliminated from the reflective electrode layer 150 to increase the area of the reflective electrode layer 150 as much as possible, so as to improve the brightness of the led. If the fourth distance D4 is less than 1 μm, the distance between the reflective electrode layer 150 and the semiconductor stack 120 is too small, which may cause light emitting diode leakage and ESD abnormality. If the fourth distance D4 is greater than 5 μm, the area of the reflective electrode layer 150 is affected, thereby reducing the brightness of the light emitting diode.

In an embodiment of the invention, since the metal barrier layer 220 is eliminated from the light emitting diode 2, the projection of the transparent conductive layer 130 in the growth direction of the semiconductor stacked layer 120 is located in the projection of the reflective electrode layer 150 in the growth direction of the semiconductor stacked layer 120, so as to increase the area of the reflective electrode layer 150 as much as possible, thereby making the third distance D3 greater than the fourth distance D4.

In an embodiment of the present invention, as shown in fig. 15 and 16, a projection of the transparent conductive layer 130 in the growth direction of the semiconductor stack 120 is located within a projection of the third surface 140S1c and the first surface 140S1a of the first insulating layer 160 in the growth direction of the semiconductor stack 120.

After the step of forming the reflective electrode layer 150, as shown in the top view of fig. 17, fig. 18 is an enlarged view of a portion a of fig. 17, fig. 19 is an enlarged view of a portion B of fig. 17, fig. 20 is a cross-sectional view along the line I-I' of fig. 17, fig. 21 is an enlarged view of a portion a of fig. 20, and fig. 22 is an enlarged view of a portion B of fig. 20, the method for manufacturing a light emitting diode includes a step of forming the fourth insulating layer 162 and the second insulating layer 161. The fourth insulating layer 162 is formed on the semiconductor stack 120 by an atomic layer deposition method. The fourth insulating layer 162 is formed on the reflective electrode layer 150 and extends to the second surface 140S1b of the first insulating layer 140. The fourth insulating layer 162 may be alumina or silicon oxide, preferably alumina. The fourth insulating layer 162 prepared by the atomic layer deposition method has good compactness, can enhance the protection of the reflective electrode layer 150, and further prevents the metal element contained in the reflective electrode layer 150 from electromigration or thermal diffusion, so that the area of the reflective electrode layer 150 can be increased to increase the brightness of the light emitting diode, and the migration can be prevented to improve the reliability of the light emitting diode. In one embodiment, the second insulating layer 161 is formed on the fourth insulating layer 162 by a physical vapor deposition method or a chemical vapor deposition method, and the second insulating layer 161 may be one or more of silicon oxide, silicon nitride, silicon oxynitride, or titanium oxide.

In one embodiment, the thickness of the fourth insulating layer 162 is 20 to 150nm. If the thickness of the fourth insulating layer 162 is less than 20nm, the protective effect on the reflective electrode layer 150 is limited, and the metal element contained in the reflective electrode layer 150 cannot be effectively prevented from electromigration or thermal diffusion; if the thickness of the fourth insulating layer 162 is greater than 150nm, the process time is too long, which results in reduced efficiency and increased cost. The thickness of the second insulating layer 161 is 20 to 150nm. In a preferred embodiment, the thickness of the second insulating layer 161 is greater than that of the fourth insulating layer 162, which can not only utilize the strong coating and blocking properties of the film formed by the atomic layer deposition method, but also take into account the production efficiency.

The fourth insulating layer 162 and the second insulating layer 161 are patterned by photolithography or etching to form a second opening OP2 to expose the second surface 121b of the first semiconductor layer 121, and a third opening OP3 to expose a portion of the surface of the reflective electrode layer 150. In the process of patterning the fourth insulating layer 162 and the second insulating layer 161, the first insulating layer 140 covered in the mesa in the step of forming the first insulating layer 140 is partially etched and removed to expose the second surface 121b of the first semiconductor layer 121.

In an embodiment of the present invention, in order to increase an area of the first connection electrode 171 in contact with the first semiconductor layer 121 through the second opening OP2 to reduce a voltage of the light emitting diode, the second opening OP2 may be formed using ICP dry etching. Since the metal protection layer 152 in the reflective electrode layer 150 is thin, if the third opening portion OP3 is formed by ICP dry etching, a gas used in the ICP dry etching may corrode the metal protection layer 152, so that Ag or Al in the metal reflective layer 151 may be electromigration or thermal diffusion. Therefore, in an embodiment of the present invention, the third opening portion OP3 is formed by wet etching.

As shown in fig. 21, the sidewall of the second opening OP2 may form a first included angle α 1 with the second surface 120b of the first semiconductor layer 121. As shown in fig. 22, the sidewall of the third opening portion OP3 may form a second included angle α 2 with the surface of the reflective electrode layer 150.

In an embodiment of the present invention, the second opening portion OP2 is formed by ICP dry etching, and the third opening portion OP3 is formed by BOE wet etching, so that the first included angle α 1 may be greater than the second included angle α 2.

In another embodiment of the present invention, since the metal layer 210 is formed on the reflective electrode layer 150, the reflective electrode layer 150 can be blocked from being corroded by the gas used in the ICP dry etching, and the third opening portion OP3 can be obtained by the ICP dry etching. Thus, the first included angle α 1 may be equal to the second included angle α 2.

Following the formation steps of the fourth insulating layer 162 and the second insulating layer 161, as shown in the top view of fig. 23, the cross-sectional view taken along the line I-I' of fig. 23 in fig. 24, and the enlarged view of the portion a of fig. 24 in fig. 25, the method for manufacturing the light emitting diode includes the formation step of the connection electrode 170. The connection electrode 170 is formed on the semiconductor stacked layer 120 by a physical vapor deposition method, magnetron sputtering, or the like. The connection electrode 170 is patterned by photolithography and etching to form a first connection electrode 171 and a second connection electrode 172.

The first connection electrode 171 contacts the second surface 121b of the first semiconductor layer 121 through the second opening OP2 and extends over the surface of the second insulating layer 161, wherein the first connection electrode 171 is insulated from the second semiconductor layer 123 by the second insulating layer 161. The second connection electrode 172 contacts the reflective electrode layer 150 through the third opening OP3 and extends to cover the surface of the second insulating layer 160, wherein the second connection electrode 172 is electrically connected to the second semiconductor layer 123 through the reflective electrode layer 150.

In an embodiment of the present invention, the first and second connection electrodes 171 and 172 are spaced apart from each other by a distance such that the first connection electrode 171 is not connected to the second connection electrode 172. The first connection electrode 171 surrounds sidewalls of the second connection electrode 172 in a top view of the light emitting diode. In order to make the current spread better, the area of the first connection electrode 171 is larger than that of the second connection electrode 172.

Following the step of forming the connection electrode 170, as shown in the top view of fig. 26 and the cross-sectional view of fig. 27 along the line I-I' of fig. 26, the method for manufacturing a light emitting diode includes a step of forming a third insulating layer 180. A third insulating layer 180 is formed on the semiconductor stack 120 by a physical vapor deposition method or a chemical vapor deposition method, and the third insulating layer 180 is patterned by photolithography and etching to form a fourth opening OP4 and a fifth opening OP5 to expose the first connecting electrode 171 and the second connecting electrode 172, respectively.

Following the third insulating layer forming step, the method for manufacturing a light emitting diode includes a pad electrode 190 forming step. As shown in the top view of fig. 28 and the cross-sectional view of fig. 29 along the line I-I' of fig. 28, a first pad electrode 191 and a second pad electrode 192 are formed on the one or more semiconductor stacks 120 by electroplating, pvd or cvd.

The first pad electrode 191 contacts the first connection electrode 171 through the fourth opening OP4 and is electrically connected to the first semiconductor layer 121 through the first connection electrode 171. The second pad electrode 192 is in contact with the second connection electrode 172 through the fifth opening OP5, and is electrically connected to the second semiconductor layer 123 through the second connection electrode 172. A projection of the first pad electrode 191 in the growth direction of the semiconductor stack 120 is located within the first connection electrode 171, and a projection of the second pad electrode 192 in the growth direction of the semiconductor stack 120 is located within the second connection electrode 172. The area of the fourth opening OP4 is larger than that of the first pad electrode 191, and the area of the fifth opening OP5 is larger than that of the second pad electrode 192. Due to the structural arrangement, the first pad electrode 191 and the second pad electrode 192 can be on the same horizontal plane, the die bonding void ratio of the packaging end of the light-emitting diode is reduced, and the heat dissipation performance is enhanced.

In another embodiment of the present invention, as shown in fig. 3 and 28, the led 2 includes a plurality of corners and a plurality of sides, wherein any corner is formed by two adjacent sides. The plurality of corners includes a first corner C1, a second corner C2, a third corner C3, and a fourth corner C4. The plurality of sides includes a first side E1, a second side E2, a third side E3, and a fourth side E4. The first and third sides E1 and E3 may face each other, and the second and fourth sides E2 and E4 may face each other. The first corner C1 is adjacent to the first edge E1 and the second edge E2, the second corner C2 is adjacent to the second edge E2 and the third edge E3, the third corner C3 is adjacent to the third edge E3 and the fourth edge E4, and the fourth corner C4 is adjacent to the fourth edge E4 and the first edge E1. Wherein the first corner C1 and the second corner C4 are relatively close to the first pad electrode 191, and the second corner C2 and the third corner C3 are relatively close to the second pad electrode 192.

In an embodiment of the invention, as shown in fig. 3 and fig. 28, the first mesa 1201 is located at an edge of the stacked semiconductor layer 120, wherein the first mesa 1201 continuously surrounds the second semiconductor layer 123 and the active layer 122 of the stacked semiconductor layer 120 by continuously exposing the first surface 121a of the outermost first semiconductor layer 121 of the stacked semiconductor layer 120.

In another embodiment of the present invention, the first mesa 1201 is located at an edge of the stacked semiconductor layer 120, wherein the first mesa 1201 discontinuously surrounds the second semiconductor layer 123 and the active layer 122 of the stacked semiconductor layer 120 through the first surface 121a of the outermost first semiconductor layer 121 of the stacked semiconductor layer 120, which is discontinuously exposed (i.e., at least a partial region is exposed, and at least a partial region is not exposed).

As shown in fig. 3, 4, and 28, the first mesa 1201 may include a first mesa 1201a and a second mesa 1201b to continuously surround the semiconductor stack 120, in which a horizontal distance between an upper edge of the second outer sidewall 1200b of the first mesa 1201a and an edge (e.g., the first edge E1) of the light emitting diode is a first distance D1, and a horizontal distance between an upper edge of the second outer sidewall 1200b of the second mesa 1201b and the edge (e.g., the first edge E1) of the light emitting diode is a second distance D2. In an embodiment, the first distance D1 is smaller than the second distance D2, so that the light emitting area of the light emitting diode can be increased, and the brightness of the light emitting diode can be improved. The first distance D1 is 10 to 30 μm, and the second distance is 20 to 40 μm.

In another embodiment of the present invention, the first mesa 1201 may include only the second mesa 1201b to continuously surround the stack of semiconductor layers 120, and the distance between the second mesa 1201b and the edge (e.g., the first edge E1) of the light emitting diode is the second distance D2.

In another embodiment of the present invention, the first mesa 1201 may include only the second mesa 1201b to discontinuously surround the stack of semiconductor layers 120, and a distance between the second mesa 1201b and an edge (e.g., the first edge E1) of the light emitting diode is the second distance D2.

In an embodiment of the present invention, the second platform 1201b is located at four corners of the light emitting diode 2, as shown in fig. 3, the second platform 1201b is L-shaped and includes a first segment and a second segment. The second platform 1201b is close to a corner of the light emitting diode 2 with respect to the first platform 1201.

As shown in fig. 17, 20 and 28, the fourth insulating layer 162 and the second insulating layer 161 contact and cover the first insulating layer 140, so that the first outer sidewall 1200a, the second outer sidewall 1200b and the first surface 121a of the first mesa 1201 covered by the first insulating layer 140 are also covered by the fourth insulating layer 162 and the second insulating layer 161. The fourth insulating layer 162 and the second insulating layer 161 can protect the sidewalls of the semiconductor stack 120 and prevent the active layer 122 from being damaged by the subsequent manufacturing process. The fourth insulating layer 162 and the second insulating layer 161 further include a sixth opening OP6, and the sixth opening OP6 is located on the first mesa 1201 of the stacked semiconductor layer 120, exposing the first surface 121a of the first semiconductor layer. Specifically, the projection of the sixth opening OP6 in the growth direction of the semiconductor stack is located within the second mesa 1201b, and the first connection electrode 171 may be discontinuously in contact with the first semiconductor layer 121 of the first mesa 1201 through the sixth opening OP6, enhancing current diffusion of the light emitting diode.

In an embodiment of the present invention, as shown in fig. 23, 24, and 25, the sidewall 171e of the first connection electrode 171 near the edge of the light emitting diode is located on the first mesa 1201 or the second mesa 1202, that is, the projection of the first connection electrode 171 in the growth direction of the semiconductor stack 120 is located in the first mesa 1201 or the second mesa 1202, which can effectively reduce the risk of short circuit.

In an embodiment of the present invention, the sixth opening OP6 may also be L-shaped, and includes a first segment OP61 and a second segment OP62, and the first segment OP61 and the second segment OP62 are continuous structures. Since the fourth insulating layer 162 is made of aluminum oxide prepared by an atomic layer deposition method, the aluminum oxide has a large stress, and the aluminum oxide may be separated from the first insulating layer 140 during the splitting process of the light emitting diode, especially at the four corner edges of the light emitting diode. Therefore, the sixth opening OP6 is disposed at the four corners of the led to release the stress of the alumina, thereby reducing the risk of the alumina falling off from the first insulating layer 140. In addition, since the sixth opening OP6 is formed at the edge of the four corners of the led 2, and only the third insulating layer 180 is formed on the four corners of the led, the occurrence of the silicon collapse abnormality during the hidden slicing of the led can be reduced. And a sixth opening OP6 located at the first corner C1, the first segment extending along the first side E1 of the led, and the second segment extending along the second side E2 of the led. And a sixth opening OP6 at the second corner C2, wherein the first segment extends along the second side E2 of the LED and the second segment extends along the third side E3 of the LED. And a sixth opening OP6 located at the third corner C3, wherein the first segment extends along the third side E3 of the led, and the second segment extends along the fourth side E4 of the led. And a sixth opening OP6 located at the fourth corner C4, the first segment extending along the fourth edge E4 of the led, and the second segment extending along the first edge E1 of the led.

In an embodiment of the invention, an area of the sixth opening OP6 located at the first corner C1 or the fourth corner C4 exposing the first surface 121a of the first semiconductor layer 121 is larger than an area of the sixth opening OP6 located at the second corner C2 or the third corner C3 exposing the first surface 121a of the first semiconductor layer 121.

In an embodiment of the invention, as shown in fig. 17, the first and second segments of the sixth opening OP6 located at the second corner C2 or the third corner C3 may be equal, and by increasing the length of the second segment, the contact area of the first connection electrode 171 and the first semiconductor layer 121 may be increased, thereby enhancing current diffusion.

In an embodiment of the invention, as shown in fig. 17, the first section and the second section of the sixth opening located at the first corner C1 or the fourth corner C4 may not be equal, and by reducing the length of the second section, the light emitting area of the led 2 may be increased, and the brightness of the led 2 may be improved.

In an embodiment of the present invention, the sixth opening portion OP6 may be formed by ICP dry etching. An angle between the sidewall of the sixth opening OP6 and the first surface 120b of the first semiconductor layer 121 is a third angle. The third included angle is greater than the second included angle alpha 2.

Third embodiment

Fig. 30 is a top view of a light emitting diode 3 according to a third embodiment of the present invention, fig. 31 is a partially enlarged view of fig. 30, fig. 32 is a cross-sectional view of the light emitting diode 3 along line I-I' of fig. 30, and fig. 33 is a partially enlarged view of fig. 32.

The led 3 has substantially the same structure as the led 1 or the led 2, and therefore, the led 3 in fig. 30 and 31 has the same name and reference numeral structure as the led 1 or 2 in fig. 1 to 29, and has the same structure, the same material, or the same function, and therefore, the description thereof will be omitted or will not be repeated.

The third insulating layer 180 and the pad electrode in the light emitting diode 1 or the light emitting diode 2 are subjected to two yellow light processes in the preparation process, because of the process problems such as exposure deviation, different distances exist between the pad electrode and the opening part of the adjacent insulating layer, and even the pad electrode may cover the third insulating layer 180, so that the pad electrode 190 has an uneven appearance, and the risk of high void ratio of the light emitting diode in the packaging link is increased. In addition, due to the two photolithography processes, the distance between the third insulating layer 180 and the pad electrode 190 is generally greater than 5 μm due to the line width of the mask, etc., and the etching of the insulating layer or the lateral etching of the etching, etc., thereby reducing the area of the pad electrode 190.

Therefore, as shown in fig. 30 to 33, the third insulating layer 180 and the pad electrode are prepared by the same yellow light process, and self-aligned evaporation of the pad electrode is achieved. The first pad electrode 191 and the adjacent fourth opening OP4 have the same pitch therebetween, and the second pad electrode 192 and the adjacent fifth opening have the same pitch therebetween. Specifically, the first pad electrode 191 has an upper edge 191a distant from the semiconductor laminated layer 120 and a lower edge 191b close to the semiconductor laminated layer 120, and the second pad electrode 192 has an upper edge distant from the semiconductor laminated layer 120 and a lower edge close to the semiconductor laminated layer 120. The lower edge 191b of the first pad electrode 191 and the edge of the fourth opening OP4 have a first maximum horizontal distance D5 therebetween, and the first maximum horizontal distance D5 is less than 5 μm. Due to errors of the metrology tool, etc., a first minimum horizontal distance D6 is provided between the edge of the first pad electrode 191 and the edge of the fourth opening OP4, and the first minimum horizontal distance D6 is 50% to 150% of the first maximum horizontal distance 5. The lower edge 192b of the second pad electrode 192 has a second maximum horizontal distance, which is less than 5 μm, from the edge of the fifth opening OP 5. A second minimum horizontal distance between the edge of the second pad electrode 192 and the edge of the fifth opening OP5 is 50% to 150% of the second maximum horizontal distance.

In an embodiment of the present invention, as shown in fig. 30 to 33, a surface of the first pad electrode 191 and the second pad electrode 192 away from the stack of semiconductor layers 120 is higher than a surface of the third insulating layer 180 away from the stack of semiconductor layers 120.

In an embodiment of the invention, as shown in fig. 30 to 33, the first edge E1 is relatively close to the first pad electrode 191, the third edge E2 is relatively far from the first pad electrode 192, the first edge E1 is parallel to the third edge E2, a midpoint between the first edge E1 and the third edge E3 is made into a parallel virtual line E5 parallel to the first edge E1 and the third edge E3, and the number of the second mesas 1202 adjacent to the first edge E1 is greater than the number of the second mesas 1202 adjacent to the third edge E3. Thus, under the condition of improving current expansion as much as possible, the area of the second pad electrode 192 can be enlarged as much as possible, and the first pad electrode and the second pad electrode are ensured to be equal in area and symmetrical.

In another embodiment of the present invention (not shown), the area of the second surface 121b of the first semiconductor layer 121 exposed by the second mesa 1202 adjacent to the first side E1 is larger than the area of the second surface 121b of the first semiconductor layer 121 exposed by the second mesa 1202 adjacent to the third side E3. The number of second mesas 1202 adjacent to the first side E1 may or may not be the same as the number of second mesas 1202 adjacent to the third side E3.

Fourth embodiment

Fig. 34 is a cross-sectional view of a light emitting diode 4 disclosed in a fourth embodiment of the present invention.

The led 4 has substantially the same structure as the led 1, 2 or 3, and therefore, the led 4 in fig. 34 has the same structure, the same material or the same function as the led 1, 2 or 3 in fig. 1 to 33, which are denoted by the same names and reference numerals, and thus the description thereof will be omitted or repeated.

As shown in fig. 34, in order to increase the current spreading function of the light emitting diode, especially for a high-current product, a metal layer 210 is disposed between the reflective electrode layer 150 and the fourth insulating layer 162, and the metal layer 210 is formed on the reflective electrode layer 140, i.e. on the upper portion R1 of the metal protection layer 152; and the projection of the metal layer 210 in the growth direction of the stack of semiconductor layers 120 is located within the projection of the reflective electrode layer 140. The horizontal distance between the sidewall of the metal layer 210 and the second outer sidewall 1200b or the inner sidewall 1200c of the semiconductor stack 120 is a seventh distance D7, and the seventh distance D7 is greater than the fourth distance D4. The metal layer 210 may be composed of one or more of titanium, platinum, nickel, or gold, which are highly conductive metals.

Claims (17)

1. A light emitting diode comprising:

a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer;

the first mesa is positioned in the edge area of the semiconductor lamination layer and exposes the first surface of the first semiconductor layer;

an insulating layer including a portion formed on the first mesa, the insulating layer including a first insulating layer, a fourth insulating layer, and a second insulating layer stacked in this order, the fourth insulating layer being aluminum oxide, the insulating layer including a sixth opening to expose the first surface of the first semiconductor layer;

the projection of the sixth opening in the growth direction of the semiconductor stacked layer is located in the first mesa, the sixth opening comprises a first section and a second section, the first section and the second section are of a continuous structure, the first section extends along a first edge of the light emitting diode, and the second section extends along a second edge of the light emitting diode.

2. The light-emitting diode according to claim 1, wherein the first insulating layer and the second insulating layer are silicon oxide, and the fourth insulating layer is aluminum oxide.

3. The light-emitting diode according to claim 1, wherein the thickness of the fourth insulating layer is 20 to 150nm, and the thickness of the second insulating layer is larger than that of the fourth insulating layer.

4. The light-emitting diode according to claim 1, further comprising a first pad electrode electrically connected to the first semiconductor layer and a second pad electrode electrically connected to the second semiconductor layer, the light-emitting diode having four corners, corners relatively close to the first pad electrode being first and fourth corners, and corners relatively far from the first pad electrode being second and third corners.

5. The light-emitting diode according to claim 4, wherein a projection of the sixth opening in a growth direction of the semiconductor stack is located at a corner of the light-emitting diode, and an area of the first semiconductor layer exposed by the sixth opening located at the first corner or the fourth corner is smaller than an area of the first semiconductor layer exposed by the sixth opening located at the second corner or the third corner.

6. The light emitting diode of claim 1, the first mesa comprising a first platform and a second platform, the horizontal distance between the first platform inner edge and the edge of the light emitting diode being a first distance, the horizontal distance between the second platform inner edge and the edge of the light emitting diode being a second distance, the first distance being less than the second distance.

7. The light-emitting diode according to claim 6, wherein the first distance is 10 to 30 μm, and the second distance is 20 to 40 μm.

8. The light emitting diode of claim 6, the second platform being L-shaped.

9. A light emitting diode according to claim 6 wherein a projection of said sixth opening in a direction of growth of the stack of semiconductor layers is located within said second platform.

10. The light emitting diode of claim 6, the light emitting diode having four corners, the second platform being located at least on the corners of the light emitting diode.

11. The light emitting diode of claim 1, the first and second segments being different or the same length.

12. The light-emitting diode according to claim 1, further comprising a reflective electrode layer formed on the stack of semiconductor layers, the first insulating layer being between the stack of semiconductor layers and the reflective electrode layer, the fourth insulating layer being formed on the reflective electrode layer, the second insulating layer being formed on the fourth insulating layer.

13. The light-emitting diode according to claim 12, wherein the horizontal distance between the edge of the reflective electrode layer and the edge of the second semiconductor layer is less than 1 to 5 μm.

14. A light emitting diode according to claim 12 further comprising a transparent conductive layer formed on said stack of semiconductor layers, said transparent conductive layer being located between said second semiconductor layer and said first insulating layer, a projection of said transparent conductive layer in a direction of growth of the stack of semiconductor layers being located within a projection of said reflective electrode layer in a direction of growth of the stack of semiconductor layers.

15. The light-emitting diode according to claim 12, further comprising a second mesa located inside the stacked semiconductor layer and exposing a second surface of the first semiconductor layer, wherein the insulating layer includes a portion formed on the second mesa, wherein the insulating layer includes a second opening exposing the second surface of the first semiconductor layer, and wherein the fourth insulating layer and the second insulating layer located on the reflective electrode layer have a portion exposed from the reflective electrode layer through a third opening.

16. The light-emitting diode according to claim 15, further comprising a first connection electrode and a second connection electrode which are formed over the second insulating layer, wherein the first connection electrode is electrically connected to the first semiconductor layer through the second opening, and the second connection electrode is electrically connected to the first semiconductor layer through the third opening.

17. The light-emitting diode according to claim 15, wherein a third included angle is formed between the sixth opening and the first surface of the first semiconductor layer, a second included angle is formed between the third opening and the surface of the reflective electrode layer, and the third included angle is larger than the second included angle.

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