CN113363359A - Flip-chip light emitting diode - Google Patents
Flip-chip light emitting diode Download PDFInfo
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- CN113363359A CN113363359A CN202110642994.7A CN202110642994A CN113363359A CN 113363359 A CN113363359 A CN 113363359A CN 202110642994 A CN202110642994 A CN 202110642994A CN 113363359 A CN113363359 A CN 113363359A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Abstract
The invention discloses a flip-chip light emitting diode, comprising: the light emitting diode comprises a transparent substrate, a first semiconductor layer, a light emitting layer, a second semiconductor layer and a third semiconductor layer; three independent areas are formed; the first region exposes the first semiconductor layer; etching and removing the third semiconductor layer in the second area to expose the second semiconductor layer; etching and removing part of the third semiconductor layer in the third area to expose part of the second semiconductor layer; arranging a first contact electrode on the surface of the first semiconductor layer in the first area, arranging a second contact electrode on the surface of the second semiconductor layer in the second area, and arranging a third contact electrode and a fourth contact electrode on the surfaces of the third semiconductor layer in the third area and the second semiconductor layer; the fourth contact electrode is simultaneously connected with the first semiconductor layer; the first metal welding layer is electrically connected with the first contact electrode, and the second metal welding layer is electrically connected with the second contact electrode and the third contact electrode. The flip light-emitting diode has the advantages of high brightness, strong antistatic capability and the like.
Description
Technical Field
The invention relates to a flip-chip light emitting diode, belonging to the technical field of semiconductor optoelectronic devices.
Background
A Light Emitting Diode (LED) has the advantages of high Light Emitting intensity, high efficiency, small volume, and long service life, and is considered as one of the most potential Light sources. In recent years, LEDs have been widely used in daily life, for example, in the fields of illumination, signal display, backlight, vehicle lights, and large screen display, and these applications also put higher demands on the brightness and light emitting efficiency of LEDs.
The flip-chip light emitting diode has the advantages of high brightness, good heat dissipation, small size of a packaging body and the like, and is particularly suitable for LED display with ultrahigh pixel density. With the increasing demand of technology and consumption, the pixel density of LED display is higher and higher, and the flip-chip light emitting diode gradually becomes the mainstream product of LED display due to good heat dissipation, no need of wire bonding, high reliability and high brightness. However, with the continuous pursuit of high definition display, the size of the flip-chip light emitting diode is smaller and smaller, and the problem that the performance such as antistatic capability and brightness is greatly reduced along with the reduction of the size is increasingly highlighted. The reduction of the antistatic ability is caused by the factors of the reduction of the size of the light emitting diode chip, the increase of the resistance, the reduction of the self capacitance and the like, and the reduction of the performance of the brightness and the like is caused by the fact that in order to enhance the antistatic ability as much as possible, a metal electrode with a large area is required to be arranged to reduce the resistance and increase the capacitance, but the light absorption and light blocking areas of the electrode are increased.
Disclosure of Invention
To solve at least one of the above problems, the present invention provides a flip-chip light emitting diode, which comprises, from bottom to top: the light emitting diode comprises a transparent substrate, a first semiconductor layer, a light emitting layer, a second semiconductor layer and a third semiconductor layer;
etching the third semiconductor layer, the second semiconductor layer and the light emitting layer to form three independent regions; etching to remove the third semiconductor layer, the second semiconductor layer and the light-emitting layer in the first region to expose the first semiconductor layer; etching and removing the third semiconductor layer in the second area to expose the second semiconductor layer; etching and removing part of the third semiconductor layer in the third area to expose part of the second semiconductor layer; a first contact electrode is arranged on the surface of the first semiconductor layer of the first area, a second contact electrode is arranged on the surface of the second semiconductor layer of the second area, and a third contact electrode and a fourth contact electrode are arranged on the surfaces of the third semiconductor layer of the third area and the second semiconductor layer; the fourth contact electrode is simultaneously connected with the first semiconductor layer;
depositing an insulating protective layer on the surface of the structure, and forming through holes above the first contact electrode, the second contact electrode and the third contact electrode; and arranging a first metal welding layer and a second metal welding layer on the surface of the insulating protection layer, wherein the first metal welding layer is electrically connected with the first contact electrode through a through hole, and the second metal welding layer is electrically connected with the second contact electrode and the third contact electrode through a through hole.
Preferably, a barrier layer is further arranged between the second semiconductor layer and the third semiconductor layer of the third region.
Preferably, the first semiconductor layer and the third semiconductor layer are semiconductor layers of a first conductivity type, the second semiconductor layer and the barrier layer are semiconductor layers of a second conductivity type, and the first conductivity type and the second conductivity type are opposite.
Preferably, the semiconductor layer of the first conductivity type is n-type or p-type.
Preferably, a contact layer is further arranged between the barrier layer and the second semiconductor layer, has the same conductivity type as the second semiconductor layer, and forms ohmic contact with the second contact electrode and the fourth contact electrode.
Preferably, the third semiconductor layer and the barrier layer are formed by epitaxial growth such as MOCVD.
Preferably, the third semiconductor layer is formed on the surface of the second semiconductor layer of the third region by a diffusion doping technique.
Preferably, the insulating protective layer is of a single-layer or multi-layer structure and is made of SiO2、SiNx、Al2O3、TiO2、MgF2And the like.
Preferably, the insulating protective layer is a DBR structure and is formed by alternately stacking high-refractive-index transparent dielectric layers and low-refractive-index transparent dielectric layers, wherein the low-refractive-index material is SiO2、MgF2Or Al2O3(ii) a The high refractive index material being TiO2Or Ta2O5。
Preferably, the flip-chip light emitting diode radiates red light.
The invention has the advantages that when the chip is subjected to reverse electrostatic impact, the current generated by electrostatic discharge passes through the pn junction formed by the third semiconductor layer of the third region and the barrier layer or the second semiconductor layer, so that the light-emitting layer of the second region is protected from electrostatic impact, and meanwhile, the electrode area of the second region can be greatly reduced because the second region does not need to consider the antistatic capability, thereby improving the light-emitting efficiency of the chip.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
While the invention will be described in connection with certain exemplary implementations and methods of use, it will be understood by those skilled in the art that it is not intended to limit the invention to these embodiments. On the contrary, the intent is to cover all alternatives, modifications and equivalents as included within the spirit and scope of the invention as defined by the appended claims.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. Furthermore, the drawing figures are for a descriptive summary and are not drawn to scale.
Fig. 1 is a schematic cross-sectional view of a flip-chip light emitting diode suitable for use in the first embodiment of the present invention.
Fig. 2 is a schematic cross-sectional view of another flip-chip light emitting diode suitable for use in the first embodiment of the invention.
Fig. 3 to 10 are schematic views of a flip-chip light emitting diode manufacturing process according to a first embodiment of the present invention.
Fig. 11 is a schematic cross-sectional view of another flip-chip light emitting diode suitable for use in the second embodiment of the invention.
Fig. 12 is a schematic cross-sectional view of another flip-chip light emitting diode suitable for use in the third embodiment of the present invention.
In the figure: 001: a transparent substrate; 002: a first semiconductor layer; 003: a light emitting layer; 004: second semiconductor layer 0041: a contact layer; 005: a barrier layer; 006: a third semiconductor layer; 0071: a first contact electrode; 0072: a second contact electrode; 0073: a third contact electrode; 0074: a fourth contact electrode; 008: an insulating protective layer; 0091: a first metal bonding layer; 0092: and a second metal welding layer. I: a first region; II: a second region; III: and a third region.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
The following detailed description of the embodiments of the present invention will be provided with reference to the drawings and examples, so that how to apply the technical means to solve the technical problems and achieve the technical effects can be fully understood and implemented.
Example one
Fig. 1 illustrates a flip chip light emitting diode having a transparent substrate 001, a first semiconductor layer 002, a light emitting layer 003, a second semiconductor layer 004, and a third semiconductor layer 006, the third semiconductor layer 006 is etched, and the second semiconductor layer 004 and the light emitting layer 003 form three regions independent of each other; etching away the third semiconductor layer 006, the second semiconductor layer 004, and the light-emitting layer 003 in the first region i to expose the first semiconductor layer 002; etching to remove the third semiconductor layer 006 in the second region ii to expose the second semiconductor layer 004; etching to remove part of the third semiconductor layer 006 in the third region iii to expose part of the second semiconductor layer 004; a first contact electrode 0071 is arranged on the surface of the first semiconductor layer 002 in the first region I, a second contact electrode 0072 is arranged on the surface of the second semiconductor layer 004 in the second region II, a third contact electrode 0073 and a fourth contact electrode 0074 are arranged on the surfaces of the third semiconductor layer 006 and the second semiconductor layer 004 in the third region III; fourth contact electrode 0074 connects first semiconductor layer 002 simultaneously, deposits insulating protective layer 008 on above-mentioned structure surface to corresponding first contact electrode 0071, second contact electrode 0072, third contact electrode 0073 top forms the through-hole, set up first metal welding layer 0091 and second metal welding layer 0092 on insulating protective layer surface, wherein first metal welding layer 0091 is connected with first contact electrode 0071 electricity through the through-hole, second metal welding layer 0092 is connected with second contact electrode 0072 and third contact electrode 0073 electricity through the through-hole.
The transparent substrate 001 may be made of sapphire material, glass, and GaP substrate, in this embodiment, it is preferable that the transparent substrate 001 is made of sapphire material, the thickness of the sapphire material is 30-100 micrometers, the first semiconductor layer 002 is made of p-type GaP, and the second semiconductor layer 004 is made of n-type AlGaInP. In some embodiments, it is preferable that the barrier layer 005 is included between the second semiconductor layer 004 and the third semiconductor layer 006 in the third region iii, as shown in fig. 2. The barrier layer 005 may prevent the dopant of the third semiconductor 006 from diffusing into the second semiconductor layer 004. The barrier layer 005 is made of n-type GaAs, the third semiconductor layer 006 is made of p-type GaAs, and the first, third, and fourth contact electrodes 0071, 0073, and 0074 are formed on the substrateThe second contact electrode 0072 is made of a metal electrode made of a combination of materials such as BeAu and Au, and the second contact electrode is made of a combination of materials such as Au, Ge and Ni; in some embodiments, the insulating protection layer 008 is a single-layer or multi-layer structure made of SiO2、SiNx、Al2O3、TiO2、MgF2And the like. In some embodiments, the insulating protection layer 008 is a DBR structure formed by alternately stacking high and low refractive index transparent dielectric layers, wherein the low refractive index material is SiO2、MgF2Or Al2O3(ii) a The high refractive index material being TiO2Or Ta2O5. The materials of the first metal welding layer 0091 and the second metal welding layer 0092 are one or a combination of more of materials such as Ti, Al, Ni, Pt, Au and the like.
In the embodiment of the invention, when the chip is subjected to reverse electrostatic impact, the current generated by electrostatic discharge passes through the pn junction formed by the third semiconductor layer of the third region and the barrier layer or the second semiconductor layer, so that the light-emitting layer of the second region is protected from electrostatic impact.
Fig. 3 to 10 illustrate a manufacturing process of the flip-chip light emitting diode according to the present embodiment, which includes the following steps:
first, as shown in fig. 3, a flip-chip light emitting diode wafer is provided, in which a first semiconductor layer 002 is bonded to a sapphire transparent substrate 001, and a surface of the first semiconductor layer 002 facing away from the sapphire transparent substrate 001 sequentially includes a light emitting layer 003, a second semiconductor layer 004, a barrier layer 005, and a third semiconductor layer 006. In this embodiment, the first semiconductor layer 002 is a p-type GaP layer, and the thickness of the p-type GaP of the first semiconductor layer is preferably 6 to 9 μm; for example 8 μm; the second semiconductor layer 004 is an n-type AlGaInP layer, and the thickness of the n-type AlGaInP layer is 2-4 μm, such as 3 μm; the blocking layer 005 is n-type GaAs, and the thickness of the n-type GaAs layer is 100-300 nm, for example 200 nm; the third semiconductor layer 004 layer is a p-type GaAs layer, and the thickness of the p-type GaAs layer is 300-800 nm, such as 500-600 nm.
Next, as shown in fig. 4, a portion of the third semiconductor layer 006 and the barrier layer 005 is etched.
Next, as shown in fig. 5, the second semiconductor layer 004 and the light-emitting layer 003 are partially etched to form three regions independent of each other, and the first semiconductor layer 002 is partially exposed in the first region; the second region exposes the second semiconductor layer 004; the third region exposes a portion of the second semiconductor layer 004 and the third semiconductor layer 006.
Then, as shown in fig. 6, a first contact electrode 0071 is disposed on the surface of the first semiconductor layer 002 in the first region i, a second contact electrode 0072 is disposed on the surface of the second semiconductor layer 004 in the second region ii, and a third contact electrode 0073 and a fourth contact electrode 0074 are disposed on the surfaces of the third semiconductor layer 006 and the second semiconductor layer 004 in the third region iii; the fourth contact electrode 0074 is simultaneously connected to the first semiconductor layer 002.
Then, as shown in fig. 7, the edges of the first semiconductor layer 002 are etched to form dicing streets between the adjacent chips.
Then, as shown in fig. 8, an insulating protection layer 008 is deposited on the chip structure, and in this embodiment, the specific structure of the insulating protection layer 008 includes: firstly, a layer of SiO is deposited by adopting PECVD technology2The film is fully coated by using good coverage of PECVD technology, and then the plasma-assisted evaporation technology is adopted to coat the SiO film2Depositing DBR structure on the film, wherein the DBR structure is TiO in the embodiment2And SiO2An alternating stack configuration.
Then, as shown in fig. 9, through holes are etched on the insulating protection layer 008 corresponding to the first, second, and third contact electrodes 0071, 0072, and 0073.
Finally, as shown in fig. 10, a first metal bonding layer 0091 and a second metal bonding layer 0092 are formed on the chip structure, wherein the first metal bonding layer 0091 is electrically connected to the first contact electrode 0071 through a through hole, and the second metal bonding layer 0092 is electrically connected to the second contact electrode 0072 and the third contact electrode 0073 through a through hole.
Example two
Fig. 11 illustrates another flip chip light emitting diode having a transparent substrate 001, a first semiconductor layer 002, a light emitting layer 003, a second semiconductor layer 004, a contact layer 0041, a barrier layer 005, and a third semiconductor layer 006, the third semiconductor layer 006 is etched, and the barrier layer 005, the contact layer 0041, the second semiconductor layer 004, and the light emitting layer 003 are formed in three regions independent of each other; etching to remove the third semiconductor layer 006, the barrier layer 005, the contact layer 0041, the second semiconductor layer 004, and the light-emitting layer 003 in the first region i, thereby exposing the first semiconductor layer 002; etching to remove the third semiconductor layer 006, the barrier layer 005 and a portion of the contact layer 0041 in the second region ii, and exposing the second semiconductor layer 004 and the contact layer 0041; etching to remove part of the third semiconductor layer and the second semiconductor layer 006 in the third region iii, so as to expose part of the contact layer 0041; a first contact electrode 0071 is arranged on the surface of the first semiconductor layer 002 of the first region I, a second contact electrode 0072 is arranged on the surface of the contact layer 0041 of the second region II, a third contact electrode 0073 and a fourth contact electrode 0074 are arranged on the surfaces of the third semiconductor layer 006 and the contact layer 0041 of the third region III; fourth contact electrode 0074 connects first semiconductor layer 002 simultaneously, deposits insulating protective layer 008 on above-mentioned structure surface to corresponding first contact electrode 0071, second contact electrode 0072, third contact electrode 0073 top forms the through-hole, set up first metal welding layer 0091 and second metal welding layer 0092 on insulating protective layer surface, wherein first metal welding layer 0091 is connected with first contact electrode 0071 electricity through the through-hole, second metal welding layer 0092 is connected with second contact electrode 0072 and third contact electrode 0073 electricity through the through-hole. The fourth contact electrode 0074 is also electrically connected to the first semiconductor layer 002 through the sidewall of the third region
In this embodiment, the transparent substrate 001 is a sapphire substrate, the first semiconductor layer 002 is p-type GaP, the second semiconductor layer 004 is n-type AlGaInP, the contact layer 0041 is n-type GaAs, and the second contact electrode 0072 and the fourth contact electrode 0074 form ohmic contacts with the contact layer 0041. The blocking layer 005 is n-type GaInP, and the blocking layer 005 can prevent the dopant of the third semiconductor 006 from diffusingIs scattered into the second semiconductor layer 004. The third semiconductor layer 006 is p-type GaInP, the first contact electrode 0071, the third contact electrode 0073, and the fourth contact electrode 0074 are metal electrodes made of a combination of materials such as beru and Au, and the second contact electrode 0072 is a combination of materials such as Au, Ge, and Ni, and in some embodiments, the insulating protection layer 008 is a single-layer or multi-layer structure made of SiO2、SiNx、Al2O3、TiO2、MgF2And the like. In some embodiments, the insulating protection layer 008 is a DBR structure formed by alternately stacking high and low refractive index transparent dielectric layers, wherein the low refractive index material is SiO2、MgF2Or Al2O3(ii) a The high refractive index material being TiO2Or Ta2O5. The materials of the first metal welding layer 0091 and the second metal welding layer 0092 are one or a combination of more of materials such as Ti, Al, Ni, Pt, Au and the like.
EXAMPLE III
Fig. 3 illustrates another flip chip light emitting diode of the present invention having a transparent substrate 001, a first semiconductor layer 002, a light emitting layer 003, a second semiconductor layer 004, and a third semiconductor layer 006; the third semiconductor layer 006 in this embodiment is formed on the upper surface of the second semiconductor layer 004 by a diffusion technique. Etching the third semiconductor layer 006 to form three regions independent of each other in the second semiconductor layer 004 and the light-emitting layer 003; etching away the third semiconductor layer 006, the second semiconductor layer 004, and the light-emitting layer 003 in the first region i to expose the first semiconductor layer 002; etching to remove the third semiconductor layer 006 in the second region ii to expose the second semiconductor layer 004; etching to remove part of the third semiconductor layer 006 in the third region iii to expose part of the second semiconductor layer 004; a first contact electrode 0071 is arranged on the surface of the first semiconductor layer 002 in the first region I, a second contact electrode 0072 is arranged on the surface of the second semiconductor layer 004 in the second region II, a third contact electrode 0073 and a fourth contact electrode 0074 are arranged on the surfaces of the third semiconductor layer 006 and the second semiconductor layer 004 in the third region III; fourth contact electrode 0074 connects first semiconductor layer 002 simultaneously, deposits insulating protective layer 008 on above-mentioned structure surface to corresponding first contact electrode 0071, second contact electrode 0072, third contact electrode 0073 top forms the through-hole, set up first metal welding layer 0091 and second metal welding layer 0092 on insulating protective layer surface, wherein first metal welding layer 0091 is connected with first contact electrode 0071 electricity through the through-hole, second metal welding layer 0092 is connected with second contact electrode 0072 and third contact electrode 0073 electricity through the through-hole.
In this embodiment, the transparent substrate 001 is a sapphire substrate, the first semiconductor layer 002 is p-type GaP, the second semiconductor layer 004 is n-type AlGaInP, the third semiconductor layer 006 is p-type AlGaInP, the first contact electrode 0071, the third contact electrode 0073 and the fourth contact electrode 0074 are metal electrodes made of combinations of materials such as BeAu and Au, the second contact electrode 0072 is made of combinations of materials such as Au, Ge and Ni, the insulating protection layer 008 is a DBR structure and formed by overlapping and stacking materials such as SiO2 and TiO2, and the first metal welding layer 0091 and the second metal welding layer 0092 are made of combinations of one or more of materials such as Ti, Al, Ni, Pt and Au.
It should be noted that the above-mentioned embodiments are only for illustrating the present invention, and not for limiting the present invention, and those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention, so that all equivalent technical solutions also belong to the scope of the present invention, and the scope of the present invention should be defined by the claims.
Claims (10)
1. A flip-chip light emitting diode, the structure of which comprises from bottom to top:
the light emitting diode comprises a transparent substrate, a first semiconductor layer, a light emitting layer, a second semiconductor layer and a third semiconductor layer;
etching the third semiconductor layer, the second semiconductor layer and the light emitting layer to form three independent regions;
etching to remove the third semiconductor layer, the second semiconductor layer and the light-emitting layer in the first region to expose the first semiconductor layer;
etching and removing the third semiconductor layer in the second area to expose the second semiconductor layer;
etching and removing part of the third semiconductor layer in the third area to expose part of the second semiconductor layer;
a first contact electrode is arranged on the surface of the first semiconductor layer of the first area, a second contact electrode is arranged on the surface of the second semiconductor layer of the second area, and a third contact electrode and a fourth contact electrode are respectively arranged on the surfaces of the third semiconductor layer and the second semiconductor layer of the third area;
the fourth contact electrode is simultaneously connected with the first semiconductor layer of the third area through the side wall;
depositing an insulating protective layer on the surface of the structure, and forming through holes above the first contact electrode, the second contact electrode and the third contact electrode;
and arranging a first metal welding layer and a second metal welding layer on the surface of the insulating protection layer, wherein the first metal welding layer is electrically connected with the first contact electrode through a through hole, and the second metal welding layer is electrically connected with the second contact electrode and the third contact electrode through a through hole.
2. A flip chip light emitting diode according to claim 1 wherein: and a barrier layer is arranged between the second semiconductor layer and the third semiconductor layer of the third region.
3. A flip chip light emitting diode according to claim 2 wherein: the first semiconductor layer and the third semiconductor layer are semiconductor layers of a first conductivity type, the second semiconductor layer and the barrier layer are semiconductor layers of a second conductivity type, and the first conductivity type and the second conductivity type are opposite electrical types.
4. A flip chip light emitting diode according to claim 3 wherein: the semiconductor layer of the first conductivity type is either n-type or p-type.
5. A flip chip light emitting diode according to claim 2 wherein: and a contact layer is also arranged between the barrier layer and the second semiconductor layer, has the same conductivity type as the second semiconductor layer, and forms ohmic contact with the second contact electrode and the fourth contact electrode.
6. A flip chip light emitting diode according to claim 2 wherein: the third semiconductor layer and the barrier layer are grown and formed by an epitaxial technology such as MOCVD.
7. A flip chip light emitting diode according to claim 1 wherein: the third semiconductor layer is formed on the surface of the second semiconductor layer of the second area through a diffusion doping technology.
8. A flip chip light emitting diode according to claim 1 wherein: the insulating protective layer is of a single-layer or multi-layer structure and is made of SiO2、SiNx、Al2O3、TiO2、MgF2And the like.
9. A flip chip light emitting diode according to claim 1 wherein: the insulation protective layer is of a DBR structure and is formed by alternately stacking high-refractive-index and low-refractive-index transparent dielectric layers, wherein the low-refractive-index material is SiO2、MgF2Or Al2O3(ii) a The high refractive index material being TiO2Or Ta2O5。
10. A flip chip light emitting diode according to claim 1 wherein: the flip-chip light emitting diode radiates red light.
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