CN111381086A - Method and device for analyzing signal overshoot - Google Patents
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- CN111381086A CN111381086A CN201811643063.3A CN201811643063A CN111381086A CN 111381086 A CN111381086 A CN 111381086A CN 201811643063 A CN201811643063 A CN 201811643063A CN 111381086 A CN111381086 A CN 111381086A
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- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
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Abstract
The invention is applicable to the technical field of electronic circuits, and provides a method and a device for analyzing signal overshoot. The method for analyzing the signal overshoot comprises the following steps: drawing a voltage waveform graph of the signal; acquiring a capacitance value between a chip port and a ground wire, and acquiring the resonant frequency of a signal according to the voltage waveform diagram; calculating an inductance value when the chip port is in short circuit with the ground wire; an overshoot current value is calculated from the inductance value. The parameters of the signal overshoot are analyzed in a detailed system, an effective analysis method is provided for the signal overshoot, the parameters of the buffer circuit are configured according to the parameters of the overshoot, and the influence of the signal overshoot on the functions of the chip is avoided.
Description
Technical Field
The invention belongs to the technical field of electronic circuits, and particularly relates to a method and a device for analyzing signal overshoot.
Background
Overshoot is the first peak or valley exceeding the set voltage-for a rising edge the highest voltage and for a falling edge the lowest voltage, undershoot the next valley or peak. Excessive overshoot can cause the protection diodes to operate, leading to premature failure, and excessive undershoot can cause false clock or data errors.
The switch power supply effectively inhibits output overshoot and is an indispensable functional part of the power supply product, in the actual research and development or use process, the switch power supply can be applied to various output devices, the climbing time preset in the control chip port cannot meet the requirements of various output devices on the output overshoot and the climbing time, the universality and compatibility of the switch power supply are greatly restricted, and in addition, some switch power supply control chip ports do not have built-in soft start functions, so that the safety and reliability of the switch power supply product are further reduced. However, there is no systematic analysis method for analyzing the overshoot parameter when the signal overshoots.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method and an apparatus for analyzing signal overshoot, so as to solve the problem that the signal overshoot seriously affects the chip function, and a systematic analysis method is lacking to analyze an overshoot parameter during the signal overshoot.
A first aspect of an embodiment of the present invention provides a method for analyzing a signal overshoot, where the method for analyzing a signal overshoot includes:
drawing a voltage waveform graph of the signal;
acquiring a capacitance value between a chip port and a ground wire according to the oscillogram, and acquiring the resonance frequency of a signal;
calculating an inductance value when the chip port is in short circuit with the ground wire;
calculating an overshoot current value according to the inductance value;
and configuring parameters of a buffer circuit according to the overshoot current value.
In one embodiment, the step of calculating the inductance value when the chip port is shorted to the ground line specifically includes:
calculating the inductance value by the following formula:
L＝(T/2π)^2/C
l is an inductance value when the chip port is in short circuit with the ground wire, T is a resonance period of a signal, and C is a capacitance value between the chip port and the ground wire.
In one embodiment, the calculating the overshoot current value according to the inductance value specifically includes:
Im＝UT/2πL
wherein Im is an overshoot current value, U is an overshoot voltage value, L is an inductance value when the chip port is short-circuited with the ground line, and T is a resonance period of the signal.
In one embodiment, the calculating the overshoot current value according to the inductance value specifically includes:
Im＝(K/L)t^2/2
wherein Im is an overshoot current value, K is a straight slope, L is an inductance value when the chip port is in short circuit with the ground wire, and T is T/4.
A second aspect of an embodiment of the present invention provides an apparatus for analyzing signal overshoot, including:
the oscilloscope is used for drawing a voltage waveform diagram of the signal;
the data acquisition unit is used for acquiring a capacitance value between a chip port and a ground wire according to the oscillogram and acquiring the resonance frequency of a signal;
the first calculation unit is used for calculating the inductance value when the chip port is short-circuited with the ground wire;
the second calculation unit is used for calculating an overshoot current value according to the inductance value;
and the parameter configuration unit is used for configuring parameters of the buffer circuit according to the overshoot current value.
In one embodiment, the first computing unit includes:
calculating the inductance value by the following formula:
L＝(T/2π)^2/C
l is an inductance value when the chip port is in short circuit with the ground wire, T is a resonance period of a signal, and C is a capacitance value between the chip port and the ground wire.
In one embodiment, the second calculation unit includes:
calculating the overshoot current value by the following formula:
Im＝UT/2πL
wherein Im is an overshoot current value, U is an overshoot voltage value, L is an inductance value when the chip port is short-circuited with the ground line, and T is a resonance period of the signal.
In one embodiment, the second calculating unit includes:
calculating the overshoot current value by the following formula:
Im＝(K/L)t^2/2
wherein Im is an overshoot current value, K is a straight slope, L is an inductance value when the chip port is in short circuit with the ground wire, and T is T/4.
A third aspect of the embodiments of the present invention provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the steps of the method when executing the computer program.
A fourth aspect of embodiments of the present invention provides a computer-readable storage medium storing a computer program which, when executed by a processor, implements the steps of the above-described method.
The embodiment of the invention provides a method and a device for analyzing signal overshoot, which have the following beneficial effects:
according to the embodiment of the invention, a voltage waveform diagram of a signal is drawn through an oscilloscope, a capacitance value between a chip port and a ground wire is obtained according to the waveform diagram, a resonance frequency of the signal is obtained, an inductance value when the chip port is in short circuit with the ground wire is calculated, and an overshoot current value is calculated according to the inductance value. The parameters of the signal overshoot are analyzed in a detailed system, an effective analysis method is provided for the signal overshoot, the parameters of the buffer circuit are configured according to the parameters of the overshoot, and the influence of the signal overshoot on the functions of the chip is avoided.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a flowchart illustrating an implementation of a method for analyzing signal overshoot according to an embodiment of the present invention;
fig. 2 is a block diagram of an apparatus for analyzing signal overshoot according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a terminal device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In the embodiment of the present invention, the main execution body of the process is the terminal device of the signal overshoot analysis method, the terminal device includes a server, a computer device, a tablet computer, a smart phone, a router, an exchange and other terminal devices with local storage capability, and the obtained data of the signal overshoot is stored through a local storage module, so that an administrator can perform offline acquisition. Fig. 1 shows a flowchart of an implementation of a method for analyzing signal overshoot according to a first embodiment of the present invention, which is detailed as follows:
in S101, a voltage waveform diagram of the signal is plotted.
In the embodiment, a voltage waveform diagram of the signal at the time of overshoot can be detected by an oscilloscope, and relevant data at the time of signal overshoot can be acquired through the voltage waveform diagram. Overshoot refers to the first peak or valley exceeding a set voltage, the highest voltage for a rising edge, and the lowest voltage for a falling edge. Generally, a signal overshoot is an oscillation within a period, and during signal transmission, the overshoot is often accompanied by voltage ringing, or the overshoot is a part of the voltage ringing, and a first peak voltage generated by the voltage ringing is the overshoot. Therefore, in the actual drawing process, the voltage waveform diagram at least comprises the voltage waveforms of the signals in the periods of the highest voltage and the lowest voltage, and relevant data during signal overshoot can be effectively acquired by drawing the voltage waveform diagram of the signals, so that the signal overshoot can be effectively analyzed in the following process.
In S102, a capacitance value between the chip port and the ground is obtained, and the resonant frequency and the overshoot voltage value of the signal are obtained according to the waveform diagram.
After the voltage waveform diagram is drawn, data related to signals such as an overshoot voltage value, a resonant frequency or a resonant period can be obtained from the voltage waveform diagram. The overshoot voltage value is the highest voltage value at the rising edge or the lowest voltage value at the falling edge, and the resonance frequency and the resonance period are the frequency and the period of the voltage waveform, which are determined by the frequency and the period of the signal. Meanwhile, the capacitance value between the chip port and the ground wire is measured through the electronic equipment, at this time, it is assumed that the wire length of the chip port is the same as that of the ground wire, and the capacitance value between the chip port and the ground wire is a relatively stable value.
In S103, an inductance value when the chip port is shorted to the ground is calculated.
It is understood that the inductance value when the chip port is shorted to the ground is calculated based on the capacitance between the chip port and the ground, and includes:
calculating the inductance value by the following formula:
L＝(T/2π)^2/C
l is an inductance value when the chip port is in short circuit with the ground wire, T is a resonance period of a signal, and C is a capacitance value between the chip port and the ground wire.
Specifically, the resonant frequency of the signal is F, and the calculation formula of the resonant frequency of the circuit is as follows:
F＝1/T＝1/2π√LC；
further obtained by the formula:
L＝(T/2π)^2/C
in S104, an overshoot current value is calculated from the inductance value.
It is understood that the overshoot current value refers to the instantaneous current from high level of signal to ground or the instantaneous current from low level of signal to ground, and can be calculated by the calculation formula of voltage and inductance. Generally, the voltage ringing is a sinusoidal waveform with gradually decreasing amplitude, and for the analysis of the waveform, based on the inductance value when the chip port is shorted to the ground, two calculation schemes are provided in this embodiment.
In the present embodiment, the calculation is directly based on the sine wave, and thus, the calculated overshoot current value is specifically calculated by the following formula:
Im＝UT/2πL
wherein Im is an overshoot current value, U is an overshoot voltage value, L is an inductance value when the chip port is short-circuited with the ground line, and T is a resonance period of the signal.
The specific derivation process of the above formula is:
the calculation formula of the voltage and the inductance can be obtained as follows:
u is ImXL; wherein XL is an inductive reactance value;
wherein XL ═ ω L; wherein ω is the angular velocity;
wherein, the angular velocity calculation formula can obtain: ω 2 pi F2 pi/T;
from the above formula, one can obtain: and Im is UT/2 pi L.
In the present embodiment, the voltage waveform may be calculated by approximating a triangle, and the values from the minimum peak to the 0 potential and from the 0 potential to the maximum peak are approximated as straight lines, whereby the overshoot current value is calculated specifically by the following formula:
Im＝(K/L)t^2/2
wherein Im is an overshoot current value, K is a linear slope, L is an inductance value when the chip port is in short circuit with the ground wire, T is T/4, and T is a resonance period of the signal.
The specific derivation process of the above formula is:
according to the voltage calculation formula of the inductor: u ═ Ldi/dt;
in S105, parameters of the buffer circuit are configured according to the overshoot current value.
In this embodiment, the buffer circuit is an RC circuit connected in series on a line connected to a chip port, and the resistor is also connected in series with the capacitor, and parameters of the buffer circuit include a resistance value of the resistor in the RC circuit and a capacitance value of the capacitor.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
Fig. 2 is a block diagram illustrating a signal overshoot analysis apparatus according to an embodiment of the present invention, where the signal overshoot analysis apparatus includes units for performing the steps in the corresponding embodiment of fig. 1. Please refer to fig. 1 for related descriptions of embodiments. For convenience of explanation, only the portions related to the present embodiment are shown.
Referring to fig. 2, the apparatus for analyzing signal overshoot includes:
an oscilloscope 21 for drawing a voltage waveform diagram of a signal;
the data acquisition unit 22 is configured to acquire a capacitance value between a chip port and a ground line according to the oscillogram, and acquire a resonant frequency of a signal;
the first calculating unit 23 is configured to calculate an inductance value when the chip port is short-circuited with the ground line;
a second calculation unit 24 for calculating an overshoot current value according to the inductance value;
and a parameter configuration unit 25, configured to configure parameters of the buffer circuit according to the overshoot current value.
Alternatively, the first calculation unit 23 calculates the inductance value by the following formula:
L＝(T/2π)^2/C
l is an inductance value when the chip port is in short circuit with the ground wire, T is a resonance period of a signal, and C is a capacitance value between the chip port and the ground wire.
Alternatively, the second calculation unit 24 calculates the overshoot current value by the following formula:
Im＝UT/2πL
wherein Im is an overshoot current value, U is an overshoot voltage value, L is an inductance value when the chip port is short-circuited with the ground line, and T is a resonance period of the signal.
Alternatively, the second calculation unit 24 calculates the overshoot current value by the following formula:
Im＝(K/L)t^2/2
wherein Im is an overshoot current value, K is a straight slope, L is an inductance value when the chip port is in short circuit with the ground wire, and T is T/4.
Fig. 3 is a schematic diagram of a terminal device according to another embodiment of the present invention. As shown in fig. 3, the terminal device 3 of this embodiment includes: a processor 30, a memory 31 and a computer program 32 stored in said memory 31 and executable on said processor 30. The processor 30, when executing the computer program 32, implements the steps in the above-described embodiments of the method for analyzing signal overshoot, for example, S101 to S104 shown in fig. 1.
Illustratively, the computer program 32 may be divided into one or more units, which are stored in the memory 31 and executed by the processor 30 to accomplish the present invention. The one or more units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program 32 in the terminal device 3. For example, the computer program 32 may be divided into the oscilloscope 21, the data acquisition unit 22, the first calculation unit 23, and the second calculation unit 24, and the specific functions of each unit are as follows:
an oscilloscope 21 for drawing a voltage waveform diagram of a signal;
the data acquisition unit 22 is configured to acquire a capacitance value between a chip port and a ground line according to the oscillogram, and acquire a resonant frequency of a signal;
the first calculating unit 23 is configured to calculate an inductance value when the chip port is short-circuited with the ground line;
a second calculation unit 24 for calculating an overshoot current value according to the inductance value;
and a parameter configuration unit 25, configured to configure parameters of the buffer circuit according to the overshoot current value.
The terminal device 3 may be a desktop computer, a notebook, a palm computer, a cloud server, or other computing devices. The terminal device may include, but is not limited to, a processor 30, a memory 31. It will be understood by those skilled in the art that fig. 3 is only an example of the terminal device 3, and does not constitute a limitation to the terminal device 3, and may include more or less components than those shown, or combine some components, or different components, for example, the terminal device may also include an input-output device, a network access device, a bus, etc.
The Processor 30 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 31 may be an internal storage unit of the terminal device 3, such as a hard disk or a memory of the terminal device 3. The memory 31 may also be an external storage device of the terminal device 3, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are provided on the terminal device 3. Further, the memory 31 may also include both an internal storage unit and an external storage device of the terminal device 3. The memory 31 is used for storing the computer program and other programs and data required by the terminal device. The memory 31 may also be used to temporarily store data that has been output or is to be output.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.
Claims (10)
1. A method for analyzing signal overshoot, comprising:
drawing a voltage waveform graph of the signal;
acquiring a capacitance value between a chip port and a ground wire, and acquiring the resonant frequency of a signal according to the voltage waveform diagram;
calculating an inductance value when the chip port is in short circuit with the ground wire;
calculating an overshoot current value according to the inductance value;
and configuring parameters of a buffer circuit according to the overshoot current value.
2. The method for analyzing signal overshoot according to claim 1, wherein the calculating the inductance value when the chip port is shorted to the ground line comprises:
calculating the inductance value by the following formula:
L＝(T/2π)^2/C
l is an inductance value when the chip port is in short circuit with the ground wire, T is a resonance period of a signal, and C is a capacitance value between the chip port and the ground wire.
3. The method for analyzing signal overshoot according to claim 1, wherein the calculating an overshoot current value according to the inductance value specifically comprises:
Im＝UT/2πL
wherein Im is an overshoot current value, U is an overshoot voltage value, L is an inductance value when the chip port is short-circuited with the ground line, and T is a resonance period of the signal.
4. The method for analyzing signal overshoot according to claim 1, wherein the calculating an overshoot current value according to the inductance value specifically comprises:
Im＝(K/L)t^2/2
wherein Im is an overshoot current value, K is a straight slope, L is an inductance value when the chip port is in short circuit with the ground wire, and T is T/4.
5. An apparatus for analyzing signal overshoot, comprising:
the oscilloscope is used for drawing a voltage waveform diagram of the signal;
the data acquisition unit is used for acquiring a capacitance value between a chip port and a ground wire according to the oscillogram and acquiring the resonance frequency of a signal;
the first calculation unit is used for calculating the inductance value when the chip port is short-circuited with the ground wire;
the second calculation unit is used for calculating an overshoot current value according to the inductance value;
and the parameter configuration unit is used for configuring parameters of the buffer circuit according to the overshoot current value.
6. The apparatus for analyzing signal overshoot according to claim 5, characterized in that the first calculation unit comprises:
calculating the inductance value by the following formula:
L＝(T/2π)^2/C
l is an inductance value when the chip port is in short circuit with the ground wire, T is a resonance period of a signal, and C is a capacitance value between the chip port and the ground wire.
7. The apparatus for analyzing signal overshoot according to claim 5, wherein the second calculation unit comprises:
calculating the overshoot current value by the following formula:
Im＝UT/2πL
wherein Im is an overshoot current value, U is an overshoot voltage value, L is an inductance value when the chip port is short-circuited with the ground line, and T is a resonance period of the signal.
8. The apparatus for analyzing signal overshoot according to claim 5, wherein the second calculation unit comprises:
calculating the overshoot current value by the following formula:
Im＝(K/L)t^2/2
wherein Im is an overshoot current value, K is a straight slope, L is an inductance value when the chip port is in short circuit with the ground wire, and T is T/4.
9. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 4 when executing the computer program.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 4.
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Cited By (1)
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| CN115623466A (en) * | 2022-12-19 | 2023-01-17 | 北京紫光青藤微系统有限公司 | Method and device for controlling power tube, electronic equipment and storage medium |
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Application publication date: 20200707 |