CN116184258A - A line detection method, device, equipment and storage medium - Google Patents

Abstract

The present application provides a line detection method, device, equipment, and storage medium. The method includes: receiving a line detection instruction, the line detection instruction carrying the line identification of the line to be detected; Obtaining standard line information from a line design table, the line design table storing line design information in the process of designing the line to be detected; detecting the line to be detected according to the standard line information and the line identification to be detected, A line detection result of the line to be detected is obtained. Thus, the line to be tested is detected through the line design information in the process of designing the line to be tested, and automatic detection of the line to be tested is realized without manual participation, with high detection efficiency and high detection accuracy.

Description

A line detection method, device, equipment and storage medium

technical field

The present application relates to the field of electronic circuits, and in particular to a circuit detection method, device, equipment and storage medium.

Background technique

Due to the many and complicated circuits involved in electronic equipment, in the process of drawing circuits with drawing software, the circuit diagram often appears across pages. Due to the situation of cross-page in the circuit diagram, it is easy for the engineer to reverse the connection of the circuit in the process of connecting the circuit according to the circuit diagram. The reverse connection of the circuit will cause the function involved in the circuit to be unable to be realized. Therefore, it is necessary to check the completed circuit. However, at present, inspection of lines is usually performed manually, and the efficiency of line detection is low.

Contents of the invention

The present application provides a line detection method, device, equipment and storage medium to at least solve the above technical problems existing in the prior art.

According to the first aspect of the present application, there is provided a line detection method, the method comprising: receiving a line detection instruction, the line detection instruction carrying the line identification of the line to be detected; The standard line information is obtained in the design table, and the line design table stores the line design information in the process of designing the line to be detected; according to the standard line information and the line identification to be detected, the line to be detected is detected to obtain The line detection result of the line to be detected.

In a possible implementation manner, the identification of the line to be detected is used to show the preset starting point of the line to be detected; correspondingly, the standard line information obtained from the line design table according to the identification of the line to be detected includes: : taking the keyword matching the preset starting point in the line design table as a standard starting point; traversing the line design table according to the standard starting point to obtain standard line information.

In a possible implementation manner, the detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining the line detection result of the line to be detected includes: according to the line identification to be detected , determine the line starting point of the line to be detected; traverse the line to be detected from the starting point of the line, and obtain the line node information of a plurality of nodes of the line to be detected; according to the line nodes of the plurality of nodes information and the standard line information, to determine whether the line to be detected complies with preset hardware design rules; if the line to be detected complies with the preset hardware design rules, determine the line detection result of the line to be detected is that the line to be detected is qualified; if the line to be detected does not comply with the preset hardware design rule, determine that the line detection result of the line to be detected is that the line to be detected is unqualified.

In a possible implementation manner, the preset hardware design rule includes a hardware design specification, and the hardware design specification is that the matching relationship between the start point of the line and the end point of the line meets the set standard; correspondingly, the Line node information of a plurality of nodes and the standard line information, determining whether the line to be detected conforms to preset hardware design rules, including: determining that the line node information of the multiple nodes does not conform to the line node information of the component characteristics, and converting the line node information The determined line node information is used as the line end information of the line to be detected, and the component characteristics include the number of component pins and the name of the component; judging whether the line end information is the same as the standard end information in the standard line information, and It is judged whether the circuit to be detected conforms to the preset hardware design rule.

In a possible implementation manner, the preset hardware design rules include line design specifications, and the line design specifications are connection relationships and line connection standards of the lines; correspondingly, according to the line node information and the Standard line information, determining whether the line to be detected conforms to preset hardware design rules, including: combining line node information of multiple nodes in the line node information with standard node information corresponding to multiple nodes in the standard line information Matching is performed to determine whether the line to be detected conforms to the line design specification.

According to the second aspect of the present application, there is provided a line detection device, the device includes: a receiving module, configured to receive a line detection instruction, the line detection instruction carries the line identification of the line to be detected; standard line information acquisition A module, configured to obtain standard line information from a line design table according to the line identification to be detected, and the line design table stores line design information in the process of designing the line to be detected; a detection module, used to obtain standard line information according to the standard The line information and the to-be-detected line identifier are used to detect the to-be-detected line to obtain a line detection result of the to-be-detected line.

In a possible implementation manner, the identification of the line to be detected is used to show the preset starting point of the line to be detected; correspondingly, the standard line information acquisition module includes: a determination sub-module for The one in the design table that matches the keyword of the preset starting point is used as a standard starting point; the traversal sub-module is used to traverse the line design table according to the standard starting point to obtain standard line information.

In a possible implementation manner, the detection module includes: a line starting point determination submodule, configured to determine the line starting point of the line to be detected according to the line identification to be detected; a traversing submodule, configured to Start traversing the line to be detected to obtain line node information of multiple nodes of the line to be detected; a judging submodule is configured to determine the line node information of the multiple nodes and the standard line information Whether the line to be detected conforms to the preset hardware design rule; the first result determination submodule is used to determine that the line detection result of the line to be detected is the The detection line is qualified; the second result determination submodule is used to determine that the line detection result of the line to be detected is that the line to be detected is unqualified when the line to be detected does not meet the preset hardware design rules.

According to a third aspect of the present application, an electronic device is provided, including:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein,

The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor, so that the at least one processor can execute the method described in the present application.

According to a fourth aspect of the present application, there is provided a non-transitory computer-readable storage medium storing computer instructions, the computer instructions are used to cause the computer to execute the method described in the present application.

The line detection method, device, equipment, and storage medium of the present application receive a line detection instruction, and the line detection instruction carries the line identification of the line to be detected; obtain standard line information from the line design table according to the line identification to be detected, and the line design table Store the circuit design information in the process of designing the circuit to be detected; detect the circuit to be detected according to the standard circuit information and the identification of the circuit to be detected, and obtain the circuit detection result of the circuit to be detected. Therefore, the standard line information corresponding to the line to be tested is obtained from the line design table obtained in the line design process through the line to be tested through the line to be tested, and the detection line is detected through the standard line information, effectively utilizing the line design process to be tested. The obtained circuit design table realizes the automatic detection of the circuit to be detected without manual participation, and has high detection efficiency and high detection accuracy.

It should be understood that what is described in this section is not intended to identify key or important features of the embodiments of the application, nor is it intended to limit the scope of the application. Other features of the present application will be easily understood from the following description.

Description of drawings

The above and other objects, features and advantages of the exemplary embodiments of the present application will become readily understood by reading the following detailed description with reference to the accompanying drawings. In the drawings, several embodiments of the present application are shown by way of illustration and not limitation, in which:

In the drawings, the same or corresponding reference numerals denote the same or corresponding parts.

FIG. 1 shows a schematic diagram of the first implementation flow of the line detection method in the embodiment of the present application;

Fig. 2 shows the implementation flow diagram II of the line detection method of the embodiment of the present application;

Fig. 3 shows the schematic diagram of the line design table of the line detection method of the embodiment of the present application;

FIG. 4 shows a schematic diagram of standard line information of the line detection method of the embodiment of the present application;

FIG. 5 shows a schematic diagram of the third implementation flow of the line detection method in the embodiment of the present application;

FIG. 6 shows a schematic diagram 4 of the implementation flow of the line detection method in the embodiment of the present application;

FIG. 7 shows a schematic diagram of the implementation flow of a specific application example of the line detection method in the embodiment of the present application;

FIG. 8 shows a schematic structural diagram of a line detection device according to an embodiment of the present application;

FIG. 9 shows a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed ways

In order to make the purpose, features, and advantages of the application more obvious and understandable, the technical solutions in the embodiments of the application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the application. Obviously, the described The embodiments are only some of the embodiments of the present application, but not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts belong to the scope of protection of this application.

FIG. 1 shows a schematic diagram of a first implementation flow of a line detection method according to an embodiment of the present application.

With reference to Fig. 1, the embodiment of the present application provides a kind of line detection method, and this method comprises: Operation 101, receive the line detection instruction, and the line detection instruction carries the line identification of the line to be detected; Operation 102, according to the line identification to be detected from The standard line information is obtained in the line design table, and the line design table stores the line design information in the line design process to be tested; operation 103, according to the standard line information and the line identification to be tested, detects the line to be tested, and obtains the line detection result of the line to be tested .

In operation 101, a line detection instruction is received, and the line detection instruction carries a line identification to be detected of the line to be detected.

Specifically, the circuits of the electronic device include multiple types of circuits, such as USB circuits, PCIE circuits or SMBUS circuits, etc. During the detection process of the circuits of the electronic device, multiple circuits of the electronic device need to be detected.

In this embodiment of the present application, the circuit detection method may be applicable to circuit detection of various types of electronic equipment circuits, for example, circuit detection of laptop computers.

In the process of line detection, a line detection instruction is first received to determine which line in the electronic device the line to be detected is. Specifically, the line detection instruction may carry identification information of the line to be detected.

Here, during the line detection process, multiple lines of the electronic device may be detected simultaneously, thus, the line identifications to be detected carried by the line detection instruction may include the line identifications to be detected of multiple lines to be detected. Thus, multiple lines to be detected can be detected simultaneously, thereby effectively improving the efficiency of line detection.

In operation 102, the standard line information is obtained from the line design table according to the identification of the line to be detected, and the line design table stores the line design information in the process of designing the line to be tested.

Specifically, in the process of designing an electronic device, an electronic engineer can design a circuit diagram through drawing software. Further, the circuit design information in the process of circuit diagram design can be saved through the drawing software, and after the circuit diagram design is completed, the circuit information in the drawing software is exported to obtain the circuit design table.

Taking the drawing software as OrCAD as an example, during the process of electronic engineers designing circuits through OrCAD, OrCAD stores the circuit design information during the circuit design process in the form of an Excel table. After the circuit design is completed, export the Excel table to obtain the circuit design table.

The circuit design table includes the circuit design information of multiple circuits of the electronic equipment. The circuit design information can be multiple components in the circuit and the connection relationship of multiple components, etc. Multiple components and the connection relationship of multiple components are listed in the circuit design table Distributed storage.

Further, through the identification of the line to be detected, the information related to the identification of the line to be detected is searched from the circuit design table, the circuit design information corresponding to the line to be detected generated during the design process of the line to be detected is obtained, and the components and components of the line to be detected are obtained. The circuit design information such as the connection relationship, the circuit design information such as the components of the circuit to be detected and the connection relationship of the components are the standard circuit information corresponding to the circuit to be detected.

In operation 103, the line to be detected is detected according to the standard line information and the line identifier to be detected, and a line detection result of the line to be detected is obtained.

Specifically, the standard line information represents line information of a standard line corresponding to the line to be detected, and the line to be detected is detected. Here, the detected information of the line to be detected can be matched with the information of the standard line to obtain the line standard information of the line to be detected. Wherein, in the process of detecting the line to be detected, information such as the starting point, the end point, the components and the connection relationship of the line to be detected can be detected.

Therefore, this embodiment obtains the standard line information corresponding to the line to be tested from the line design table obtained in the line design process through the line identification to be tested, and treats the line design information in the line design process to be tested through the standard line information The detection line is used for detection without manual participation, with high detection efficiency and high detection accuracy.

What is shown in FIG. 1 is only the basic embodiment of the method of the present invention, and other preferred embodiments of the method can also be obtained by performing certain optimization and expansion on the basis thereof.

FIG. 2 shows a second schematic diagram of the implementation flow of the line detection method according to the embodiment of the present application.

Referring to Fig. 2, Fig. 2 is another specific embodiment of the line detection method of the embodiment of the present application. On the basis of the foregoing embodiments, this embodiment provides a more specific description and a certain degree of optimization for the acquisition process of standard line information .

Referring to Fig. 2, the method described in this embodiment includes the following operations:

In operation 201, a line detection instruction is received, and the line detection instruction carries a line identification of the line to be detected.

In operation 202, the keyword matching the preset starting point in the line design table is used as the standard starting point.

FIG. 3 shows an example diagram of a line design table of the line detection method according to the embodiment of the present application.

Referring to FIG. 3 , the circuit design table includes circuit design information of multiple circuits of the electronic device, and the circuit design information of each circuit is stored in a dispersed manner in the circuit design table. Wherein, the line design information is components and connecting lines corresponding to multiple nodes of the line, and the components and connecting lines at multiple nodes may be shown in the form of keywords.

Further, the line design table is searched according to the preset starting point keyword of the line to be detected, and the point in the line design table matching the preset starting point keyword is the standard starting point. Among them, the circuit designed by the electronic engineer in designing the circuit to be tested can be regarded as a standard circuit, and the standard starting point is the starting point of the standard circuit.

Operation 203, traversing the route design table according to the standard starting point to obtain standard route information.

Specifically, according to the keyword of the standard starting point, the line design table is traversed, and the node information related to the keyword of the standard starting point is searched in the line design table, and the node information of multiple nodes corresponding to the standard starting point of the standard line is obtained, collectively referred to as Standard line information.

For example, referring to Figure 3 and Figure 4, Figure 4 shows a schematic diagram of the standard line information of the line detection method of the embodiment of the present application, taking the preset starting point as PCIE_RX16 as an example, first traverse the line design table, from the line design table PCIE_RX16 is found in , and PCIE_RX16 is the starting point of the standard. Referring to Figure 2, it can be seen that the keyword of the next node corresponding to the standard starting point PCIE_RX16 is PCIE_CRX_DRX16_N, and PCIE_CRX_DRX16_N can represent the connection line of the circuit. Further, PCIE_CRX_DRX16_N is found in the circuit design table, and the next node of PCIE_CRX_DRX16_N can be seen The keyword R3724: 1, R3724 indicates the component resistance, R3724: 1 indicates one of the pins of the resistor, the resistor has two pins, the keyword of the next node corresponding to R3724: 1 is R3724: 2, R3724: 2 The keyword of the next node is PCIE_CRX_DRX16_N_R. When searching for the next node of PCIE_CRX_DRX16_N_R, it can be seen from Figure 2 that the keyword of the next node of PCIE_CRX_DRX16_N_R is PERNO/SATA-B+, and PERNO/SATA-B+ indicates the terminal information, so After the node information search of multiple nodes of the standard line is completed, the standard line information corresponding to the standard line shown in the first row of FIG. 4 can be obtained.

Further, in the process of searching for standard lines, the standard line information corresponding to multiple lines to be detected can be searched at the same time, and each row in FIG. 4 represents the standard line information corresponding to a standard line.

In operation 204, the line to be detected is detected according to the standard line information and the identification of the line to be detected, and a line detection result of the line to be detected is obtained.

The method described in this embodiment discloses in detail the process of obtaining the standard line information corresponding to the line to be detected through the line design table on the basis of the embodiment shown in FIG. When detecting the line to be detected, the standard line information is used to detect the line to be detected. Compared with the process of detecting the line to be detected by human eyes in the prior art, the detection efficiency is high and the detection accuracy is high.

FIG. 5 shows a third schematic diagram of the implementation flow of the line detection method according to the embodiment of the present application.

Referring to FIG. 5 , FIG. 5 shows another specific embodiment of the line detection method described in this application. In this embodiment, on the basis of the embodiment described in FIG. 1 , a more specific description and a certain degree of optimization are carried out on the process of entering the line to be detected according to the standard line information and the identification of the line to be detected for detection.

In this embodiment, whether the circuit to be detected is qualified is judged by judging whether the circuit to be detected conforms to the preset hardware design specification. The preset hardware design rule can be the requirement for line detection. For example, it can only detect whether the start point and end point of the line are connected correctly. Whether all components of the detection circuit are connected correctly, the preset hardware design rule is that all components of the circuit to be detected are connected correctly.

The method described in this embodiment includes:

In operation 501, a line detection instruction is received, and the line detection instruction carries a line identification of the line to be detected.

In operation 502, standard line information is obtained from a line design table according to the identification of the line to be detected, and the line design table stores the line design information in the process of designing the line to be tested.

Operation 503: Determine the starting point of the line to be detected according to the identification of the line to be detected.

Specifically, the method in the embodiment of the present application can be implemented based on terminal equipment such as a notebook computer. During the process of detecting and obtaining the line, the terminal equipment is connected to the circuit board where the line is located, and the terminal equipment can identify multiple nodes of the line by detecting the line. The name, where the name can be shown in the form of keywords.

Further, first traverse multiple lines of the circuit board where the line to be detected is located through the keyword of the preset starting point of the line to be detected, determine that the node whose keyword matches the keyword of the preset starting point is the starting point of the line, and the line corresponding to the starting point of the line for the line to be tested.

In operation 504, the line to be detected is traversed from the starting point of the line, and the line node information of multiple nodes of the line to be detected is obtained.

Specifically, the detection of the line can detect the components, and the components have keywords. For example, the keyword of the resistor is ": R", the keyword of the capacitor is ": C", the keyword of the inductor is ": L", and the keyword of the diode is ":R". The keyword is ":D" and the keyword for IC is ":U", etc.

Further, in the detection of the line to be detected, multiple nodes of the line to be detected are detected, and if a component appears during the detection process, the component is not detected directly. The detected node corresponds to the pin of the component, and the node information corresponds to the keyword corresponding to the pin of the component. For example, if the element is a resistor, the resistor has two pins corresponding to two nodes "R:1" and "R:2".

Wherein, the node may be the start point or end point of the line, and the node information also includes line start point information and line end point information.

Starting from the starting point of the line to be detected, the multiple nodes of the line to be detected are traversed one by one, and the multiple nodes are identified to obtain the node information of the multiple nodes of the line to be detected.

In operation 505, determine whether the line to be detected conforms to a preset hardware design rule according to the line node information of multiple nodes and the standard line information.

Specifically, the line node information of multiple nodes of the line to be detected is matched with the information corresponding to multiple nodes in the standard line information, and it is judged whether the matching result conforms to the preset hardware design rule.

In an embodiment of the present application, the preset hardware design rules include line design specifications, and the line node information of multiple nodes in the line node information can be matched with the standard node information corresponding to multiple nodes in the standard line information, Determine whether the line to be tested conforms to the line design specifications.

Specifically, the line design specification includes the overall connection relationship of the line and the line connection standard. The line connection standard means that the components in the line cannot be reversed.

For example, take an IC in the line as an example, the keyword of the IC is ":U", the IC has two pins UPx and DPx, and the two pins have input and output differences. When detecting the two nodes corresponding to the IC, if two pins of "UXXXX: UPx" and ": UXXXX: DPx" are detected at the same time, it should also be noted that "UXXXX: UPx" is the input input, " UXXXX: DPx" is the output.

Further, by matching the node information of all nodes of the line with the standard node information of corresponding nodes in the standard line information, when the line end information of multiple nodes is the same as the standard line end information, it means that the line to be detected conforms to the hardware design rules. If the line end information of multiple nodes is different from the standard line end information, it means that the line to be detected does not conform to the hardware design rule.

Operation 506, if the circuit to be detected complies with the preset hardware design rule, determine that the circuit to be detected is qualified as the circuit to be detected.

Specifically, it is determined whether the circuit to be detected conforms to the preset hardware design rule according to the matching result obtained in the above operation 505, and if so, it is determined that the circuit to be detected is qualified.

Operation 507, in the case that the line to be detected does not conform to the preset hardware design rule, determine that the line detection result of the line to be detected is that the line to be detected is unqualified.

Specifically, it is determined whether the circuit to be detected conforms to the preset hardware design rule according to the matching result obtained in the above step 505, and if not, it is determined that the circuit to be detected is unqualified.

Therefore, on the basis of the embodiment shown in Figure 1, the method described in this embodiment discloses in detail the process of detecting the line to be detected according to the standard line information and the line identification to be detected. The standard line information corresponding to the line to be tested is obtained from the line design table obtained during the line design process, and the line to be tested is detected according to the preset hardware design rules through the standard line information and the line design information in the line design process to be tested, realizing The automatic detection of the detection line does not require manual participation, and the detection efficiency is high and the detection accuracy is high.

FIG. 6 shows a fourth implementation flow diagram of a method for judging whether a circuit to be detected conforms to preset hardware design rules in the circuit detection method according to the embodiment of the present application.

Referring to FIG. 6 , on the basis of the embodiment described in FIG. 5 , this embodiment provides a more specific description and a certain degree of optimization for the process of determining whether the circuit to be detected complies with the preset hardware design rules.

In this embodiment, the hardware design rule includes a hardware design specification, and the hardware design specification is that the matching relationship between the starting point of the line and the end point of the line meets the set standard. Correspondingly, the method described in this embodiment includes:

In operation 601, a line detection instruction is received, and the line detection instruction carries a line identification of the line to be detected.

In operation 602, standard line information is obtained from a line design table according to the identification of the line to be detected, and the line design table stores the line design information in the process of designing the line to be tested.

Operation 603: Determine the starting point of the line to be detected according to the identification of the line to be detected.

In operation 604, traverse the line to be detected starting from the starting point of the line, and obtain line node information of multiple nodes of the line to be detected.

In operation 605, it is determined that the line node information of multiple nodes does not conform to the line node information of the component characteristics, and the determined line node information is used as the line end information of the line to be detected.

Specifically, in the case of a relatively simple circuit, for example, the circuit only includes simple components such as resistors, capacitors, and inductors, there may be no wrong connections in the middle of the circuit, and it is only necessary to check whether the starting point and the end point of the circuit are connected correctly. That's it. Correspondingly, the hardware design rule can set standards for the matching relationship between the start point of the line and the end point of the line.

Further, when the starting point of the line is determined, it is judged whether the node is the end point of the line to be detected by judging whether the information of the node is the component characteristic. Component characteristics include the number of component pins and the component name. After detecting the component name and the corresponding pins of the component, it is proved that the component characteristics are met and the component exists.

For example, the keyword of the resistor is ":R", and the resistor is a component with two pins. During the detection of the line to be detected, if the node information of a node detected is ":R3724:1" and exists The node information of another node is ": R3724: 2", which proves that there is a resistance, which conforms to the characteristics of the component, and the currently detected node is a component rather than the end of the line to be detected.

Therefore, in this embodiment of the present application, when the detected node of the line to be detected is not a pin of a component, it indicates that the node is the end point of the line to be detected, and the line end information of the line to be detected is obtained.

In operation 606, it is determined whether the line end information is the same as the standard end information in the standard line information, so as to determine whether the line to be detected conforms to the hardware design rule.

Specifically, the line end information obtained in 605 above is matched with the standard end information corresponding to the line start in the standard information. If the line end information is the same as the standard line end information, it means that the line to be detected conforms to the hardware design rules. If the end point information is different from the standard line end point information, it means that the line to be detected does not conform to the hardware design rules.

For example, take the line starting point information of the line to be tested as CPU PCIE_TX_N as an example, corresponding to the line starting point of the line to be tested, the standard line information CPUPCIE_TX_N---R- of the line to be tested can be obtained from the circuit design table --C---Device PCIE_TX_N, the standard line terminal information corresponding to the line to be tested is DevicePCIE_TX_N, and when the line terminal information is Device PCIE_TX_N, it means that the line to be tested conforms to the hardware design rules.

In operation 607, if the circuit to be detected conforms to the preset hardware design rule, determine that the circuit to be detected is qualified as a result of the circuit detection on the circuit to be detected.

In operation 608, if the line to be detected does not conform to the preset hardware design rule, it is determined that the line to be detected is unqualified as a line detection result of the line to be detected.

Therefore, on the basis of the embodiment shown in Figure 5, the method described in this embodiment discloses in detail the process of determining whether the large detection circuit conforms to the preset hardware design specification, and detects the detection circuit according to the preset hardware design rules , realize the automatic detection of the line to be detected, without manual participation, high detection efficiency and high detection accuracy.

In order to further understand the solutions of the embodiments of the present application, a specific application example is used below to illustrate.

FIG. 7 shows a schematic diagram of an implementation flow of a specific application example of the line detection method according to the embodiment of the present application.

Referring to Fig. 7, the specific application example of the embodiment of the present application is illustrated by taking the circuit design table as derived from orcad, and the circuit to be detected belongs to the line of the notebook computer as an example. The specific application example of the embodiment of the present application is performed by the following operations Line detection: operation 701, import the line design table; operation 702, find the starting point of the line, and judge whether it meets the target; operation 703, continue to search for the next node along the line to be tested; operation 704, determine whether it is a component; , continue searching according to the next node of the component; operation 706, if not, judge whether it is the end point of the line; operation 707, judge whether the line to be detected is correct.

Specifically, the solution of this embodiment of the present application can be realized based on a notebook computer. The line to be tested is the line of the notebook computer. The notebook computer is connected to the circuit board where the line to be tested is located. First, the electronic engineer designs the line to be tested through drawing software. The circuit design table obtained in the process is imported into the notebook computer. The notebook computer looks for the starting point of the line to be detected and judges whether it meets the target starting point. If it meets the target starting point, it searches for the next node along the line to be detected, wherein the target starting point is the preset starting point. In the process of finding nodes, if the found node is judged to be a component, continue searching; when the found node is not a component, judge whether the node is the end point of the line, and if it is determined to be the end point of the line, judge the line according to the line design table Whether the starting point and the end point of the line match, if the starting point of the line and the end point of the line match, the line to be tested is qualified, and if the starting point of the line and the end point of the line do not match, the line is unqualified.

It should be noted that the description of the specific example of the embodiment of the present application is similar to the description of the above method embodiment, and has similar beneficial effects to the method embodiment, so details are not repeated here. For the technical details not covered in this specific application example provided by the embodiment of the present application, it can be understood according to the description in FIG. 1 to FIG. 6 .

FIG. 8 shows a schematic structural diagram of a line detection device according to an embodiment of the present application.

Referring to FIG. 8 , the embodiment of the present application also provides a line detection device. The device 80 includes: a receiving module 801, configured to receive a line detection instruction, and the line detection instruction carries the line identification of the line to be detected; standard line information acquisition Module 802 is used to obtain standard line information from the line design table according to the line identification to be detected, and the line design table stores the line design information in the line design process to be detected; the detection module 803 is used to obtain standard line information according to the standard line information and the line identification to be detected , detect the line to be detected, and obtain a line detection result of the line to be detected.

In one embodiment of the present application, the identification of the line to be detected is used to show the preset starting point of the line to be detected; correspondingly, the standard line information acquisition module includes: a determination sub-module, which is used to compare the line design table with the preset starting point The keyword that matches the standard is used as the standard starting point; the traversal sub-module is used to traverse the circuit design table according to the standard starting point to obtain the standard circuit information.

In an embodiment of the present application, the detection module includes: a line starting point determination sub-module for determining the line starting point of the line to be detected according to the line identification to be detected; a traversal sub-module for traversing the line to be detected from the starting point of the line, Obtaining the line node information of multiple nodes of the line to be detected; the judging submodule is used to determine whether the line to be detected conforms to the preset hardware design rules according to the line node information of multiple nodes and the standard line information; the first result determination submodule, It is used to determine that the circuit detection result of the circuit to be detected is qualified when the circuit to be detected conforms to the preset hardware design rules; the second result determination submodule is used to determine that the circuit to be detected does not meet the preset hardware design rules In the case of , it is determined that the line detection result of the line to be detected is that the line to be detected is unqualified.

In an embodiment of the present application, the hardware design rule includes a hardware design specification, and the hardware design specification is that the matching relationship between the starting point of the line and the end point of the line meets the set standard; correspondingly,

The judging sub-module includes: determining that the line node information of multiple nodes does not conform to the line node information of the component characteristics; using the determined line node information as the line end information of the line to be detected, and the component characteristics include the number of component pins and the component name; judging Whether the line end information is the same as the standard end information in the standard line information is used to determine whether the line to be detected complies with the hardware design rules.

In an embodiment of the present application, the preset hardware design rules include line design specifications, and the line design specifications are line connection relationships and line connection standards; The node information is matched with the standard node information corresponding to multiple nodes in the standard line information to determine whether the line to be detected conforms to the line design specification.

According to the embodiments of the present application, the present application also provides an electronic device and a readable storage medium.

FIG. 9 shows a schematic block diagram of an example electronic device 900 that may be used to implement embodiments of the present application. Electronic device is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. Electronic devices may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are by way of example only, and are not intended to limit implementations of the applications described and/or claimed herein.

As shown in FIG. 9 , the device 900 includes a computing unit 901 that can execute according to a computer program stored in a read-only memory (ROM) 902 or loaded from a storage unit 908 into a random-access memory (RAM) 903. Various appropriate actions and treatments. In the RAM 903, various programs and data necessary for the operation of the device 900 can also be stored. The computing unit 901 , ROM 902 , and RAM 903 are connected to each other through a bus 904 . An input/output (I/O) interface 905 is also connected to the bus 904 .

Multiple components in the device 900 are connected to the I/O interface 905, including: an input unit 906, such as a keyboard, a mouse, etc.; an output unit 907, such as various types of displays, speakers, etc.; a storage unit 908, such as a magnetic disk, an optical disk, etc. ; and a communication unit 909, such as a network card, a modem, a wireless communication transceiver, and the like. The communication unit 909 allows the device 900 to exchange information/data with other devices over a computer network such as the Internet and/or various telecommunication networks.

The computing unit 901 may be various general-purpose and/or special-purpose processing components having processing and computing capabilities. Some examples of computing units 901 include, but are not limited to, central processing units (CPUs), graphics processing units (GPUs), various dedicated artificial intelligence (AI) computing chips, various computing units that run machine learning model algorithms, digital signal processing processor (DSP), and any suitable processor, controller, microcontroller, etc. The calculation unit 901 executes various methods and processes described above, such as a line detection method. For example, in some embodiments, the line detection method may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as storage unit 908 . In some embodiments, part or all of the computer program may be loaded and/or installed onto the device 900 via the ROM 902 and/or the communication unit 909 . When the computer program is loaded into the RAM 903 and executed by the computing unit 901, one or more steps of the line detection method described above may be performed. Alternatively, in other embodiments, the computing unit 901 may be configured to execute the line detection method in any other suitable manner (for example, by means of firmware).

Various implementations of the systems and techniques described above herein may be implemented in digital electronic circuitry, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chips ( SOC), Complex Programmable Logic Device (CPLD), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include being implemented in one or more computer programs executable and/or interpreted on a programmable system including at least one programmable processor, the programmable processor Can be special-purpose or general-purpose programmable processor, can receive data and instruction from storage system, at least one input device, and at least one output device, and transmit data and instruction to this storage system, this at least one input device, and this at least one output device an output device.

Program codes for implementing the methods of the present application may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special purpose computer, or other programmable data processing devices, so that the program codes, when executed by the processor or controller, make the functions/functions specified in the flow diagrams and/or block diagrams Action is implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of the present application, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media would include one or more wire-based electrical connections, portable computer discs, hard drives, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM or flash memory), optical fiber, compact disk read only memory (CD-ROM), optical storage, magnetic storage, or any suitable combination of the foregoing.

To provide for interaction with the user, the systems and techniques described herein can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user. ); and a keyboard and pointing device (eg, a mouse or a trackball) through which a user can provide input to the computer. Other kinds of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and can be in any form (including Acoustic input, speech input or, tactile input) to receive input from the user.

The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., as a a user computer having a graphical user interface or web browser through which a user can interact with embodiments of the systems and techniques described herein), or including such backend components, middleware components, Or any combination of front-end components in a computing system. The components of the system can be interconnected by any form or medium of digital data communication, eg, a communication network. Examples of communication networks include: Local Area Network (LAN), Wide Area Network (WAN) and the Internet.

A computer system may include clients and servers. Clients and servers are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, a server of a distributed system, or a server combined with a blockchain.

It should be understood that steps may be reordered, added or deleted using the various forms of flow shown above. For example, the steps described in the present disclosure may be executed in parallel, sequentially, or in a different order, as long as the desired result of the technical solution disclosed in the present application can be achieved, no limitation is imposed herein.

In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include at least one of these features. In the description of the present application, "plurality" means two or more, unless otherwise specifically defined.

The above is only a specific implementation of the application, but the scope of protection of the application is not limited thereto. Anyone familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the application. Should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be determined by the protection scope of the claims.

Claims (10)

1. A line detection method, the method comprising:

receiving a line detection instruction, wherein the line detection instruction carries a line identifier to be detected of a line to be detected;

obtaining standard line information from a line design table according to the line identification to be detected, wherein the line design table stores the line design information in the line design process to be detected;

and detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected.

2. The method according to claim 1, wherein the line identification to be detected is used to show a preset starting point of the line to be detected; in a corresponding manner,

the obtaining standard line information from the line design table according to the line identification to be detected includes:

the keywords in the line design table, which are matched with the preset starting points, are used as standard starting points;

traversing the line design table according to the standard starting point to obtain standard line information.

3. The method according to claim 1, wherein the detecting the line to be detected according to the standard line information and the line identification to be detected, to obtain a line detection result of the line to be detected, includes:

Determining a line starting point of the line to be detected according to the line identification to be detected;

traversing the line to be detected from the line starting point to obtain line node information of a plurality of nodes of the line to be detected;

determining whether the line to be detected accords with a preset hardware design rule according to the line node information of the plurality of nodes and the standard line information;

under the condition that the line to be detected accords with the preset hardware design rule, determining that the line detection result of the line to be detected is that the line to be detected is qualified;

and under the condition that the line to be detected does not accord with the preset hardware design rule, determining that the line detection result of the line to be detected is that the line to be detected is unqualified.

4. The method of claim 3, wherein the predetermined hardware design rule comprises a hardware design specification, the hardware design specification being that a matching relationship between a start point of the line and an end point of the line meets a set standard; in a corresponding manner,

the determining whether the line to be detected meets a preset hardware design rule according to the line node information of the plurality of nodes and the standard line information comprises the following steps:

Determining line node information of the plurality of nodes, wherein the line node information does not accord with line node information of element characteristics, and taking the determined line node information as line end point information of the line to be detected, wherein the element characteristics comprise element pin numbers and element names;

and judging whether the line end point information is the same as the standard end point information in the standard line information or not so as to judge whether the line to be detected accords with the preset hardware design rule or not.

5. The method of claim 3, wherein the predetermined hardware design rules include a line design specification, the line design specification being a connection relationship and a line connection standard of the line; in a corresponding manner,

the determining whether the line to be detected meets a preset hardware design rule according to the line node information of the plurality of nodes and the standard line information comprises the following steps:

and matching the line node information of the plurality of nodes in the line node information with standard node information corresponding to the plurality of nodes in the standard line information, and determining whether the line to be detected meets the line design specification.

6. A line testing apparatus, the apparatus comprising:

The receiving module is used for receiving a line detection instruction, wherein the line detection instruction carries a line identifier to be detected of a line to be detected;

the standard circuit information acquisition module is used for acquiring standard circuit information from a circuit design table according to the circuit identification to be detected, wherein the circuit design table stores circuit design information in the circuit design process to be detected;

and the detection module is used for detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected.

7. The apparatus of claim 6, wherein the line identification to be detected is used to show a preset starting point of the line to be detected; in a corresponding manner,

the standard circuit information acquisition module comprises:

a determining submodule, configured to use a keyword in the line design table, which is matched with the preset starting point, as a standard starting point;

and the traversing submodule is used for traversing the line design table according to the standard starting point to obtain standard line information.

8. The apparatus of claim 7, wherein the detection module comprises:

a line start point determining sub-module, configured to determine a line start point of the line to be detected according to the line identifier to be detected;

The traversing sub-module is used for traversing the line to be detected from the line starting point to obtain line node information of a plurality of nodes of the line to be detected;

the judging submodule is used for determining whether the circuit to be detected accords with a preset hardware design rule according to the circuit node information of the plurality of nodes and the standard circuit information;

the first result submodule is used for determining that the line detection result of the line to be detected is that the line to be detected is qualified under the condition that the line to be detected accords with a preset hardware design rule;

and the second result submodule is used for determining that the line detection result of the line to be detected is that the line to be detected is unqualified under the condition that the line to be detected does not accord with a preset hardware design rule.

9. An electronic device, comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein,,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-5.

10. A computer readable storage medium storing computer instructions for causing the computer to perform the method of any one of claims 1-5.

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