CN116184258A

CN116184258A - Line detection method, device, equipment and storage medium

Info

Publication number: CN116184258A
Application number: CN202310245532.0A
Authority: CN
Inventors: 余嘉朋; 陈志玮
Original assignee: Hefei Lianbao Information Technology Co Ltd
Current assignee: Hefei Lianbao Information Technology Co Ltd
Priority date: 2023-03-09
Filing date: 2023-03-09
Publication date: 2023-05-30

Abstract

The application provides a line detection method, a device, equipment and a storage medium, wherein the method comprises the following steps: receiving a line detection instruction, wherein the line detection instruction carries a line identifier to be detected of a line to be detected; obtaining standard line information from a line design table according to the line identification to be detected, wherein the line design table stores the line design information in the line design process to be detected; and detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected. From this, treat the circuit that detects through the circuit design information in the circuit design process that waits to detect, realized treating the automated detection of detecting the circuit, need not artifical the participation, detection efficiency is high, detects the rate of accuracy height.

Description

Line detection method, device, equipment and storage medium

Technical Field

The present disclosure relates to the field of electronic circuits, and in particular, to a circuit detection method, apparatus, device, and storage medium.

Background

Because the electronic device involves a relatively large number of lines and is relatively complex, the line graph often has a page crossing condition in the process of drawing the lines by drawing software. Because the page crossing condition of the circuit diagram occurs, engineers can easily connect the circuit reversely in the process of connecting the circuit according to the circuit diagram, and the circuit connection reversely can lead to the incapability of realizing the functions related to the circuit, so that the finished circuit needs to be checked. At present, the inspection of the circuit is usually performed manually, and the circuit detection efficiency is low.

Disclosure of Invention

The application provides a line detection method, a line detection device, line detection equipment and a storage medium, so as to at least solve the technical problems in the prior art.

According to a first aspect of the present application, there is provided a line detection method, the method comprising: receiving a line detection instruction, wherein the line detection instruction carries a line identifier to be detected of a line to be detected; obtaining standard line information from a line design table according to the line identification to be detected, wherein the line design table stores the line design information in the line design process to be detected; and detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected.

In an embodiment, the line identifier to be detected is used for showing a preset starting point of the line to be detected; correspondingly, the obtaining standard line information from the line design table according to the line identification to be detected includes: the keywords in the line design table, which are matched with the preset starting points, are used as standard starting points; traversing the line design table according to the standard starting point to obtain standard line information.

In an embodiment, the detecting the line to be detected according to the standard line information and the line identifier to be detected to obtain a line detection result of the line to be detected includes: determining a line starting point of the line to be detected according to the line identification to be detected; traversing the line to be detected from the line starting point to obtain line node information of a plurality of nodes of the line to be detected; determining whether the line to be detected accords with a preset hardware design rule according to the line node information of the plurality of nodes and the standard line information; under the condition that the line to be detected accords with the preset hardware design rule, determining that the line detection result of the line to be detected is that the line to be detected is qualified; and under the condition that the line to be detected does not accord with the preset hardware design rule, determining that the line detection result of the line to be detected is that the line to be detected is unqualified.

In an embodiment, the preset hardware design rule includes a hardware design specification, where the hardware design specification is that a matching relationship between a starting point of the line and an ending point of the line meets a set standard; correspondingly, the determining whether the line to be detected meets a preset hardware design rule according to the line node information of the plurality of nodes and the standard line information comprises the following steps: determining line node information of the plurality of nodes, wherein the line node information does not accord with line node information of element characteristics, and taking the determined line node information as line end point information of the line to be detected, wherein the element characteristics comprise element pin numbers and element names; and judging whether the line end point information is the same as the standard end point information in the standard line information or not so as to judge whether the line to be detected accords with the preset hardware design rule or not.

In an embodiment, the preset hardware design rule includes a circuit design specification, where the circuit design specification is a connection relationship and a circuit connection standard of the circuit; correspondingly, the determining whether the line to be detected meets a preset hardware design rule according to the line node information and the standard line information includes: and matching the line node information of the plurality of nodes in the line node information with standard node information corresponding to the plurality of nodes in the standard line information, and determining whether the line to be detected meets the line design specification.

According to a second aspect of the present application, there is provided a line detection apparatus, the apparatus comprising: the receiving module is used for receiving a line detection instruction, wherein the line detection instruction carries a line identifier to be detected of a line to be detected; the standard circuit information acquisition module is used for acquiring standard circuit information from a circuit design table according to the circuit identification to be detected, wherein the circuit design table stores circuit design information in the circuit design process to be detected; and the detection module is used for detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected.

In an embodiment, the line identifier to be detected is used for showing a preset starting point of the line to be detected; correspondingly, the standard circuit information acquisition module comprises: a determining submodule, configured to use a keyword in the line design table, which is matched with the preset starting point, as a standard starting point; and the traversing submodule is used for traversing the line design table according to the standard starting point to obtain standard line information.

In one embodiment, the detection module includes: a line start point determining sub-module, configured to determine a line start point of the line to be detected according to the line identifier to be detected; the traversing sub-module is used for traversing the line to be detected from the line starting point to obtain line node information of a plurality of nodes of the line to be detected; the judging submodule is used for determining whether the circuit to be detected accords with a preset hardware design rule according to the circuit node information of the plurality of nodes and the standard circuit information; the first result determining submodule is used for determining that the line detection result of the line to be detected is that the line to be detected is qualified under the condition that the line to be detected accords with a preset hardware design rule; and the second result determining submodule is used for determining that the line detection result of the line to be detected is that the line to be detected is unqualified under the condition that the line to be detected does not accord with a preset hardware design rule.

According to a third aspect of the present application, there is provided an electronic device comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein,,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the methods described herein.

According to a fourth aspect of the present application, there is provided a non-transitory computer readable storage medium storing computer instructions for causing the computer to perform the method described herein.

The line detection method, the device, the equipment and the storage medium receive a line detection instruction, wherein the line detection instruction carries a line identifier to be detected of a line to be detected; obtaining standard line information from a line design table according to the line identification to be detected, wherein the line design table stores line design information in the line design process to be detected; and detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected. Therefore, the standard line information corresponding to the line to be detected is obtained from the line design table obtained in the line to be detected design process through the line to be detected identification, the detection line is detected through the standard line information, the line design table obtained in the line to be detected design process is effectively utilized, automatic detection of the line to be detected is achieved, manual participation is not needed, detection efficiency is high, and detection accuracy is high.

It should be understood that the description of this section is not intended to identify key or critical features of the embodiments of the application or to delineate the scope of the application. Other features of the present application will become apparent from the description that follows.

Drawings

The above, as well as additional purposes, features, and advantages of exemplary embodiments of the present application will become readily apparent from the following detailed description when read in conjunction with the accompanying drawings. Several embodiments of the present application are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings, in which:

in the drawings, the same or corresponding reference numerals indicate the same or corresponding parts.

Fig. 1 shows a schematic diagram of an implementation flow of a line detection method according to an embodiment of the present application;

fig. 2 shows a second implementation flow diagram of the line detection method according to the embodiment of the present application;

FIG. 3 is a schematic diagram of a circuit design table of a circuit detection method according to an embodiment of the present application;

fig. 4 is a schematic diagram of standard line information of the line detection method according to the embodiment of the present application;

fig. 5 shows a third implementation flow diagram of the line detection method according to the embodiment of the present application;

fig. 6 shows a fourth implementation flow diagram of the line detection method according to the embodiment of the present application;

FIG. 7 is a schematic implementation flow chart of a specific application example of the line detection method according to the embodiment of the present application;

fig. 8 shows a schematic structural diagram of a line detection device according to an embodiment of the present application;

fig. 9 shows a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

In order to make the objects, features and advantages of the present application more obvious and understandable, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.

Fig. 1 shows a schematic implementation flow diagram of a line detection method according to an embodiment of the present application.

Referring to fig. 1, an embodiment of the present application provides a line detection method, which includes: operation 101, receiving a line detection instruction, wherein the line detection instruction carries a line identifier to be detected of a line to be detected; operation 102, obtaining standard line information from a line design table according to a line identification to be detected, wherein the line design table stores line design information in a line design process to be detected; and 103, detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected.

In operation 101, a line detection instruction is received, where the line detection instruction carries a line identifier to be detected of a line to be detected.

Specifically, the lines of the electronic device include multiple types of lines, such as a USB line, a PCIE line, or an SMBUS line, and in the process of detecting the lines of the electronic device, multiple lines of the electronic device need to be detected.

In this embodiment of the present application, the line detection method may be suitable for line detection of multiple types of electronic device lines, for example, line detection of lines of a notebook computer.

In the process of line detection, a line detection instruction is received first to determine which line to be detected is in the electronic device. Specifically, the line detection instruction may carry identification information of the line to be detected.

In the process of line detection, a plurality of lines of the electronic device may be detected at the same time, and thus, the line identifier to be detected carried by the line detection instruction may include line identifiers to be detected of a plurality of lines to be detected. Therefore, a plurality of lines to be detected can be detected at the same time, and the line detection efficiency is effectively improved.

In operation 102, standard line information is obtained from a line design table according to the line identification to be detected, and the line design table stores line design information in the line design process to be detected.

Specifically, in the process of designing the electronic device, an electronic engineer may perform a circuit diagram design through drawing software. Further, the line design information in the line graph design process can be stored through the drawing software, and after the line graph design is completed, the line information in the drawing software is derived to obtain a line design table.

Taking drawing software as an OrCAD as an example, in the process of designing a line by an electronic engineer through the OrCAD, the OrCAD stores line design information in the line design process in the form of an Excel table. And after the circuit design is completed, the Excel table is derived, and the circuit design table is obtained.

The circuit design table includes circuit design information of a plurality of circuits of the electronic device, and the circuit design information may be a plurality of elements in the circuit, connection relations of the plurality of elements, and the like, and the connection relations of the plurality of elements and the plurality of elements are stored in the circuit design table in a scattered manner.

Further, the information related to the line identification to be detected is searched from the line design table, the line design information corresponding to the line to be detected, which is generated in the process of designing the line to be detected, is obtained, and the line design information such as the element and the element connection relation of the line to be detected is the standard line information corresponding to the line to be detected.

In operation 103, the line to be detected is detected according to the standard line information and the line identification to be detected, and a line detection result of the line to be detected is obtained.

Specifically, the standard line information indicates line information of a standard line corresponding to a line to be detected, and the line to be detected is detected. The detected information of the line to be detected can be matched with standard line information, so that line standard information of the line to be detected is obtained. In the process of detecting the line to be detected, information such as a starting point, an end point, elements, connection relations and the like of the line to be detected can be detected.

Therefore, the standard circuit information corresponding to the circuit to be detected is obtained from the circuit design table obtained in the circuit design process through the circuit identification to be detected, the circuit to be detected is detected through the circuit design information in the circuit design process through the standard circuit information, manual participation is not needed, the detection efficiency is high, and the detection accuracy is high.

Fig. 1 shows only a basic embodiment of the method according to the invention, on the basis of which certain optimizations and developments are made, but other preferred embodiments of the method can also be obtained.

Fig. 2 shows a second implementation flow diagram of the line detection method according to the embodiment of the present application.

Referring to fig. 2, fig. 2 is a schematic diagram of another specific embodiment of a line detection method according to the embodiment of the present application, where the process of obtaining standard line information is described more specifically and optimized to a certain extent on the basis of the foregoing embodiment.

Referring to fig. 2, the method in this embodiment includes the following operations:

operation 201, a line detection instruction is received, where the line detection instruction carries a line identifier to be detected of a line to be detected.

And 202, taking the keywords matched with the preset starting point in the line design table as the standard starting point.

Fig. 3 shows an exemplary diagram of a circuit design table of the circuit inspection method according to the embodiment of the present application.

Referring to fig. 3, the line design table includes line design information of a plurality of lines of the electronic device, and the line design information of each line is stored in a distributed manner in the line design table. The circuit design information is elements and connecting lines corresponding to a plurality of nodes of the circuit, and the elements and the connecting lines at the plurality of nodes can be shown in the form of keywords.

Further, searching from the line design table according to the preset starting point keywords of the line to be detected, wherein the point matched with the preset starting point keywords in the line design table is the standard starting point. The circuit designed by the electronic engineer in designing the circuit to be detected can be regarded as a standard circuit, and the standard starting point is the starting point of the standard circuit.

And operation 203, traversing the line design table according to the standard starting point to obtain standard line information.

Specifically, traversing the line design table according to the keywords of the standard starting point, and searching node information of each line design table related to the keywords of the standard starting point to obtain node information of a plurality of nodes of the standard line corresponding to the standard starting point, wherein the node information is commonly called as standard line information.

For example, referring to fig. 3 and fig. 4, fig. 4 shows a schematic diagram of standard circuit information of the circuit detection method according to the embodiment of the present application, taking a preset starting point as pcie_rx16 as an example, first traversing a circuit design table, searching pcie_rx16 from the circuit design table, where pcie_rx16 is the standard starting point. Referring to fig. 2, it can be seen that the key of the next node corresponding to the standard starting point pcie_rx16 is pcie_crx_drx16_n, pcie_crx_drx16_n may represent a connection line of the line, and further, the key R3724 of the next node of pcie_crx_drx16_n may be seen when pcie_crx_drx16_n is found in the line design table: 1, R3724 denotes element resistance, R3724:1 denotes one of the pins of the resistor, which has two pins, R3724: the key word of the next node corresponding to 1 is R3724:2, r3724:2 is pcie_crx_drx16_n_r, when searching for the next node of pcie_crx_drx16_n_r, it can be seen from fig. 2 that the key of the next node of pcie_crx_drx16_n_r is PERNO/SATA-b+, and PERNO/SATA-b+ represents end point information, so that node information searching for a plurality of nodes of the standard line is completed, and standard line information corresponding to the standard line as shown in the first line of fig. 4 can be obtained.

Further, in the process of searching the standard circuit, standard circuit information corresponding to a plurality of circuits to be detected can be searched at the same time, and each row in fig. 4 represents standard circuit information corresponding to one standard circuit.

And operation 204, detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected.

The method in this embodiment discloses a process of obtaining standard line information corresponding to the line to be detected through the line design table on the basis of the embodiment shown in fig. 1, and obtains the standard line information of the line to be detected through the line design table, so that the line to be detected is detected through the standard line information when the line to be detected is detected, and compared with the process of detecting the line to be detected through human eyes in the prior art, the detection efficiency is high, and the detection accuracy is high.

Fig. 5 shows a third implementation flow diagram of the line detection method according to the embodiment of the present application.

Referring to fig. 5, fig. 5 shows another embodiment of the line detection method described in the present application. The present embodiment describes more specifically and optimizes to a certain extent the process of detecting the line to be detected based on the standard line information and the line identification to be detected based on the embodiment described in fig. 1.

In this embodiment, whether the circuit to be detected is qualified is determined by determining whether the circuit to be detected meets a preset hardware design specification. The preset hardware design rule may be a requirement for detecting the line, for example, only whether the starting point and the end point of the line are correctly accessed or not may be detected, and the preset hardware design rule is that the starting point and the end point of the line to be detected are correctly accessed; if all the elements of the circuit to be detected need to be detected whether to be connected correctly, a preset hardware design rule is that all the elements of the circuit to be detected are connected correctly.

The method in this embodiment includes:

in operation 501, a line detection instruction is received, where the line detection instruction carries a line identifier to be detected of a line to be detected.

And 502, acquiring standard line information from a line design table according to the line identification to be detected, wherein the line design table stores the line design information in the line design process to be detected.

In operation 503, a line start point of the line to be detected is determined according to the line identifier to be detected.

Specifically, the method of the embodiment of the application can be realized based on terminal equipment such as a notebook computer, and in the process of detecting and obtaining the circuit, the terminal equipment is connected with a circuit board where the circuit is located, and the terminal equipment can identify names of a plurality of nodes of the circuit through the detection of the circuit, wherein the names can be shown in a keyword mode.

Further, traversing a plurality of lines of a circuit board where the lines to be detected are located through keywords of a preset starting point of the lines to be detected, and determining nodes, corresponding to the keywords, of the keywords, as the line starting point, wherein the nodes, corresponding to the keywords of the preset starting point, are determined as the lines to be detected.

And (504) traversing the line to be detected from the line starting point to obtain line node information of a plurality of nodes of the line to be detected.

Specifically, the detection of the circuit can detect the element, and the element corresponds to a keyword, for example, a keyword of the resistor is ": r ", the key words of the capacitor are": c ", the key words of the inductance are": l ", the diode key words are": the key words of D' and IC are ": u ", etc.

Further, the detection of the line to be detected is that a plurality of nodes of the line to be detected are detected, and if the element appears in the detection process, the element is not directly detected. The detected node corresponds to the pin of the element, and the node information corresponds to the key word of the pin of the corresponding element. For example, in the case where the element is a resistor, there are two pins corresponding to two nodes "R:1 "and" R:2".

The node may be a start point or an end point of the line, and the node information further includes start point information of the line and end point information of the line.

Traversing a plurality of nodes of the line to be detected one by one from the line starting point of the line to be detected, and identifying the nodes to obtain node information of the nodes of the line to be detected.

In operation 505, it is determined whether the line to be detected meets the preset hardware design rule according to the line node information and the standard line information of the plurality of nodes.

Specifically, line node information of a plurality of nodes of the line to be detected is matched with information corresponding to the plurality of nodes in standard line information, and whether a matching result accords with a preset hardware design rule is judged.

In an embodiment of the present application, the preset hardware design rule includes a line design specification, and line node information of a plurality of nodes in the line node information may be matched with standard node information corresponding to the plurality of nodes in the standard line information, so as to determine whether the line to be detected meets the line design specification.

Specifically, the line design specification includes the overall connection relationship of the line and the line connection standard, which indicates that the reverse connection of the elements in the line cannot occur.

For example, taking the example of the presence of an IC in a line, the key of the IC is ": u ", IC has UPx and DPx two pins and there is an input and output distinction between the two pins. When two nodes corresponding to the IC are detected, if the two nodes are detected at the same time: "UXXXX: UPx "and": UXXXX: in the case of DPx "two pins," UXXXX: UPx "Input," UXXXX: DPx "is the Output.

Furthermore, by matching node information of all nodes of the line with standard node information of corresponding nodes in the standard line information, the line to be detected is indicated to accord with the hardware design rule under the condition that line end point information of a plurality of nodes is identical with the standard line end point information. And under the condition that the line end point information of the plurality of nodes is different from the standard line end point information, the line to be detected does not accord with the hardware design rule.

In operation 506, if the line to be detected meets the preset hardware design rule, it is determined that the line detection result of the line to be detected is that the line to be detected is qualified.

Specifically, according to the matching result obtained in the above operation 505, it is determined whether the line to be detected meets the preset hardware design rule, and if so, it is determined that the line to be detected is qualified.

In operation 507, under the condition that the line to be detected does not conform to the preset hardware design rule, it is determined that the line detection result of the line to be detected is that the line to be detected is not qualified.

Specifically, according to the matching result obtained in 505, it is determined whether the line to be detected meets the preset hardware design rule, and if not, it is determined that the line to be detected is not qualified.

Therefore, the method in this embodiment discloses in detail the process of detecting the line to be detected according to the standard line information and the line identification to be detected on the basis of the embodiment shown in fig. 1, obtains the standard line information corresponding to the line to be detected from the line design table obtained in the process of designing the line to be detected through the line identification to be detected, and detects the line to be detected according to the preset hardware design rule through the standard line information and the line design information in the process of designing the line to be detected, thereby realizing automatic detection of the line to be detected without manual participation, and having high detection efficiency and high detection accuracy.

Fig. 6 shows a fourth implementation flow chart of a method for determining whether a line to be detected in the line detection method according to the embodiment of the present application meets a preset hardware design rule.

Referring to fig. 6, the process of determining whether the line to be tested meets the preset hardware design rule is more specifically described and optimized to a certain extent based on the embodiment described in fig. 5.

In this embodiment, the hardware design rule includes a hardware design specification, where the hardware design specification is that a matching relationship between a start point of a line and an end point of the line meets a set standard, and correspondingly, the method in this embodiment includes:

In operation 601, a line detection instruction is received, where the line detection instruction carries a line identifier to be detected of a line to be detected.

In operation 602, standard line information is obtained from a line design table according to the line identification to be detected, where the line design table stores line design information in the line design process to be detected.

In operation 603, a line start point of the line to be detected is determined according to the line identifier to be detected.

And (604) traversing the line to be detected from the line starting point to obtain line node information of a plurality of nodes of the line to be detected.

Operation 605 determines line node information of the plurality of nodes that does not conform to the element characteristics, and uses the determined line node information as line end point information of the line to be detected.

Specifically, in the case of a relatively simple circuit, for example, the circuit includes only simple elements such as resistors, capacitors, inductors, etc., the middle of the circuit may not be connected in error, and only the starting point and the end point of the circuit need to be detected to determine whether the connection is correct. Correspondingly, the hardware design rule may be that the matching relationship between the starting point of the line and the ending point of the line meets the set standard.

Further, in the case of determining the start point of the line, whether the node is the end point of the line to be detected is determined by determining whether the information of the node is the element characteristic. The component characteristics include the number of component pins and the name of the component, and after the name of the component is detected and the pin corresponding to the component is detected, the component characteristics are proved to be met, and the component exists.

For example, the key word of the resistor is ": r', the resistor is an element with two pins, and in the process of detecting the line to be detected, if the node information of a detected node is ": r3724:1 "and there is another node is": r3724: and 2", the existence of the resistor is proved, the element characteristic is met, and the currently detected node is the element and is not the end point of the line to be detected.

Therefore, in the embodiment of the application, when the detected node of the line to be detected is not a pin of the element, the node is indicated as the end point of the line to be detected, and the line end point information of the line to be detected is obtained.

In operation 606, it is determined whether the line end information is the same as the standard end information in the standard line information, so as to determine whether the line to be detected meets the hardware design rule.

Specifically, the line end point information obtained in the step 605 is matched with standard end point information corresponding to a line start point in the standard information, and the line to be detected is indicated to conform to the hardware design rule when the line end point information is the same as the standard line end point information, and is indicated to not conform to the hardware design rule when the line end point information is different from the standard line end point information.

For example, taking the line start point information of the line start point of the line to be detected as the CPU pcie_tx_n as an example, corresponding to the line start point of the line to be detected, the standard line information CPU pcie_tx_n—— r— c— Device pcie_tx_n of the line to be detected may be obtained from the line design table, where the standard line end point information corresponding to the line to be detected is Device pcie_tx_n, and if the line end point information is Device pcie_tx_n, it indicates that the line to be detected meets the hardware design rule.

In operation 607, under the condition that the line to be detected meets the preset hardware design rule, it is determined that the line detection result of the line to be detected is that the line to be detected is qualified.

In operation 608, if the line to be detected does not meet the preset hardware design rule, it is determined that the line detection result of the line to be detected is that the line to be detected is not qualified.

Therefore, the method in this embodiment discloses in detail the process of determining whether the large detection line meets the preset hardware design specification on the basis of the embodiment shown in fig. 5, and detects the line to be detected according to the preset hardware design rule, so that automatic detection of the line to be detected is realized, manual participation is not needed, detection efficiency is high, and detection accuracy is high.

For further understanding of the embodiments of the present application, a specific example of an application is described below.

Fig. 7 is a schematic implementation flow chart of a specific application example of the line detection method according to the embodiment of the present application.

Referring to fig. 7, a specific application example of the embodiment of the present application is exemplified by a line design table derived for orcad, and a line to be detected belongs to a line of a notebook computer, and the specific application example of the embodiment of the present application detects a line by: operation 701, importing a line design table; operation 702, finding a line start point, and judging whether the line start point meets a target; operation 703, continuing to find the next node along the line to be detected; operation 704, determining whether it is an element; operation 705, if yes, continuing to search for the next node of the element; if not, operation 706, determining whether the line end point is reached; in operation 707, it is determined whether the line to be detected is correct.

Specifically, the scheme of the embodiment of the application can be realized based on a notebook computer, the line to be detected is the line of the notebook computer, the notebook computer is connected with a circuit board where the line to be detected is located, and firstly, an electronic engineer is led into the notebook computer through a line design table obtained in the process of designing the line to be detected through drawing software. The notebook computer searches for a line starting point of the line to be detected and judges whether the line starting point accords with a target starting point, and searches for the next node along the line to be detected under the condition that the line starting point accords with the target starting point, wherein the target starting point is a preset starting point. In the process of searching the nodes, the searched nodes are judged to be elements and then continue searching; when the node is found to be not an element, judging whether the node is a line end point, and judging whether the line start point and the line end point are consistent according to a line design table under the condition that the node is determined to be the line end point, wherein the line start point and the line end point are consistent, the line to be detected is qualified, and the line start point and the line end point are not consistent, and the line is unqualified.

It should be noted that, the description of this specific example of the embodiment of the present application is similar to the description of the embodiment of the method described above, and has similar beneficial effects as the embodiment of the method, so that a detailed description is omitted. The technical details that are not found in this specific application example provided in the embodiment of the present application can be understood from the descriptions in fig. 1 to 6.

Fig. 8 shows a schematic structural diagram of a line detection device according to an embodiment of the present application.

Referring to fig. 8, the embodiment of the present application further provides a line detection device, where the device 80 includes: a receiving module 801, configured to receive a line detection instruction, where the line detection instruction carries a line identifier to be detected of a line to be detected; the standard circuit information obtaining module 802 is configured to obtain standard circuit information from a circuit design table according to a to-be-detected circuit identifier, where the circuit design table stores circuit design information in a to-be-detected circuit design process; and the detection module 803 is configured to detect a line to be detected according to the standard line information and the line identifier to be detected, and obtain a line detection result of the line to be detected.

In an embodiment of the present application, the line identifier to be detected is used to show a preset starting point of the line to be detected; correspondingly, the standard circuit information acquisition module comprises: the determining submodule is used for taking the keywords which are matched with the preset starting points in the line design table as standard starting points; and the traversing submodule is used for traversing the line design table according to the standard starting point to obtain standard line information.

In one embodiment of the present application, the detection module includes: the line start point determining submodule is used for determining a line start point of a line to be detected according to the line identification to be detected; the traversal submodule is used for traversing the line to be detected from the line starting point to obtain line node information of a plurality of nodes of the line to be detected; the judging submodule is used for determining whether a line to be detected accords with a preset hardware design rule according to line node information and standard line information of a plurality of nodes; the first result determining submodule is used for determining that the line detection result of the line to be detected is that the line to be detected is qualified under the condition that the line to be detected accords with a preset hardware design rule; and the second result determining submodule is used for determining that the line detection result of the line to be detected is that the line to be detected is unqualified under the condition that the line to be detected does not accord with the preset hardware design rule.

In an embodiment of the present application, the hardware design rule includes a hardware design specification, where the hardware design specification is that a matching relationship between a start point of a line and an end point of the line meets a set standard; in a corresponding manner,

the judging submodule comprises: determining line node information of a plurality of nodes which does not conform to the element characteristics; taking the determined line node information as line end point information of a line to be detected, wherein the element characteristics comprise element pin numbers and element names; judging whether the line end point information is the same as the standard end point information in the standard line information or not so as to judge whether the line to be detected accords with the hardware design rule or not.

In an embodiment of the present application, the preset hardware design rule includes a circuit design specification, where the circuit design specification is a connection relationship of a circuit and a circuit connection standard; correspondingly, the judging submodule is used for matching the line node information of the plurality of nodes in the line node information with the standard node information corresponding to the plurality of nodes in the standard line information and determining whether the line to be detected meets the line design specification.

According to embodiments of the present application, an electronic device and a readable storage medium are also provided.

Fig. 9 shows a schematic block diagram of an example electronic device 900 that may be used to implement embodiments of the present application. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the application described and/or claimed herein.

As shown in fig. 9, the apparatus 900 includes a computing unit 901 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 902 or a computer program loaded from a storage unit 908 into a Random Access Memory (RAM) 903. In the RAM 903, various programs and data required for the operation of the device 900 can also be stored. The computing unit 901, the ROM 902, and the RAM 903 are connected to each other by a bus 904. An input/output (I/O) interface 905 is also connected to the bus 904.

Various components in device 900 are connected to I/O interface 905, including: an input unit 906 such as a keyboard, a mouse, or the like; an output unit 907 such as various types of displays, speakers, and the like; a storage unit 908 such as a magnetic disk, an optical disk, or the like; and a communication unit 909 such as a network card, modem, wireless communication transceiver, or the like. The communication unit 909 allows the device 900 to exchange information/data with other devices through a computer network such as the internet and/or various telecommunications networks.

The computing unit 901 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of computing unit 901 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 901 performs the respective methods and processes described above, such as a line detection method. For example, in some embodiments, the line detection method may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as the storage unit 908. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device 900 via the ROM 902 and/or the communication unit 909. When the computer program is loaded into the RAM 903 and executed by the computing unit 901, one or more steps of the line detection method described above may be performed. Alternatively, in other embodiments, the computing unit 901 may be configured to perform the line detection method by any other suitable means (e.g. by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems-on-a-chip (SOCs), complex Programmable Logic Devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.

Program code for carrying out methods of the present application may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this application, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the internet.

The computer system may include a client and a server. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server incorporating a blockchain.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present disclosure may be performed in parallel, sequentially, or in a different order, provided that the desired results of the technical solutions disclosed in the present application are achieved, and are not limited herein.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A line detection method, the method comprising:

receiving a line detection instruction, wherein the line detection instruction carries a line identifier to be detected of a line to be detected;

obtaining standard line information from a line design table according to the line identification to be detected, wherein the line design table stores the line design information in the line design process to be detected;

and detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected.

2. The method according to claim 1, wherein the line identification to be detected is used to show a preset starting point of the line to be detected; in a corresponding manner,

the obtaining standard line information from the line design table according to the line identification to be detected includes:

the keywords in the line design table, which are matched with the preset starting points, are used as standard starting points;

traversing the line design table according to the standard starting point to obtain standard line information.

3. The method according to claim 1, wherein the detecting the line to be detected according to the standard line information and the line identification to be detected, to obtain a line detection result of the line to be detected, includes:

Determining a line starting point of the line to be detected according to the line identification to be detected;

traversing the line to be detected from the line starting point to obtain line node information of a plurality of nodes of the line to be detected;

determining whether the line to be detected accords with a preset hardware design rule according to the line node information of the plurality of nodes and the standard line information;

under the condition that the line to be detected accords with the preset hardware design rule, determining that the line detection result of the line to be detected is that the line to be detected is qualified;

and under the condition that the line to be detected does not accord with the preset hardware design rule, determining that the line detection result of the line to be detected is that the line to be detected is unqualified.

4. The method of claim 3, wherein the predetermined hardware design rule comprises a hardware design specification, the hardware design specification being that a matching relationship between a start point of the line and an end point of the line meets a set standard; in a corresponding manner,

the determining whether the line to be detected meets a preset hardware design rule according to the line node information of the plurality of nodes and the standard line information comprises the following steps:

Determining line node information of the plurality of nodes, wherein the line node information does not accord with line node information of element characteristics, and taking the determined line node information as line end point information of the line to be detected, wherein the element characteristics comprise element pin numbers and element names;

and judging whether the line end point information is the same as the standard end point information in the standard line information or not so as to judge whether the line to be detected accords with the preset hardware design rule or not.

5. The method of claim 3, wherein the predetermined hardware design rules include a line design specification, the line design specification being a connection relationship and a line connection standard of the line; in a corresponding manner,

and matching the line node information of the plurality of nodes in the line node information with standard node information corresponding to the plurality of nodes in the standard line information, and determining whether the line to be detected meets the line design specification.

6. A line testing apparatus, the apparatus comprising:

The receiving module is used for receiving a line detection instruction, wherein the line detection instruction carries a line identifier to be detected of a line to be detected;

the standard circuit information acquisition module is used for acquiring standard circuit information from a circuit design table according to the circuit identification to be detected, wherein the circuit design table stores circuit design information in the circuit design process to be detected;

and the detection module is used for detecting the line to be detected according to the standard line information and the line identification to be detected, and obtaining a line detection result of the line to be detected.

7. The apparatus of claim 6, wherein the line identification to be detected is used to show a preset starting point of the line to be detected; in a corresponding manner,

the standard circuit information acquisition module comprises:

a determining submodule, configured to use a keyword in the line design table, which is matched with the preset starting point, as a standard starting point;

and the traversing submodule is used for traversing the line design table according to the standard starting point to obtain standard line information.

8. The apparatus of claim 7, wherein the detection module comprises:

a line start point determining sub-module, configured to determine a line start point of the line to be detected according to the line identifier to be detected;

The traversing sub-module is used for traversing the line to be detected from the line starting point to obtain line node information of a plurality of nodes of the line to be detected;

the judging submodule is used for determining whether the circuit to be detected accords with a preset hardware design rule according to the circuit node information of the plurality of nodes and the standard circuit information;

the first result submodule is used for determining that the line detection result of the line to be detected is that the line to be detected is qualified under the condition that the line to be detected accords with a preset hardware design rule;

and the second result submodule is used for determining that the line detection result of the line to be detected is that the line to be detected is unqualified under the condition that the line to be detected does not accord with a preset hardware design rule.

9. An electronic device, comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein,,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-5.

10. A computer readable storage medium storing computer instructions for causing the computer to perform the method of any one of claims 1-5.