CN108761187B

CN108761187B - Substrate current testing method and system and terminal equipment

Info

Publication number: CN108761187B
Application number: CN201810573482.8A
Authority: CN
Inventors: 李路路
Original assignee: Oppo Chongqing Intelligent Technology Co Ltd
Current assignee: Oppo Chongqing Intelligent Technology Co Ltd
Priority date: 2018-06-06
Filing date: 2018-06-06
Publication date: 2021-06-25
Anticipated expiration: 2038-06-06
Also published as: CN108761187A

Abstract

The application is suitable for the technical field of terminals, and provides a substrate current testing method, a system and terminal equipment, which are applied to an electronic terminal, wherein the electronic terminal comprises a power supply system, an MIPI D-PHY and at least one load, and the MIPI D-PHY is connected between a current output end of the power supply system and a current input end of the load; the substrate current testing method comprises the following steps: detecting whether the electronic terminal is in a sleep state or a standby state; when the electronic terminal is in a sleep state or a standby state, controlling the power supply system to stop supplying power to the MIPI D-PHY so as to eliminate leakage current between the MIPI D-PHY and a power ground; obtaining a base current of the load after the power supply system stops supplying power to the MIPI D-PHY. The embodiment of the application can eliminate the leakage current between the MIPI D-PHY and the power ground, thereby effectively ensuring the stability of the electronic terminal, further effectively acquiring the base current of the load and realizing the test of the base current of the load.

Description

Substrate current testing method and system and terminal equipment

Technical Field

The application belongs to the technical field of terminals, and particularly relates to a method and a system for testing a substrate current and terminal equipment.

Background

Before an electronic terminal such as a mobile phone, a tablet computer, a personal digital assistant, etc. leaves a factory, power consumption analysis is usually required to detect whether the electronic terminal is qualified. Whether the substrate current of the electronic terminal in a standby state or a sleep state is increased is an important index for analyzing the power consumption of the electronic terminal. Testing the substrate current typically requires disassembling each component of the electronic terminal in turn until the minimum number of components that can perform the basic function (typically only the low dropout regulator of the power management chip and the corresponding load) are left to determine the current consumed by each component, thereby testing the components that result in the increase in substrate current.

However, in the prior art, when the electronic terminal is controlled to be in a standby state or a sleep state, an Interface of a Mobile Industry Processor Interface (MIPI) D-PHY (Physical layer) of the electronic terminal is turned off, so that a half-high voltage exists in a power input line of the MIPI D-PHY relative to a power ground, thereby generating a leakage current and seriously affecting the stability of the electronic terminal.

Disclosure of Invention

In view of this, embodiments of the present application provide a substrate current testing method, system and terminal device to solve the problem in the prior art that when an electronic terminal is controlled in a standby state or a sleep state, an interface of an MIPID-PHY of the electronic terminal is turned off, so that a power input line of the MIPI D-PHY has a half-high voltage with respect to a power ground, thereby generating a leakage current and seriously affecting the stability of the electronic terminal.

A first aspect of an embodiment of the present application provides a substrate current testing method, which is applied to an electronic terminal, where the electronic terminal includes a power supply system, a MIPI D-PHY, and at least one load, and the MIPI D-PHY is connected between a current output end of the power supply system and a current input end of the load;

the substrate current testing method comprises the following steps:

detecting whether the electronic terminal is in a sleep state or a standby state;

when the electronic terminal is in a sleep state or a standby state, controlling the power supply system to stop supplying power to the MIPI D-PHY so as to eliminate leakage current between the MIPI D-PHY and a power ground;

obtaining a base current of the load after the power supply system stops supplying power to the MIPI D-PHY.

A second aspect of the embodiment of the present application provides a substrate current testing system, which is applied to an electronic terminal, where the electronic terminal includes a power supply system, a MIPI D-PHY, and at least one load, and the MIPI D-PHY is connected between a current output end of the power supply system and a current input end of the load;

the substrate current test system includes:

the detection module is used for detecting whether the electronic terminal is in a sleep state or a standby state;

the control module is used for controlling the power supply system to stop supplying power to the MIPI D-PHY when the electronic terminal is in a sleep state or a standby state so as to eliminate leakage current between the MIPI D-PHY and a power ground;

the obtaining module is used for obtaining the base current of the load after the power supply system stops supplying power to the MIPI D-PHY.

A third aspect of the embodiments of the present application provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the steps of the method when executing the computer program.

A fourth aspect of the embodiments of the present application provides a computer-readable storage medium, which stores a computer program, and when the computer program is executed by a processor, the computer program implements the steps of the above method.

According to the embodiment of the application, when the electronic terminal is in a sleep state or a standby state, the power supply system of the electronic terminal is controlled to stop supplying power for the MIPI D-PHY, so that leakage current between the MIPI D-PHY and a power ground is eliminated, the stability of the electronic terminal can be effectively guaranteed, the base current of a load is effectively obtained, and the base current of the load is tested.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.

Fig. 1 is a schematic structural diagram of an electronic terminal according to an embodiment of the present application;

FIG. 2 is a schematic flowchart of a substrate current testing method according to an embodiment of the present disclosure;

FIG. 3 is a schematic structural diagram of an electronic terminal and a substrate current testing circuit according to a second embodiment of the present application;

FIG. 4 is a schematic structural diagram of an electronic terminal and a substrate current testing circuit provided in the third embodiment of the present application;

FIG. 5 is a schematic structural diagram of an electronic terminal and a substrate current testing circuit according to a fourth embodiment of the present disclosure;

FIG. 6 is a schematic structural diagram of an electronic terminal and a substrate current testing circuit provided in the fifth embodiment of the present application;

FIG. 7 is a schematic structural diagram of an electronic terminal and a substrate current test circuit according to a sixth embodiment of the present application;

FIG. 8 is a schematic structural diagram of a substrate current testing system according to a seventh embodiment of the present disclosure;

fig. 9 is a schematic structural diagram of a terminal device according to an eighth embodiment of the present application.

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

In order to explain the technical solution described in the present application, the following description will be given by way of specific examples.

Example one

The embodiment provides a substrate current testing method which is applied to an electronic terminal.

In a specific application, the electronic terminal may be a mobile phone, a tablet computer, a personal digital assistant, an intelligent bracelet, a notebook computer, or the like, and includes a power supply system and a power management chip, and any electronic terminal that needs to detect a base current in a sleep state or a standby state before leaving a factory to analyze power consumption.

As shown in fig. 1, the present embodiment provides an electronic terminal 100, which includes a power supply system 10, a MIPI D-PHY20, and at least one load (K loads are exemplarily shown in fig. 1, and are respectively represented as a load 31, a load 32, a load … …, a load 3i, and a load … …, and a load 3K, where K ≧ i ≧ 1, and K and i are integers), a MIPI D-PHY20 is connected between a current output terminal of the power supply system 10 and a current input terminal of each load, and K current output terminals of the MIPI D-PHY20 sequentially correspond to the K loads.

In a specific application, the Power supply system may include a Power supply, and a Power Management chip (PMIC) connected to the Power supply, the PMIC may include a Low Dropout Regulator (LDO) and/or a DC (direct current)/DC converter, and the Power conversion module may be a Low Dropout Regulator or a DC/DC converter.

In a specific application, the load may be any power consuming functional module connected to the MIPI D-PHY in the electronic terminal, such as a camera module, a display module, a radio frequency/baseband module, and the like. The load may specifically be a load directly powered by a power supply of the power supply system, or may be a load indirectly powered by the power supply of the power supply system through the low dropout linear regulator or the DC/DC converter, or may be a load powered by a power management chip of the power supply system.

As shown in fig. 2, based on the electronic terminal 100 shown in fig. 1, the substrate current testing method includes:

step S201, detecting whether the electronic terminal is in a sleep state or a standby state.

In a specific application, the operating state of the electronic terminal is controlled by a processor (usually a baseband processor) of the electronic terminal, so that whether the electronic terminal is in a sleep state or a standby state can be detected by the processor of the electronic terminal, and can also be detected by another terminal device with a data processing function, which is in communication connection with the processor of the electronic terminal. The other terminal devices may be devices such as a PC (Personal Computer) client, a tablet Computer, a notebook Computer, or a dedicated processing device, a server, etc., which have a data processing function and a human-Computer interaction function, or may be connected to a human-Computer interaction device such as a display screen, a mouse, a keyboard, etc.

Step S202, when the electronic terminal is in a sleep state or a standby state, controlling the power supply system to stop supplying power to the MIPI D-PHY so as to eliminate leakage current between the MIPI D-PHY and a power ground;

step S203, after the power supply system stops supplying power to the MIPI D-PHY, obtaining a base current of the load.

In a specific application, the substrate current testing method may be specifically executed by a processor of an electronic terminal, and may also be executed by the other terminal device.

In one embodiment, after step S203, the method further includes:

detecting whether a base current of the load is greater than a base current threshold of the load;

debugging the load when the base current of the load is greater than the base current threshold of the load;

returning to step S203 until the base current of the load is less than or equal to the base current threshold of the load.

Example two

Existing approaches to testing substrate current typically require that each component of the electronic terminal be disassembled in turn until the minimum number of components capable of performing the basic function remains to determine the current consumed by each component to test the component that results in an increase in substrate current. The mode needs more disassembled components, wastes time and labor, has low efficiency, and can cause certain damage to the circuit board of the electronic terminal.

As shown in fig. 3, the present embodiment provides a substrate current testing circuit 200 applied to the electronic terminal 100 in the first embodiment, which includes K voltage dividing resistors (exemplarily shown as voltage dividing resistor R201, voltage dividing resistors R202 and … …, voltage dividing resistors R20i and … …, and voltage dividing resistor R20K in fig. 3), wherein the i-th voltage dividing resistor 20i is connected in series between the i-th current output terminal of the MIPI D-PHY20 and the current input terminal of the i-th load 3i, two voltage test points are led out from two ends 20i of the i-th voltage dividing resistor, and the voltage test points led out from two ends of each voltage dividing resistor are respectively shown as U201 and U201 ', U202 and U202', … …, U20i, and U20i ', … …, U20K, and U20K'.

In a specific application, the number of K is determined by the actual number of loads connected to the MIPI D-PHY in the electronic terminal under test.

In this embodiment, based on the structure of the electronic terminal 100 and the substrate current testing circuit 200 shown in fig. 3, the step S203 in the first embodiment includes:

and acquiring the substrate current of the load through a substrate current test circuit.

In this embodiment, obtaining the substrate current of the load through the substrate current testing circuit includes:

acquiring a voltage value of a voltage test point at two ends of an ith divider resistor and a resistance value of the ith divider resistor;

calculating the current passing through the ith divider resistor according to the voltage value of the voltage test point at the two ends of the ith divider resistor and the resistance value of the ith divider resistor; and the current passing through the ith divider resistor is equal to the substrate current of the ith load.

In this embodiment, according to the voltage value of the voltage test point at the two ends of the ith voltage-dividing resistor and the resistance value of the ith voltage-dividing resistor, the formula for calculating the current passing through the ith voltage-dividing resistor is as follows:

the substrate current of the ith load is equal to the voltage difference of the voltage test points at two ends of the ith divider resistor/the resistance value of the ith divider resistor.

In specific application, the resistance value of each divider resistor is a known definite value, the voltage of the voltage test point can be detected by voltage measuring equipment capable of testing the voltage such as a universal meter and a voltmeter, the resistance values of different divider resistors can be the same or different, and the resistor with the corresponding resistance value can be selected as the divider resistor according to actual needs.

In specific application, all the voltage dividing resistors can be precision resistors with resistance error, thermal stability (temperature coefficient), distribution parameters (distributed capacitance and distributed inductance) and other indexes reaching a certain standard, for example, 100R precision resistors.

In one embodiment, in order to realize accurate test of the substrate current of the load and reduce test errors, the divider resistor can be a rheostat, the voltage of the voltage test points at two ends of the divider resistor is tested and the voltage difference is calculated by changing the resistance value of the divider resistor when the resistance values of the divider resistor are different, then the average value of the voltage difference obtained by multiple times of calculation is taken, the substrate current of the load corresponding to the divider resistor is obtained by calculation according to the average value of the voltage difference and ohm's law, and more accurate substrate current can be obtained; the substrate current of the load corresponding to the voltage dividing resistor is equal to the average value of the voltage difference/the resistance value of the voltage dividing resistor.

The embodiment provides a substrate circuit testing circuit comprising at least one divider resistor, wherein the divider resistor is connected in series between the current output end of the MIPI D-PHY of the electronic terminal and the current input end of the corresponding load, and a voltage test point is respectively led out from two ends of the divider resistor, so that whether the substrate current of the corresponding load is larger or not can be judged by detecting the voltage of the voltage test point, the current testing efficiency can be effectively improved, and the integrity of a circuit board of the electronic terminal is ensured.

EXAMPLE III

As shown in fig. 4, in the present embodiment, the power supply system 10 includes a power management chip 11, the power management chip 11 includes a Low Dropout Regulator (LDO) 111, a current output terminal of the LDO 111 is connected to the MIPI D-PHY20, and the LDO 111 corresponds to M voltage-dividing resistors of the K voltage-dividing resistors and M loads of the K loads;

wherein K is more than or equal to M and more than or equal to 1, and M is an integer.

As shown in fig. 4, the M voltage-dividing resistors are exemplarily shown as the first M voltage-dividing resistors in the K voltage-dividing resistors, and the M loads are the first M loads in the K loads.

In a specific application, the number of M is determined by the actual number of loads in the electronic terminal under test that are powered by the low dropout linear regulator of the power management chip.

The embodiment can realize the detection of the substrate current of the load powered by the power management chip of the power management chip in the electronic terminal, effectively improve the current testing efficiency and ensure the integrity of the circuit board of the electronic terminal.

Example four

As shown in fig. 5, in this embodiment, the power supply system 10 in the second embodiment or the third embodiment includes a power management chip 11, the power management chip 11 includes a DC/DC converter 112, a current output terminal of the DC/DC converter 112 is connected to the MIPI D-PHY20, and the DC/DC converter 112 corresponds to N voltage-dividing resistors of the K voltage-dividing resistors and N loads of the K loads;

wherein K is more than or equal to N and more than or equal to 1, and N is an integer.

Fig. 5 exemplarily shows a case where the present embodiment is implemented on the basis of the third embodiment.

As shown in fig. 5, the N voltage-dividing resistors are exemplarily shown as N voltage-dividing resistors after the M voltage-dividing resistors; the N loads are N loads after the M loads.

In a specific application, the number of N is determined by the actual number of loads in the electronic terminal under test that are powered by the low dropout linear regulator of the power management chip.

The embodiment can realize the detection of the substrate current of the load powered by the DC/DC converter of the power management chip in the electronic terminal, effectively improve the current testing efficiency and ensure the integrity of the circuit board of the electronic terminal.

EXAMPLE five

As shown in fig. 6, in this embodiment, the power supply system 10 in the second embodiment, the third embodiment, or the fourth embodiment includes a power supply 12, a current output terminal of the power supply 12 is connected to the MIPI D-PHY20, and the power supply 20 corresponds to m voltage-dividing resistors of the K voltage-dividing resistors and m loads of the K loads;

wherein, K is more than or equal to m and more than or equal to 1, and m is an integer.

When the present embodiment is implemented based on the third embodiment or the fourth embodiment, the current output terminal of the power supply 12 is further connected to the current input terminal of the power management chip 11.

Fig. 6 exemplarily shows a case where the present embodiment is implemented on the basis of the fourth embodiment.

As shown in fig. 6, the m voltage-dividing resistors are exemplarily shown as m voltage-dividing resistors after the N voltage-dividing resistors; the m loads are m loads after the N loads.

In a specific application, the power supply may specifically be a direct current power supply circuit directly connected to the power adapter, or may be a rechargeable battery circuit.

In a particular application, the number of m is determined by the actual number of loads in the electronic terminal under test that are directly powered by the power supply.

The embodiment can realize the detection of the substrate current of the load directly supplied by the power supply of the electronic terminal, effectively improve the current testing efficiency and ensure the integrity of the circuit board of the electronic terminal.

EXAMPLE six

As shown in fig. 7, in the present embodiment, the power supply system 10 in the second embodiment, the third embodiment or the fourth embodiment includes a power supply 12 and a power conversion module 13;

the current output end of the power supply 12 is connected with the current input end of the power supply conversion module 13, the current output end of the power supply conversion module 13 is connected with the MIPI D-PHY20, and the power supply conversion module 13 corresponds to n voltage dividing resistors in the K voltage dividing resistors and n loads in the K loads;

Fig. 7 exemplarily shows a case where the present embodiment is implemented on the basis of embodiment five.

As shown in fig. 7, the n voltage-dividing resistors are exemplarily shown as n voltage-dividing resistors after the m voltage-dividing resistors; the n loads are n loads subsequent to the m loads.

In a specific application, the power conversion module is a low dropout regulator or a DC/DC converter.

In a specific application, the number of n is determined by the actual number of loads in the tested electronic terminal, which are powered by the power conversion module connected to the power supply.

The embodiment can realize the detection of the substrate current of the load powered by the power conversion module of the electronic terminal, effectively improve the current testing efficiency and ensure the integrity of the circuit board of the electronic terminal.

EXAMPLE seven

As shown in fig. 8, the present embodiment provides a substrate current testing system 300, to which the electronic terminal in any one of the first to sixth embodiments is applied, for correspondingly performing the steps of the substrate current testing method in the first embodiment or the second embodiment, wherein the substrate current testing system 300 includes:

a detecting module 301, configured to detect whether the electronic terminal is in a sleep state or a standby state;

a control module 302, configured to control the power supply system to stop supplying power to the MIPI D-PHY when the electronic terminal is in a sleep state or a standby state, so as to eliminate a leakage current between the MIPI D-PHY and a power ground;

an obtaining module 303, configured to obtain a base current of the load after the power supply system stops supplying power to the MIPI D-PHY.

In a specific application, the substrate current testing system may be a software program system executed by a processor of an electronic terminal or by the other terminal device.

In one embodiment, the substrate current testing system further comprises:

the current detection module is used for detecting whether the substrate current of the load is larger than the substrate current threshold of the load or not;

the debugging module is used for debugging the load when the base current of the load is larger than the base current threshold of the load;

the return module returns to the obtaining module 303 until the base current of the load is less than or equal to the base current threshold of the load.

In one embodiment, the obtaining module 303 is specifically configured to obtain the substrate current of the load through a substrate current testing circuit.

In one embodiment, obtaining the substrate current of the load by the substrate current test circuit includes:

Example eight

As shown in fig. 9, the present embodiment provides a terminal device 400, which includes: a processor 401, a memory 402, and a computer program 403, such as a substrate current test program, stored in the memory 402 and executable on the processor 401. The processor 401, when executing the computer program 403, implements the steps in the above embodiments of the substrate current testing method, such as the steps S201 to S203 shown in fig. 1. Alternatively, the processor 401, when executing the computer program 403, implements the functions of the modules in the device embodiments, such as the functions of the modules 301 to 303 shown in fig. 8.

Illustratively, the computer program 403 may be partitioned into one or more modules that are stored in the memory 402 and executed by the processor 401 to implement the present invention. The one or more modules may be a series of computer program instruction segments capable of performing specific functions, which are used for describing the execution process of the computer program 403 in the terminal device 400. For example, the computer program 403 may be divided into a detection module, a control module, and an acquisition module, and the specific functions of each module are as follows:

The terminal device 400 may be a desktop computer, a notebook, a palm computer, a cloud server, or other computing devices. The terminal device may include, but is not limited to, a processor 401, a memory 402. Those skilled in the art will appreciate that fig. 9 is merely an example of a terminal device 400 and does not constitute a limitation of terminal device 400 and may include more or fewer components than shown, or some components may be combined, or different components, e.g., the terminal device may also include input output devices, network access devices, buses, etc.

The Processor 401 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The storage 402 may be an internal storage unit of the terminal device 400, such as a hard disk or a memory of the terminal device 400. The memory 402 may also be an external storage device of the terminal device 400, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are provided on the terminal device 400. Further, the memory 402 may also include both an internal storage unit and an external storage device of the terminal device 400. The memory 402 is used for storing the computer programs and other programs and data required by the terminal device. The memory 402 may also be used to temporarily store data that has been output or is to be output.

It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

In the embodiments provided in the present invention, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other ways. For example, the above-described embodiments of the apparatus/terminal device are merely illustrative, and for example, the division of the modules or units is only one logical division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated module, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow of the method according to the embodiments of the present invention may also be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. . Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain other components which may be suitably increased or decreased as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media which may not include electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.

The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims

1. A substrate current testing method is applied to an electronic terminal, wherein the electronic terminal comprises a power supply system, an MIPI D-PHY and at least one load, the MIPI D-PHY is connected between a current output end of the power supply system and a current input end of the load, the power supply system comprises a power supply and at least one of a power supply management chip and a power supply conversion module which are connected with the power supply and the MIPI D-PHY;

the substrate current testing method comprises the following steps:

obtaining a base current of the load after the power supply system stops supplying power to the MIPI D-PHY;

returning to obtain the base current of the load until the base current of the load is less than or equal to the base current threshold of the load;

obtaining a base current of the load, comprising:

obtaining a substrate current of the load through a substrate current test circuit;

k current output ends of the MIPI D-PHY correspond to K loads of the electronic terminal;

the substrate current test circuit comprises K divider resistors, an ith divider resistor is connected in series between an ith current output end of the MIPI D-PHY and a current input end of an ith load of the electronic terminal, two ends of the ith divider resistor are respectively led out a voltage test point, and whether the substrate current of the corresponding load is larger or not is judged by detecting the voltage of the voltage test point so as to ensure the integrity of a circuit board of the electronic terminal;

the voltage dividing resistor is a rheostat, the voltage of voltage test points at two ends of the voltage dividing resistor is tested and the voltage difference is calculated when the resistance values of the voltage dividing resistor are different by changing the resistance values of the voltage dividing resistor, then the average value of the voltage difference obtained by multiple times of calculation is taken, and the substrate current of the load corresponding to the voltage dividing resistor is obtained by calculation according to the average value of the voltage difference and an ohm law;

and K is more than or equal to i and more than or equal to 1, K and i are integers, and the substrate current of the load corresponding to the divider resistor = the average value of the voltage difference/the resistance value of the divider resistor.

2. The substrate current testing method of claim 1, wherein the power supply system comprises a power management chip, the power management chip comprising a low dropout linear regulator;

the current output end of the low dropout linear regulator is connected with the MIPI D-PHY, and the low dropout linear regulator corresponds to M voltage dividing resistors in the K voltage dividing resistors and M loads in the K loads;

3. The substrate current testing method of claim 1, wherein the power supply system comprises a power management chip, the power management chip comprising a DC/DC converter;

the current output end of the DC/DC converter is connected with the MIPI D-PHY, and the DC/DC converter corresponds to N voltage dividing resistors in the K voltage dividing resistors and N loads in the K loads;

4. The substrate current testing method of claim 1, wherein a current output terminal of the power supply is connected to the MIPI D-PHY, the power supply corresponding to m of the K voltage-dividing resistors and m of the K loads;

5. The substrate current testing method of claim 1, wherein the power supply system comprises a power supply and a power conversion module;

the current output end of the power supply is connected with the current input end of the power supply conversion module, the current output end of the power supply conversion module is connected with the MIPI D-PHY, and the power supply conversion module corresponds to n voltage dividing resistors in the K voltage dividing resistors and n loads in the K loads;

6. A substrate current testing system is applied to an electronic terminal, wherein the electronic terminal comprises a power supply system, an MIPI D-PHY and at least one load, the MIPI D-PHY is connected between a current output end of the power supply system and a current input end of the load, the power supply system comprises a power supply and at least one of a power supply management chip and a power supply conversion module which are connected with the power supply and the MIPI D-PHY;

the substrate current test system includes:

the obtaining module is used for obtaining the base current of the load after the power supply system stops supplying power to the MIPI D-PHY;

a return module that returns to the acquisition module until a base current of the load is less than or equal to a base current threshold of the load;

the obtaining module is specifically used for obtaining the substrate current of the load through a substrate current testing circuit;

7. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 5 when executing the computer program.