CN111312733B - 阵列基板及其制备方法 - Google Patents
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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Abstract
本申请提供一种阵列基板及其制备方法，所述阵列基板包括有源层，所述有源层包括氧化物半导体薄膜，所述氧化物半导体薄膜包括非晶相和晶相，在本申请中，所述有源层采用晶相和非晶相形成，提高了有源层的离子迁移率，并，降低了的能耗，从而提高了有源层的电学特性，进而提高了阵列基板的性能。
Description
技术领域
本申请涉及显示面板技术领域，具体涉及一种阵列基板及其制备方法。
背景技术
目前，薄膜晶体管的有源层通常采用氧化物半导体材料形成，相较于非晶硅材料，所述氧化物半导体材料载流子的迁移率较低，导致电学性能低，且，在应用中，面积较大，影响产品的分别率。
发明内容
本申请提供一种阵列基板及其制备方法，以解决阵列基板电学性能低及分辨率低的问题。
本申请提供一种阵列基板，所述阵列基板包括有源层，所述有源层包括氧化物半导体薄膜，所述氧化物半导体薄膜包括非晶相和晶相。
在本申请所提供的显示面板中，所述非晶相为网络结构，所述晶相分散于所述非晶相中。
在本申请所提供的显示面板中，所述非晶相和所述晶相的质量比为1：1至10：1。
在本申请所提供的显示面板中，所述晶相的直径为2纳米-20纳米。
本申请还提供一种阵列基板的制备方法，包括：
提供一基板；
在所述基板上采用物理气相沉积方法形成有源层；
对所述有源层进行退火处理，形成具有氧化物半导体薄膜的有源层，所述氧化物半导体薄膜包括晶相和非晶相，所述有源层与所述基板形成阵列基板。
在本申请所提供的阵列基板的制备方法中，所述退火的时间为10分钟-120分钟。
在本申请所提供的阵列基板的制备方法中，所述退火的温度为200摄氏度-450摄氏度。
在本申请所提供的阵列基板的制备方法中，所述退火的气氛包括干燥空气、氮气和氧气中的一种或几种组合。
在本申请所提供的阵列基板的制备方法中，所述在所述基板上采用物理气相沉积方法形成有源层的气氛为氩气和氧气的混合气氛。
在本申请所提供的阵列基板的制备方法中，所述在所述基板上采用物理气相沉积方法形成有源层的温度为100摄氏度-350摄氏度。
本申请提供一种阵列基板及其制备方法，所述阵列基板包括有源层，所述有源层包括氧化物半导体薄膜，所述氧化物半导体薄膜包括非晶相和晶相，在本申请中，所述有源层采用晶相和非晶相形成，提高了有源层的离子迁移率，并，降低了的能耗，从而提高了阵列基板的电学特性及分别率，进而提高了阵列基板的性能。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请所提供的阵列基板的结构剖视图。
图2为本申请所提供的阵列基板的制备方法流程图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
请参阅图1，图1为本申请所提供的阵列基板的结构剖视图。本申请提供一种阵列基板10。所述阵列基板10包括基板100和有源层200。
所述有源层200设置于所述基板100上。所述有源层200的材料选自铟镓锌氧化物、铟镓锌钛氧化物、氧化铟锌和氧化锌。所述有源层200包括氧化物半导体薄膜。所述氧化物半导体薄膜包括非晶相和晶相。所述非晶相为网络结构，所述晶相分散于所述非晶相中。具体的，所述非晶相为三维网络结构。所述非晶相和所述晶相的质量比为1：1至10：1。所述晶相的直径为2纳米-20纳米。具体的，在一些实施例中，所述非晶相与所述晶相的质量比可以为2：1、4：1、6：1或9：1等。在一些实施例中，所述晶相的直径可以为5纳米、7纳米、8纳米、10纳米、15纳米或18纳米等。
在另一实施例中，所述阵列基板10还包括栅极300、第一保护层400、栅极绝缘层500、源极600、漏极700和第二保护层800。所述栅极300设置于所述基板100上。所述栅极300的材料包括Mo、Al、Ti、In和Ga中的一种或几种组合。所述第一保护层400覆盖所述栅极300。所述栅极绝缘层500设置于所述第一保护层400上。所述栅极绝缘层500的材料包括Al2O3、SiOx和SiNX中的一种或几种组合。所述有源层200设置于所述栅极绝缘层500上。所述有源层200的材料包括非晶硅。所述源极600设置于所述栅极绝缘层500的一端及所述有源层200的一端。所述漏极700设置于所述栅极绝缘层500的另一端及所述有源层200的另一端。所述源极600与所述漏极700相互绝缘。所述第二保护层800覆盖所述源极600、所述漏极700及所述栅极绝缘层500。所述栅极300、所述第一保护层400、所述栅极绝缘层500、所述有源层200、所述源极600、所述漏极700和所述第二保护层800组成薄膜晶体管11。所述第二保护层800用于保护所述薄膜晶体管11的结构，避免其他结构或水氧对所述薄膜晶体管11中其他结构的影响。所述薄膜晶体管11除图2中所示出的结构外，还包括其他结构，此处不一一列出。
在本申请中，所述有源层由晶相和非晶相的材料形成，且，所述非晶相形成三维网络结构，所述晶相分散于所述非晶相中，并被所述非晶相包覆，进而提高有源层的离子迁移率，并降低能耗，从而提高有源层的电学性能，进而提高了阵列基板的电学性能；因所述有源层由晶相和非晶相形成，缩小了薄膜晶体管的尺寸，进而提高了阵列基板的分别率。
请参阅图2，图2为本申请所提供的阵列基板的制备方法流程图。本申请还提供一种阵列基板的制备方法，
20、提供一基板100。
30、在所述基板100上采用物理气相沉积方法形成有源层200。
具体的，在所述基板100上采用物理气相沉积技术中的沉积有源层200材料，形成所述有源层200。具体的，采用物理气相沉积技术中的溅射方式形成所述有源层200。所述有源层200的材料选自铟镓锌氧化物、铟镓锌钛氧化物、氧化铟锌和氧化锌。所述溅射功率5-20kW。所述溅射气氛为Ar与O2混合气氛。Ar与O2气氛流量比为3：1至20：1，Ar流量为50-150sccm。气氛压力为0.2帕-0.5帕。溅射温度为100-350摄氏度。具体的，在本实施例中，所述溅射功率为5kW，所述溅射气氛Ar和O2流量比为3：1，当Ar的流量为60sccm，O2的流量为20sccm，压力为0.2帕，溅射温度为120摄氏度。溅射完成后，对所述有源层200进行曝光和蚀刻，形成图案化的有源层200。在形成图案化的有源层200过程中，温度不变。
在一些实施例中，所述溅射功率还可以为7kW、9kW、12kW、18kW或19kW等。
在一种实施例中，所述溅射气氛Ar和O2流量比为5：1，如，当Ar的流量为100sccm时，O2的流量为20sccm。
在一种实施例中，所述溅射气氛Ar和O2流量比为6：1，如，当Ar的流量为120sccm时，O2的流量为20sccm。
在一种实施例中，所述溅射气氛Ar和O2流量比为9：1，如，当Ar的流量为180sccm时，O2的流量为20sccm，
在一种实施例中，所述溅射气氛Ar和O2流量比为15：1，如，当Ar的流量为120sccm时，O2的流量为8sccm。
在一些实施例中，压力还可以为0.3帕、0.4帕或0.45帕等。
在一些实施例中，溅射温度还可以为120摄氏度、140摄氏度、180摄氏度或310摄氏度等。
40、对所述有源层200进行退火处理，形成具有氧化物半导体薄膜的有源层，所述氧化物半导体薄膜包括晶相和非晶相，所述有源层200与所述基板100形成阵列基板10。
对所述图案化的有源层200在干燥空气、氮气和氧气中的一种或几种组合中及200摄氏度-450摄氏度的温度下，退火10分钟-120分钟，退火10分钟-120分钟后，进行迅速的降温处理，降温速度为10-100摄氏度每秒，进行10分钟-120分钟的低温退火，具体的，对所述图案化的有源层200在氮气和氧气的混合气氛及200摄氏度的条件下，退火10分钟，之后进行降温处理，降温速度为20摄氏度每秒，之后，再进行10分钟的低温退火。得到具有微晶状态下的氧化物半导体薄膜。再完成剩余的制程。
在一些实施例中，所述退火的温度还可以为250摄氏度、300摄氏度、360摄氏度或430摄氏度等。
在一些实施例中，所述退火的时间还可以为30分钟、80分钟或100分钟等。
在一些实施例中，所述降温速度还可以为50摄氏度每秒、80摄氏度每秒或90摄氏度每秒等。
在一些实施例中，所述低温退火的时间还可以为20分钟、50分钟、80分钟或110分钟等。
本申请提供一种阵列基板及其制备方法，所述阵列基板包括有源层，所述有源层由晶相和非晶相的材料形成，且，所述非晶相形成三维网络结构，所述晶相分散于所述非晶相中，并被所述非晶相包覆，进而提高有源层的离子迁移率，并降低能耗，从而提高有源层的电学性能，进而提高了阵列基板的电学性能；因所述有源层由晶相和非晶相形成，缩小了薄膜晶体管的尺寸，进而提高了阵列基板的分别率，进而提高了阵列基板的性能。
以上仅为本申请的实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。
Claims (3)
1.一种阵列基板的制备方法，其特征在于，包括：
提供一基板；
在所述基板上采用物理气相沉积方法形成有源层；
对所述有源层进行退火处理，形成具有氧化物半导体薄膜的有源层，所述氧化物半导体薄膜包括晶相和非晶相，所述有源层与所述基板形成阵列基板；
所述非晶相和所述晶相的质量比为1：1至10：1；
所述晶相的直径为2纳米-20纳米；
所述对所述有源层进行退火处理的步骤包括：
对图案化的有源层在干燥空气、氮气和氧气中的一种或几种组合中及200摄氏度-450摄氏度的温度下，退火10分钟-120分钟，退火10分钟-120分钟后，进行迅速的降温处理，降温速度为10-100摄氏度每秒，进行10分钟-120分钟的低温退火。
2.如权利要求1所述的阵列基板的制备方法，其特征在于，所述在所述基板上采用物理气相沉积方法形成有源层的气氛为氩气和氧气的混合气氛。
3.如权利要求1所述的阵列基板的制备方法，其特征在于，所述在所述基板上采用物理气相沉积方法形成有源层的温度为100摄氏度-350摄氏度。
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