CN111243507A - 像素感测装置及包括该像素感测装置的有机发光显示装置 - Google Patents
像素感测装置及包括该像素感测装置的有机发光显示装置 Download PDFInfo
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Abstract
本公开内容涉及一种将面板噪声的影响最小化并且提高感测精度和感测可靠性的像素感测装置及包括该像素感测装置的有机发光显示装置。所述像素感测装置包括:电流积分器,所述电流积分器通过显示面板的感测线连接至像素,将流过所述像素的像素电流积分以产生积分器输出电压;采样保持单元,所述采样保持单元采样并保持所述积分器输出电压;模数转换器(ADC),述模数转换器将所述采样保持单元输出的所述积分器输出电压转换为数字信号;和第一电容器,所述第一电容器用于将由于混合到所述像素电流的面板噪声而导致的所述积分器输出电压的失真程度最小化。
Description
本申请要求于2018年11月29日提交的韩国专利申请No.10-2018-0151001的优先权,为了所有目的在此援引该专利申请作为参考,如同在此完全阐述一样。
技术领域
本公开内容涉及一种像素感测装置及包括该像素感测装置的有机发光显示装置。
背景技术
有源矩阵型的有机发光显示装置以矩阵形式布置每个都包括有机发光二极管OLED和驱动薄膜晶体管TFT的像素,并且根据图像数据的灰度级控制像素中再现的图像的亮度。驱动TFT根据施加在驱动TFT的栅极与源极之间的电压(下文中,其被称为栅极-源极电压)控制流过OLED的像素电流。根据该像素电流确定OLED发射的光量和屏幕的亮度。
由于驱动TFT的阈值电压和电子迁移率、OLED的工作点电压等决定像素的驱动特性,所以所有像素的特性必须相同。然而,由于诸如工艺特性、时间变化特性等之类的各种原因,驱动特性在像素之间变得不同。驱动特性的这种不同导致亮度偏差,这成为显示理想质量的图像的限制。作为用于补偿像素之间的亮度偏差的方法,已知的是外部补偿方案,其感测像素的驱动特性并且基于感测结果调整输入的图像数据。
发明内容
在外部补偿方案之中,存在一种利用电流积分器感测流过驱动TFT的像素电流,以便感测像素的驱动特性的方法。该方法通过电流积分器的基准电压与输出电压之间的电压差来确定像素电流的变化。
电流积分器通过显示面板中的感测线连接至各个像素。因而,面板噪声可反映在由电流积分器感测的像素电流上。面板噪声可由诸如工艺特性、驱动环境等之类的各种原因导致并且可以以不同大小影响感测通道。由于面板噪声被电流积分器的放大器放大并且使积分器的输出电压失真,所以针对同一像素电流的感测结果在电流积分器之间可能是不同的。
因此,本公开内容的目的是提供一种将面板噪声的影响最小化并且提高感测精度和感测可靠性的像素感测装置及包括该像素感测装置的有机发光显示装置。
根据本公开内容的一方面,一种像素感测装置包括:电流积分器,所述电流积分器通过显示面板的感测线连接至像素,将流过所述像素的像素电流积分以产生积分器输出电压;采样保持单元,所述采样保持单元采样并保持所述积分器输出电压;模数转换器(ADC),述模数转换器将所述采样保持单元输出的所述积分器输出电压转换为数字信号;和第一电容器,所述第一电容器用于将由于混合到所述像素电流的面板噪声而导致的所述积分器输出电压的失真程度最小化。
根据本公开内容的另一方面,一种有机发光显示装置包括:显示面板,所述显示面板包括多个像素;和用于感测像素的驱动特性的感测单元,所述感测单元包括:电流积分器,所述电流积分器通过所述显示面板的感测线连接至像素,将流过所述像素的像素电流积分以产生积分器输出电压;采样保持单元,所述采样保持单元采样并保持所述积分器输出电压;模数转换器(ADC),所述模数转换器将所述采样保持单元输出的所述积分器输出电压转换为数字信号;和第一电容器,所述第一电容器用于将由于混合到所述像素电流的面板噪声而导致的所述积分器输出电压的失真程度最小化。
附图说明
被包括来给本公开内容提供进一步理解并结合在本申请中组成本申请一部分的附图图解了本公开内容的实施方式,并与说明书一起用于解释本公开内容的原理。在附图中:
图1显示了根据本公开内容一实施方式的有机发光显示装置的框图。
图2显示了图1的显示面板中设置的像素阵列。
图3显示了与图2的像素阵列连接的数据驱动单元的构造。
图4显示了图3中所示的像素的等效电路。
图5显示了与图2的像素阵列连接的数据驱动单元的另一构造。
图6显示了图5中所示的像素的等效电路。
图7显示了根据本公开内容一实施方式的像素感测装置。
图8显示了施加至图7中的像素感测装置的信号的波形。
图9和图10显示了图7中的像素感测装置的操作。
图11显示了根据本公开内容另一实施方式的像素感测装置。
图12显示了施加至图11中的像素感测装置的信号的波形。
图13至图15显示了图11中的像素感测装置的操作。
图16和图17显示了与面板噪声改善相关的模拟结果。
具体实施方式
通过参照随后示例性实施方式的详细描述和附图可更容易理解本公开内容的优点和特征及其实现方法。然而,本公开内容可以以诸多不同的形式实施,不应当解释为限于在此阐述的示例性实施方式。而是,提供这些示例性实施方式是为了使本公开内容彻底和完整并将本公开内容的构思完全传达给本领域技术人员,本公开内容由所附权利要求限定。
为了描述本公开内容的示例性实施方式而在图中示出的形状、尺寸、百分比、角度、数量等仅仅是示例,不限于图中所示的那些。相同的参考标记在整个申请中表示相似的要素。当使用术语“包括”、“具有”、“由……构成”等时,只要未使用术语“仅”,就可增加其他部分。单数形式可解释为复数形式,除非有明确说明。
即使未明确说明,要素可解释为包括误差范围。
当使用术语“在……上”、“在……上方”、“在……下方”、“在……旁边”等描述两部分之间的位置关系时,只要未使用术语“紧接”或“直接”,一个或多个部分就可位于这两部分之间。
将理解到,尽管可使用术语“第一”、“第二”等描述各要素,但这些要素不应被这些术语限制。这些术语仅用于将一个要素与另一个要素区分开。因而,在本公开内容的范围内,下面所称的第一要素可以是第二要素。
在本申请中,形成在显示面板的基板上的像素电路和栅极驱动器可由n-型MOSFET结构的TFT实现,但本公开内容不限于此,像素电路和栅极驱动器可由p-型MOSFET结构的TFT实现。TFT或晶体管是包括栅极、源极和漏极的3电极的元件。源极是用于给晶体管提供载流子的电极。在TFT内,载流子从源极开始流动。漏极是载流子离开TFT的电极。就是说,MOSFET中的载流子从源极流到漏极。在n-型MOSFET NMOS的情形中,由于载流子是电子,所以源极电压具有比漏极电压低的电压,使得电子可从源极流到漏极。在n-型MOSFET中,因为电子从源极流到漏极,所以电流方向是从漏极到源极。另一方面,在p-型MOSFET PMOS的情形中,由于载流子是空穴,所以源极电压具有比漏极电压高的电压,使得空穴可从源极流到漏极。在p-型MOSFET中,因为空穴从源极流到漏极,所以电流方向是从源极到漏极。应当注意,MOSFET的源极和漏极不固定。例如,MOSFET的源极和漏极可根据施加的电压而变化。因此,在本公开内容的描述中,源极和漏极中的一个被称为第一电极,源极和漏极中的另一个被称为第二电极。
在本申请中,TFT的半导体层可由氧化物元件、非晶硅元件和多晶硅元件中的至少一种实现。
下文中,将参照附图详细描述本公开内容的各实施方式。在描述本公开内容时,将省略与本公开内容相关的已知功能或构造的详细描述,以避免不必要地使本公开内容模糊不清。
图1显示了根据本公开内容一实施方式的有机发光显示装置的框图,图2显示了图1的显示面板中设置的像素阵列。
参照图1和图2,有机发光显示装置可包括显示面板10、驱动器IC D-IC 20、补偿IC30、主机系统40和储存存储器50。本公开内容的面板驱动单元可包括设置在显示面板10中的栅极驱动单元15和内置在驱动器IC D-IC 20中的数据驱动单元25。
显示面板10设置有多个像素行PNL1~PNL4,每个像素行都设置有多个像素PXL和多条信号线。本公开内容中的像素行不是指物理的信号线,而是指沿栅极线延伸的方向上的彼此相邻的像素PXL以及信号线的集合。信号线可包括:用于给像素PXL提供显示用数据电压VDIS和感测用数据电压VSEN的数据线140、用于给像素PXL提供基准电压VREF的基准电压线150、用于给像素PXL提供栅极信号的栅极线160、以及用于给像素PXL提供高电位像素电压的高电位电源线PWL。
显示面板10中的像素PXL以矩阵形式布置,以构成像素阵列。图2的像素阵列中包括的每个像素PXL可连接至一条数据线140、一条基准电压线150、一条高电位电源线PWL和一条栅极线160。图2的像素阵列中包括的每个像素PXL可连接至多条栅极线160。可从电力产生单元给图2的像素阵列中包括的每个像素PXL提供低电位像素电压。电力产生单元可通过低电位电源线或衬垫单元(padding unit)给像素PXL提供低电位像素电压。
栅极驱动单元15可内置在显示面板10中。
栅极驱动单元15可包括与图2中的像素阵列的栅极线160连接的多个级。各级可产生用于控制像素PXL中包括的开关元件的栅极信号并将栅极信号提供至栅极线160。
驱动器IC D-IC 20可包括时序控制器21和数据驱动单元25。数据驱动单元25可包括感测单元22和驱动电压产生器23,但并不限于此。
时序控制器21可基于从主机系统40输入的时序信号,例如垂直同步信号Vsync、水平同步信号Hsync、点时钟信号DCLK、数据使能信号DE等,产生用于控制栅极驱动单元15的操作时序的栅极时序控制信号GDC以及用于控制数据驱动单元25的操作时序的数据时序控制信号DDC。
数据时序控制信号DDC可包括源极起始脉冲、源极采样时钟、源极输出使能信号等,但不限于此。源极起始脉冲控制驱动电压产生器23的数据采样起始时序。源极采样时钟是基于上升沿或下降沿控制数据采样时序的时钟信号。源极输出使能信号控制驱动电压产生器23的输出时序。
栅极时序控制信号GDC可包括栅极起始脉冲、栅极移位时钟等,但不限于此。栅极起始脉冲施加至产生第一扫描信号的级,以激活该级。栅极移位时钟共同提供至各级,以移位栅极起始脉冲。
时序控制器21可通过控制面板驱动单元的操作时序,在通电区段、每帧中的垂直有效时段、每帧中的垂直消隐时段和断电区段中的至少一个期间感测像素PXL的驱动特性。在此,通电区段是指紧接施加系统电力之后一直到显示图像为止的时段,断电区段是指紧接图像显示结束之后一直到系统电力关闭为止的时段。垂直有效时段是其中给显示面板10写入图像数据来再现画面的时段,垂直消隐时段位于相邻的垂直有效时段之间,并且垂直消隐时段是指其中图像数据的写入被暂停的时段。驱动特性包括像素PXL中包括的驱动元件的阈值电压和电子迁移率。
时序控制器21可通过根据预定顺序控制显示面板10中的像素行PNL1~PNL4的感测驱动时序和显示驱动时序来实现显示驱动和感测驱动。
时序控制器21可彼此不同地产生用于显示驱动的时序控制信号GDC和DDC以及用于感测驱动的时序控制信号GDC和DDC。感测驱动是指给像素行中包括的像素PXL写入感测用数据电压VSEN以感测相应像素PXL的驱动特性,并且基于感测结果的数据SDATA更新用于补偿相应像素PXL的驱动特性的变化的补偿值的操作。显示驱动是指基于更新的补偿值修正要输入至相应像素PXL的数字图像数据,并且给相应像素PXL施加与修正的图像数据CDATA对应的显示用数据电压VDIS以显示输入图像的操作。
驱动电压产生器23由用于将数字信号转换为模拟信号的数字模拟转换器DAC实现。驱动电压产生器23产生感测驱动所需的感测用数据电压VSEN和显示驱动所需的显示用数据电压VDIS并且将它们提供至数据线140。此外,驱动电压产生器23产生感测驱动和显示驱动进一步需要的基准电压VREF并将其提供至基准电压线150。
显示用数据电压VDIS可以是在补偿IC 30中被修正的数字图像数据CDATA的数字模拟转换的结果,并且根据灰度级值和补偿值,显示用数据电压VDIS的幅度可以以像素为单位变化。考虑到针对各个颜色,驱动元件的驱动特性是不同的,感测用数据电压VSEN可以以R(红色)像素、G(绿色)像素、B(蓝色)像素和W(白色)像素为单位设为不同。
感测单元22可将像素PXL的驱动特性,例如驱动元件的阈值电压和电子迁移率、发光元件的工作点电压等感测到感测线。可使用数据线140或基准电压线150实现感测线。如果使用数据线140作为感测线,则可将数据输出通道和感测通道统一,这对于减少驱动器ICD-IC 20的焊盘的数量是有利的。感测单元22可实现为直接感测流过每个像素PXL的像素电流的电流感测型。为此,感测单元22可包括电流积分器和用于抑制面板噪声的电容器,这将参照图7详细描述。感测单元22可包括电流积分器、用于抑制面板噪声的电容器、以及偏移去除电路,这将参照图11详细描述。
感测单元22可通过使用多个ADC同时并行处理多个模拟感测值,或者可使用一个ADC以顺序方式处理多个模拟感测值。ADC的采样速率和精度是彼此折中的。并行处理方式的ADC具有增加感测精度的优点,因为其与串行处理方式的ADC相比可放慢采样速率。ADC可实现为闪烁型(flashtype)的ADC、使用跟踪方案的ADC、逐次逼近寄存器型(successiveapproximation re个ister type)的ADC等。ADC在预定感测范围内将模拟感测值转换为数字感测结果数据SDATA,并且将数字感测结果数据SDATA提供至储存存储器50和感测输出控制单元27。
储存存储器50存储在感测驱动中从感测单元22输入的数字感测结果数据SDATA。储存存储器50可实现为闪存,但不限于此。
补偿IC 30可包括补偿单元31和补偿存储器32。补偿存储器32将从储存存储器50读取的数字感测结果数据SDATA传输至补偿单元31。补偿存储器32可以是随机存取存储器RAM,例如双倍数据速率同步动态RAM,但不限于此。补偿单元31基于从储存存储器50读取的数字感测结果数据SDATA计算每个像素的补偿偏移和补偿增益,根据补偿偏移和增益修正从主机系统40输入的图像数据,并且将修正的图像数据CDATA提供至驱动器IC D-IC 20。
图3显示了与图2的像素阵列连接的数据驱动单元的构造。图3中的数据驱动单元25通过基准电压线150感测像素PXL的驱动特性。
参照图3,数据驱动单元25可通过数据线140连接至像素PXL的第一节点(驱动元件的栅极),并且通过基准电压线150连接至像素PXL的第二节点(驱动元件的源极)。由于像素电流IPIX流过像素PXL的第二节点,所以经由第二开关元件连接至第二节点的基准电压线150可用作感测线。
基准电压线150通过连接开关SX1和SX2选择性地连接至驱动电压产生器23和感测单元22。驱动电压产生器23可包括用于产生感测用数据电压VSEN和显示用数据电压VDIS的第一驱动电压产生器DAC1、以及用于产生基准电压VREF的第二驱动电压产生器DAC2。第一连接开关SX1连接在基准电压线150与第二驱动电压产生器DAC2之间,第二连接开关SX2连接在基准电压线150与感测单元22之间。第一连接开关SX1和第二连接开关SX2选择性地导通。与基准电压VREF施加至像素PXL的时序同步,仅第一连接开关SX1导通,并且与感测流过像素PXL的像素电流的时序同步,仅第二连接开关SX2导通。因而,基准电压线150经由第一连接开关SX1和第二连接开关SX2选择性地连接至第二驱动电压产生器DAC2和感测单元22。
图4显示了图3中所示的像素的等效电路。
参照图4,利用基准电压线150作为感测线的像素PXL包括OLED、驱动TFT DT、开关TFT ST1和ST2、以及存储电容器Cst。驱动TFT DT以及开关TFT ST1和ST2实现为NMOS,但不限于此。
OLED是发射具有与从驱动TFT DT得到的像素电流对应的强度的光的元件。OLED的阳极电极连接至第二节点N2,OLED的阴极电极连接至低电位电压EVSS的输入端。
驱动TFT DT是用于根据栅极与源极之间的电压差产生像素电流的驱动元件。驱动TFT DT包括:连接至第一节点N1的栅极、通过高电位电源线PWL连接至高电位电压EVDD的输入端的第一电极、以及连接至第二节点N2的第二电极。
开关TFT ST1和ST2是在驱动TFT DT的栅极与源极之间创建电压以及将驱动TFTDT的第二电极与基准电压线150连接的开关元件。
第一开关TFT ST1连接在数据线140与第一节点N1之间并且根据来自栅极线160的栅极信号SCAN导通。第一开关TFT ST1在用于显示驱动或感测驱动的程序中导通。当第一开关TFT ST1导通时,感测用数据电压VSEN或显示用数据电压VDIS施加至第一节点N1。在第一开关TFT ST1中,栅极连接至栅极线160,第一电极连接至数据线140,第二电极连接至第一节点N1。
第二开关TFT ST2连接在基准电压线150与第二节点N2之间并且根据来自栅极线160的栅极信号SCAN导通。第二开关TFT ST2在用于显示驱动或感测驱动的程序中导通,以给第二节点N2施加基准电压VREF。第二开关TFT ST2还在感测驱动期间的感测时段中导通,并且将从驱动TFT DT产生的像素电流施加至基准电压线150。在第二开关TFT ST2中,栅极连接至栅极线160,第一电极连接至基准电压线150,第二电极连接至第二节点N2。
存储电容器Cst连接在第一节点N1与第二节点N2之间,以将驱动TFT DT的栅极与源极之间的电压保持一时间段。
图5显示了与图2的像素阵列连接的数据驱动单元的另一构造。图5中的数据驱动单元25通过数据线140感测像素PXL的驱动特性。
参照图5,数据驱动单元25可通过基准电压线150连接至像素PXL的第一节点(驱动元件的栅极),并且通过数据线140连接至像素PXL的第二节点(驱动元件的源极)。由于像素电流IPIX流过像素PXL的第二节点,所以经由第二开关元件连接至第二节点的数据线140可用作感测线。
数据线140通过连接开关SX1和SX2选择性地连接至驱动电压产生器23和感测单元22。驱动电压产生器23可包括用于产生感测用数据电压VSEN和显示用数据电压VDIS的第一驱动电压产生器DAC1、以及用于产生基准电压VREF的第二驱动电压产生器DAC2。第一连接开关SX1连接在数据线140与第一驱动电压产生器DAC1之间,第二连接开关SX2连接在数据线140与感测单元22之间。第一连接开关SX1和第二连接开关SX2选择性地导通。与感测用数据电压VSEN和显示用数据电压VDIS施加至像素PXL的时序同步,仅第一连接开关SX1导通,并且与感测流过像素PXL的像素电流的时序同步,仅第二连接开关SX2导通。因而,数据线140经由第一连接开关SX1和第二连接开关SX2选择性地连接至第一驱动电压产生器DAC1和感测单元22。
图6显示了图5中所示的像素的等效电路。
参照图6,使用数据线140作为感测线的像素PXL包括OLED、驱动TFT DT、开关TFTST1和ST2、以及存储电容器Cst。驱动TFT DT以及开关TFT ST1和ST2实现为NMOS,但不限于此。
OLED是发射具有与从驱动TFT DT得到的像素电流对应的强度的光的元件。OLED的阳极电极连接至第二节点N2,OLED的阴极电极连接至低电位电压EVSS的输入端。
驱动TFT DT是用于根据栅极与源极之间的电压差产生像素电流的驱动元件。驱动TFT DT包括:连接至第一节点N1的栅极、通过高电位电源线PWL连接至高电位电压EVDD的输入端的第一电极、以及连接至第二节点N2的第二电极。
开关TFT ST1和ST2是在驱动TFT DT的栅极与源极之间创建电压以及将驱动TFTDT的第二电极与数据线140连接的开关元件。
第一开关TFT ST1连接在基准电压线150与第一节点N1之间并且根据来自栅极线160的栅极信号SCAN导通。第一开关TFT ST1在用于显示驱动或感测驱动的程序中导通。当第一开关TFT ST1导通时,基准电压VREF施加至第一节点N1。在第一开关TFT ST1中,栅极连接至栅极线160,第一电极连接至基准电压线150,第二电极连接至第一节点N1。
第二开关TFT ST2连接在数据线140与第二节点N2之间并且根据来自栅极线160的栅极信号SCAN导通。第二开关TFT ST2在用于显示驱动或感测驱动的程序中导通,以给第二节点N2施加感测用数据电压VSEN或显示用数据电压VDIS。第二开关TFT ST2还在感测驱动期间的感测时段中导通,并且将从驱动TFT DT产生的像素电流施加至数据线140。在第二开关TFT ST2中,栅极连接至栅极线160,第一电极连接至数据线140,第二电极连接至第二节点N2。
存储电容器Cst连接在第一节点N1与第二节点N2之间,以将驱动TFT DT的栅极与源极之间的电压保持一时间段。
图7显示了根据本公开内容一实施方式的像素感测装置。图7中的像素感测装置包括图1中的感测单元22。
参照图7,感测单元22可包括电流积分器CI、采样保持单元SH、ADC和第一电容器CX1。
电流积分器CI通过显示面板10的感测线连接至像素PXL。电流积分器CI将流过像素PXL的像素电流IPIX积分,以产生从积分器基准电压Vref-CI起变化的积分器输出电压CI-OUT。
电流积分器CI包括放大器AMP、积分电容器CFB和复位开关RST。放大器AMP设置有通过连接至感测线的第一节点(1)接收像素电流IPIX的第一输入端、通过第二节点(2)接收积分器基准电压Vref-CI的第二输入端、以及将与像素电流IPIX的积分结果对应的积分器输出电压CI-OUT输出至第三节点(3)的输出端。积分电容器CFB连接在第一节点(1)与第三节点(3)之间,就是说,积分电容器CFB连接在放大器AMP的第一输入端与输出端之间。复位开关RST与积分电容器CFB并联地进一步连接在放大器AMP的第一输入端与输出端之间。
放大器AMP可实现为负型或正型。在如图7中所示的负型放大器AMP中,第一输入端是放大器AMP的反相输入端(-),第二输入端是放大器AMP的同相输入端(+)。在负型放大器AMP中,随着像素电流IPIX累积在积分电容器CFB中,积分器输出电压CI-OUT从积分器基准电压Vref-CI起逐渐减小。积分器输出电压CI-OUT的下降斜率与像素电流IPIX的幅度成比例。
另一方面,在正型放大器AMP中,第一输入端是放大器AMP的同相输入端(+),第二输入端是放大器AMP的反相输入端(-)。在正型放大器AMP中,随着像素电流IPIX累积在积分电容器CFB中,积分器输出电压CI-OUT从积分器基准电压Vref-CI起逐渐增大。积分器输出电压CI-OUT的上升斜率与像素电流IPIX的幅度成比例。
本公开内容的构思可应用于负型放大器,也可应用于正型放大器。在本公开内容的实施方式中,为了方便起见将主要描述负型放大器。
采样保持单元SH采样并保持积分器输出电压CI-OUT,然后将其输出至ADC。采样保持单元SH可包括采样电容器、根据采样信号SAM操作的采样开关以及保持开关,但不限于此。
ADC在预定感测范围内将模拟信号(其是积分器输出电压)转换为数字信号(其是数字感测结果数据)。
第一电容器CX1用于将由于面板噪声而导致的积分器输出电压CI-OUT的失真程度最小化。第一电容器CX1连接在第一节点(1)与第二节点(2)之间,以将放大器AMP的第一输入端(-)和第二输入端(+)耦合。第一电容器CX1使混合到像素电流IPIX的面板噪声共同施加至放大器AMP的两个输入端(+)和(-)。混合到像素电流IPIX的面板噪声施加至放大器的第一输入端(-)并且还通过第一电容器CX1施加至放大器AMP的第二输入端(+)。因而,施加至放大器AMP的两个输入端(+)和(-)的面板噪声在放大器AMP内抵消,以被最小化。
第一电容器CX1的电容越大,混合进积分器输出电压CI-OUT中的面板噪声的量越小。这是因为,随着第一电容器CX1的电容变得更大,施加至放大器AMP的第一输入端(-)的面板噪声的幅度变为与施加至放大器AMP的第二输入端(+)的面板噪声的幅度相似。理想地,当施加至放大器AMP的两个输入端(+)和(-)的面板噪声的幅度相同时,可完全抵消混合进积分器输出电压CI-OUT中的面板噪声。
图8显示了施加至图7中的像素感测装置的信号的波形,图9和图10显示了图7中的像素感测装置的操作。
参照图8,根据本公开内容一实施方式的感测驱动可实现为包括初始化时段①和感测时段②。
参照图8和图9,在初始化时段①中,复位开关RST导通。当复位开关RST导通时,感测线以及第一至第三节点(1)、(2)和(3)被初始化为积分器基准电压Vref-CI。因而,在初始化时段①中,积分器输出电压CI-OUT变为积分器基准电压Vref-CI。
参照图8和图10,在感测时段②中,复位开关RST关断,并且基于通过感测线和第一节点(1)输入的像素电流IPIX的电荷累积在积分电容器CFB中。随着基于像素电流IPIX的电荷累积在积分电容器CFB中,积分器输出电压CI-OUT从积分器基准电压Vref-CI起逐渐降低。
在感测时段②中,由于混合进像素电流IPIX中的面板噪声通过第一电容器CX1施加至放大器AMP的两个输入端(+)和(-)并且在放大器AMP内抵消,所以混合进积分器输出电压CI-OUT中的面板噪声被最小化。
在感测时段②中,在采样信号SAM是导通电平期间,采样保持单元SH对积分器输出电压CI-OUT进行采样。
图11显示了根据本公开内容另一实施方式的像素感测装置。图11中的像素感测装置可进一步提高感测精度,因为其与图7的像素感测装置相比可进一步去除放大器偏移。
参照图11,感测单元22可包括电流积分器CI、采样保持单元SH、ADC和第一电容器CX1,并且可进一步包括偏移抵消单元CAZ。
电流积分器CI通过显示面板10的感测线连接至像素PXL。电流积分器CI将流过像素PXL的像素电流IPIX积分,以产生从积分器基准电压Vref-CI起变化的积分器输出电压CI-OUT。
电流积分器CI包括放大器AMP、积分电容器CFB和复位开关RST。放大器AMP设置有通过连接至感测线的第一节点(1)接收像素电流IPIX的第一输入端、通过第二节点(2)接收积分器基准电压Vref-CI的第二输入端、以及将与像素电流IPIX的积分结果对应的积分器输出电压CI-OUT输出至第三节点(3)的输出端。积分电容器CFB连接在第一节点(1)与第三节点(3)之间,就是说,积分电容器CFB连接在放大器AMP的第一输入端与输出端之间。复位开关RST与积分电容器CFB并联地进一步连接在放大器AMP的第一输入端与输出端之间。
采样保持单元SH采样并保持积分器输出电压CI-OUT,然后将其输出至ADC。采样保持单元SH可包括采样电容器、根据采样信号SAM操作的采样开关以及保持开关,但不限于此。
ADC在预定感测范围内将模拟信号(其是积分器输出电压)转换为数字信号(其是数字感测结果数据)。
第一电容器CX1与偏移抵消单元CAZ中包括的第二电容器CX2一起用于将由于面板噪声而导致的积分器输出电压CI-OUT的失真程度最小化。第一电容器CX1和第二电容器CX2连接在第一节点(1)与第二节点(2)之间,以将放大器AMP的第一输入端(-)和第二输入端(+)耦合。
偏移抵消单元CAZ连接至积分器基准电压Vref-CI的输入端、第一节点(1)和第二节点(2),并且通过第二节点(2)给放大器AMP施加可抵消放大器AMP的偏移的修正基准电压。偏移抵消单元CAZ包括第二电容器CX2和第一至第三开关AZ1、AZ2和AZ3。
第二电容器CX2设置有连接至第二节点(2)的一个电极和通过第四节点(4)连接至第一电容器CX1的另一个电极。第二电容器CX2与第一电容器CX1串联连接在第一节点(1)与第二节点(2)之间。第二电容器CX2通过第四节点(4)连接至第一电容器CX1。
第一电容器CX1和第二电容器CX2使混合到像素电流IPIX的面板噪声共同施加至放大器AMP的两个输入端(+)和(-)。混合到像素电流IPIX的面板噪声施加至放大器AMP的第一输入端(-)并且还通过第一电容器CX1和第二电容器CX2施加至放大器AMP的第二输入端(+)。因而,施加至放大器AMP的两个输入端(+)和(-)的面板噪声在放大器AMP内抵消,以被最小化。
第一电容器CX1和第二电容器CX2的电容越大,混合进积分器输出电压CI-OUT中的面板噪声的量越小。这是因为,随着第一电容器CX1和第二电容器CX2的电容变得更大,施加至放大器AMP的第一输入端(-)的面板噪声的幅度变为与施加至放大器AMP的第二输入端(+)的面板噪声的幅度相似。理想地,当施加至放大器AMP的两个输入端(+)和(-)的面板噪声的幅度相同时,可完全抵消混合进积分器输出电压CI-OUT中的面板噪声。
同时,第一开关AZ1连接在第二节点(2)与积分器基准电压Vref-CI的输入端之间。第二开关AZ2连接在第四节点(4)与积分器基准电压Vref-CI的输入端之间。第三开关AZ3连接在第一节点(1)与第四节点(4)之间。通过第一至第三开关AZ1、AZ2和AZ3的开关动作以及第二电容器CX2的耦合效应,可通过第二节点(2)给放大器AMP施加可抵消放大器AMP的偏移的修正基准电压。
图12显示了施加至图11中的像素感测装置的信号的波形,图13至图15显示了图11中的像素感测装置的操作。
参照图12,根据本公开内容另一实施方式的感测驱动可实现为包括偏移检测时段①、初始化时段②和感测时段③。
参照图12和图13,在偏移检测时段①中,第一开关AZ1和第三开关AZ3以及复位开关RST导通并且第二开关AZ2关断。当第一开关AZ1和第三开关AZ3以及复位开关RST导通时,积分器基准电压Vref-CI施加至第二节点(2),并且被添加了放大器AMP的偏移Vofs的第一积分器基准电压(Vref-CI+Vofs)施加至第一节点(1)、第三节点(3)和第四节点(4)以及感测线。因而,在偏移检测时段①中,放大器AMP的偏移Vofs被检测以存储在第二电容器CX2中。
参照图12和图14,在初始化时段②中,第一开关AZ1和第三开关AZ3关断,并且复位开关RST和第二开关AZ2导通。当复位开关RST导通时,第四节点(4)的电压从第一积分器基准电压(Vref-CI+Vofs)变为积分器基准电压Vref-CI。由于此时第一开关AZ1关断,所以第二节点(2)浮置,并且由于第二电容器CX2的耦合作用,第二节点(2)的电压从积分器基准电压Vref-CI变为第二积分器基准电压(Vref-CI-Vofs)。放大器AMP的偏移Vofs被通过第二节点(2)施加的第二积分器基准电压(Vref-CI-Vofs)抵消。由于此时复位开关RST是导通状态,所以第一节点(1)、第三节点(3)和感测线的电压从第一积分器基准电压(Vref-CI+Vofs)变为积分器基准电压Vref-CI。就是说,初始化时段②中,在放大器AMP的偏移Vofs被去除的同时,第一节点(1)和第三节点(3)的电压被初始化为积分器基准电压Vref-CI。
参照图12和图15,在感测时段③中,第一开关AZ1、第二开关AZ2、第三开关AZ3和复位开关RST关断,基于通过感测线和第一节点(1)输入的像素电流IPIX的电荷累积在积分电容器CFB中。随着基于像素电流IPIX的电荷累积在积分电容器CFB中,积分器输出电压CI-OUT从积分器基准电压Vref-CI起逐渐降低。
在感测时段③中,由于混合进像素电流IPIX中的面板噪声通过第一电容器CX1和第二电容器CX2施加至放大器AMP的两个输入端(+)和(-)并且在放大器AMP内抵消,所以混合进积分器输出电压CI-OUT中的面板噪声被最小化。
在感测时段③中,从积分器输出电压CI-OUT去除了放大器AMP的偏移,从而由于放大器AMP的偏移Vofs导致的积分器输出电压CI-OUT的失真显著减小。
在感测时段③中,在采样信号SAM是导通电平期间,采样保持单元SH对积分器输出电压CI-OUT进行采样。
图16和图17显示了与面板噪声改善相关的模拟结果。
从图16和图17的模拟结果可知,当像素感测装置通过第一电容器CX1或通过第一电容器CX1和第二电容器CX2给两个输入端(+)和(-)施加混合到像素电流IPIX的面板噪声并且将像素电流IPIX积分时,可显著减小混合到积分器输出电压CI-OUT的面板噪声的幅度。
参照图16,当将第一电容器CX1的电容或第一电容器CX1和第二电容器CX2的组合电容设为10pF时,面板噪声的幅度变为大约0.3V,其相对于改善之前(无电容器)的0.85V有显著改善。
参照图17,当将第一电容器CX1的电容或第一电容器CX1和第二电容器CX2的组合电容设为50pF时,面板噪声的幅度变为大约0.1V,其相对于改善之前(无电容器)的0.85V有显著改善。
参照图16和图17,可知第一电容器CX1的电容(或第一电容器CX1和第二电容器CX2的组合电容)越大,混合到积分器输出电压CI-OUT的面板噪声的量越小。
如上所述,在本公开内容中,与电流积分器一起在感测单元中设置用于抑制面板噪声的电容器,由此将混合到积分器输出电压的面板噪声的量最小化,从而提高感测的精度和可靠性。
通过在感测单元中进一步包括偏移抵消电路,本公开内容可将由于积分放大器的偏移而产生的积分器输出电压的失真最小化,从而进一步提高感测的精度和可靠性。
在整个描述中,本领域技术人员应当理解,在不背离本公开内容的技术原理的情况下,各种变化和修改是可能的。因此,本公开内容的技术范围不限于本申请中的详细描述,而是应由所附权利要求的范围限定。
Claims (17)
1.一种像素感测装置,包括:
电流积分器,所述电流积分器通过显示面板的感测线连接至像素,将流过所述像素的像素电流积分以产生积分器输出电压;
采样保持单元,所述采样保持单元采样并保持所述积分器输出电压;
模数转换器(ADC),所述模数转换器将所述采样保持单元输出的所述积分器输出电压转换为数字信号;和
第一电容器,所述第一电容器用于将由于混合到所述像素电流的面板噪声而导致的所述积分器输出电压的失真程度最小化。
2.根据权利要求1所述的像素感测装置,其中所述电流积分器包括:
放大器,所述放大器具有连接至所述感测线以接收所述像素电流的第一输入端、接收积分器基准电压的第二输入端、和输出从所述积分器基准电压起变化的所述积分器输出电压的输出端;
积分电容器,所述积分电容器连接在所述放大器的第一输入端与输出端之间;和
复位开关,所述复位开关与所述积分电容器并联地连接在所述放大器的第一输入端与输出端之间,
其中所述第一电容器将所述放大器的第一输入端和第二输入端耦合。
3.根据权利要求2所述的像素感测装置,其中在所述像素电流的电荷累积在所述积分电容器中的感测时段期间,混合进所述像素电流的所述面板噪声施加至所述放大器的第一输入端并且通过所述第一电容器施加至所述放大器的第二输入端,使得所述面板噪声在所述放大器内抵消以被最小化。
4.根据权利要求2所述的像素感测装置,其中所述第一电容器连接在所述感测线与所述放大器的第二输入端之间。
5.根据权利要求2所述的像素感测装置,还包括:
偏移抵消单元,所述偏移抵消单元用于从所述积分器输出电压去除所述放大器的偏移。
6.根据权利要求5所述的像素感测装置,其中所述偏移抵消单元包括:
第二电容器,所述第二电容器连接在所述第一电容器与所述放大器的第二输入端之间,用于与所述第一电容器一起将所述放大器的第一输入端和第二输入端耦合;
第一开关,所述第一开关连接在所述放大器的第二输入端与所述积分器基准电压的输入端之间;
第二开关,所述第二开关连接在所述第一电容器和所述第二电容器之间的节点与所述积分器基准电压的输入端之间;和
第三开关,所述第三开关连接在所述第一电容器和所述第二电容器之间的节点与所述放大器的第一输入端之间。
7.根据权利要求6所述的像素感测装置,其中在偏移检测时段中,所述第一开关、所述第三开关以及所述复位开关导通并且所述第二开关关断,以将所述放大器的偏移存储在所述第二电容器中。
8.根据权利要求6所述的像素感测装置,其中在初始化时段中,所述第一开关和所述第三开关关断并且所述复位开关和所述第二开关导通,以将所述放大器的第二输入端浮置并且将所述放大器的第一输入端和输出端的电压初始化为所述积分器基准电压。
9.根据权利要求6所述的像素感测装置,其中在感测时段中,所述第一开关、所述第二开关、所述第三开关和所述复位开关关断,以将所述像素电流的电荷累积在所述积分电容器中并产生去除了所述放大器的偏移的积分器输出电压。
10.根据权利要求9所述的像素感测装置,其中在所述感测时段中,混合进所述像素电流的所述面板噪声施加至所述放大器的第一输入端并且通过所述第一电容器和所述第二电容器施加至所述放大器的第二输入端,使得所述面板噪声在所述放大器内抵消以被最小化。
11.一种有机发光显示装置,包括:
显示面板,所述显示面板包括多个像素;和
用于感测像素的驱动特性的感测单元,所述感测单元包括:
电流积分器,所述电流积分器通过所述显示面板的感测线连接至像素,将流过所述像素的像素电流积分以产生积分器输出电压;
采样保持单元,所述采样保持单元采样并保持所述积分器输出电压;
模数转换器(ADC),所述模数转换器将所述采样保持单元输出的所述积分器输出电压转换为数字信号;和
第一电容器,所述第一电容器用于将由于混合到所述像素电流的面板噪声而导致的所述积分器输出电压的失真程度最小化。
12.根据权利要求11所述的有机发光显示装置,还包括:
驱动电压产生器,所述驱动电压产生器产生感测驱动所需的感测用数据电压和显示驱动所需的显示用数据电压并且将它们提供到所述显示面板的数据线,并且所述驱动电压产生器产生感测驱动和显示驱动所需的基准电压并且将所述基准电压提供到所述显示面板的基准电压线。
13.根据权利要求12所述的有机发光显示装置,其中使用所述数据线作为所述感测线。
14.根据权利要求12所述的有机发光显示装置,其中使用所述基准电压线作为所述感测线。
15.根据权利要求11所述的有机发光显示装置,还包括:
时序控制器,所述时序控制器用于控制所述显示面板的感测驱动时序和显示驱动时序,
其中所述感测单元在所述时序控制器的控制下在通电区段、每帧中的垂直有效区段、每帧中的垂直消隐时段和断电区段中的至少一个期间感测像素的驱动特性。
16.根据权利要求12所述的有机发光显示装置,还包括:
补偿单元,所述补偿单元基于来自所述感测单元的数字感测结果数据计算用于补偿像素的驱动特性的变化的补偿值,根据所述补偿值修正从主机系统输入的图像数据,并且将修正的图像数据提供至所述驱动电压产生器,
其中所述驱动电压产生器根据修正的图像数据产生所述显示用数据电压。
17.根据权利要求12所述的有机发光显示装置,其中所述感测单元和所述驱动单元产生器包括在数据驱动单元中。
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