CN111133570B - Sheet-like substrate and method for manufacturing sheet-like substrate - Google Patents

Sheet-like substrate and method for manufacturing sheet-like substrate Download PDF

Info

Publication number
CN111133570B
CN111133570B CN201880062354.5A CN201880062354A CN111133570B CN 111133570 B CN111133570 B CN 111133570B CN 201880062354 A CN201880062354 A CN 201880062354A CN 111133570 B CN111133570 B CN 111133570B
Authority
CN
China
Prior art keywords
substrate
unit structures
sheet
electrode layer
mother substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201880062354.5A
Other languages
Chinese (zh)
Other versions
CN111133570A (en
Inventor
阿野清治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NGK Insulators Ltd
NGK Electronics Devices Inc
Original Assignee
NGK Insulators Ltd
NGK Electronics Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Insulators Ltd, NGK Electronics Devices Inc filed Critical NGK Insulators Ltd
Publication of CN111133570A publication Critical patent/CN111133570A/en
Application granted granted Critical
Publication of CN111133570B publication Critical patent/CN111133570B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structure Of Printed Boards (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A Cavity (CV) and a metallized film (15) are disposed on the first surface (S1). The first and second ground electrode layers (21, 22) and the first and second external electrode layers (51, 52) are provided on the second surface (S2). In each of the plurality of unit structures, the first and second ground electrode layers (21, 22) are electrically connected to the metallized film (15). First and second element pads (41, 42) are disposed within the Cavity (CV). The first and second external electrode layers (51, 52) are electrically connected to the first and second element pads (41, 42), respectively. Castle type electrodes (70) are connected to each of the first to fourth unit structures (9A to 9D). The castellated electrode (70) is electrically disconnected from each of the first and second external electrode layers (51, 52).

Description

Sheet-like substrate and method for manufacturing sheet-like substrate
Technical Field
The present invention relates to a sheet substrate and a method for manufacturing the sheet substrate, and more particularly, to a sheet substrate divided into packages and a method for manufacturing the sheet substrate.
Background
In order to house electrical components such as semiconductor devices and piezoelectric vibration devices in an airtight manner, ceramic packages are sometimes used. The ceramic package containing the electronic component is incorporated in an electronic device such as a communication device such as a mobile phone or a smart phone, and an information device such as a tablet computer or a personal computer.
As a method for efficiently manufacturing a plurality of packages, there is a method using a sheet substrate (multi-electronic component substrate) including a plurality of unit structures divided into these packages. In this case, the electrical components are mounted on the plurality of packages integrated into the sheet-like substrate. Next, each package is sealed by mounting a cover. Next, the sheet-like substrate is divided into a plurality of packages. For example, according to japanese patent application laid-open No. 2017-22334 (patent document 1), V-shaped dividing grooves are provided in a mother substrate in which a plurality of ceramic packages are arranged, and a plurality of packages can be obtained from one mother substrate by dividing using the dividing grooves.
The ceramic package has a plurality of electrodes suitably wired. These electrodes typically require a plating process. In order to perform the plating process at low cost, it is preferable to perform the electrolytic plating process on the sheet-like substrate before dividing into a plurality of packages. In order to perform the electrolytic plating process, each electrode needs to be electrically connected to a power supply for the plating process. Therefore, all of the plurality of electrodes are short-circuited to each other in the sheet-like substrate. An electrical component is mounted on the sheet-like substrate subjected to the plating treatment. However, in a state where the short-circuit state is maintained, electrical inspection of the electrical components mounted on the respective packages of the sheet-like substrate cannot be performed. When the sheet-like substrate is divided into the packages, the short-circuited electrical path is cut off, and thus electrical inspection can be performed. However, in the inspection after the division, an operation of arranging a plurality of packages separated from each other is required. Therefore, if the electrical inspection can be performed before the division, more efficient inspection can be performed. Therefore, it is necessary to cut off the electrical path required for the electrolytic plating process but interfering with the electrical inspection so as not to divide the sheet-like substrate.
For example, according to japanese patent application laid-open No. 2010-11116 (patent document 2), a sheet-like substrate has: a plurality of container bodies (packages) arranged in a matrix; and a margin adjacent to them. The surplus portion is disposed between two adjacent container bodies. A wiring pattern for electrolytic plating is arranged in the remaining portion, and electrolytic plating is performed by using the wiring. Next, a piezoelectric vibration element is mounted on the sheet-like substrate, and then the lid is bonded. Next, the wiring pattern for electrolytic plating disposed in the margin portion is cut off using a laser. Next, the impedance characteristics of the piezoelectric vibration element were measured. Next, by dividing the sheet-like substrate, a piezoelectric oscillator is obtained. When dividing the sheet-like substrate, a margin portion is cut from a portion to be the piezoelectric oscillator.
Prior art literature
Patent literature
Patent document 1: japanese patent application laid-open No. 2017-022334
Patent document 2: japanese patent application laid-open No. 2010-01116
Disclosure of Invention
Problems to be solved by the invention
According to the technique of japanese patent application laid-open No. 2010-11116, when dividing a sheet-like substrate, it is necessary to remove a margin portion between container body portions (packages). Therefore, the dicing process is complicated as compared with the case of dicing the package immediately adjacent thereto. In addition, it is difficult to suppress the area of the margin portion, and the number of packages that can be manufactured using the sheet-like substrate is reduced by an amount corresponding to the area. Therefore, the efficiency of manufacturing the package using the sheet-like substrate becomes low.
The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a sheet-like substrate and a method for manufacturing a sheet-like substrate, which can electrically inspect each package before dividing the sheet-like substrate and can improve the efficiency of manufacturing the package.
Means for solving the problems
The sheet-like substrate of the present invention has an effective region and an outer peripheral region surrounding the effective region, and includes a plurality of unit structures arranged in a matrix in the effective region, the plurality of unit structures being divided into packages that house electrical components. The sheet substrate has a mother substrate, a metallized film, first and second ground electrode layers, first and second element pads, first and second external electrode layers, castellations, power connection terminals, and peripheral wiring. The mother substrate is composed of a ceramic insulator having a first surface and a second surface opposite to the first surface, and in each of the plurality of unit structures, a cavity is provided on the first surface. In each of the plurality of unit structures, a metallized film is disposed on the first surface of the mother substrate and surrounds the cavity. In each of the plurality of unit structures, a first ground electrode layer is disposed on the second surface of the mother substrate and electrically connected to the metallized film. In each of the plurality of unit structures, a second ground electrode layer is disposed on the second surface of the mother substrate and electrically connected to the metallized film. In each of the plurality of unit structures, first and second element pads are disposed within the cavity and are for electrical element connection. In each of the plurality of unit structures, a first external electrode layer is disposed on the second surface of the mother substrate and electrically connected to the first element pad. In each of the plurality of unit structures, a second external electrode layer is disposed on the second surface of the mother substrate and electrically connected to the second element pad. The castellations are connected to first to fourth unit structures included in the plurality of unit structures, respectively. The power connection terminal is provided in the outer peripheral region. The outer peripheral wiring extends from the power supply connection terminal to the active region. On the second surface of the mother substrate, the castellation electrode is electrically disconnected from the first and second external electrode layers, respectively.
The method for manufacturing a sheet-like substrate according to the present invention is a method for manufacturing a sheet-like substrate having an effective region and an outer peripheral region around the effective region, the effective region including a plurality of unit structures arranged in a matrix, the plurality of unit structures being divided into packages for housing electric components, wherein the method for manufacturing a sheet-like substrate includes the following steps.
A semi-finished substrate is prepared. The semi-finished substrate has a mother substrate, a metallized film, first and second ground electrode layers, first and second element pads, first and second external electrode layers, and castellated electrodes. The mother substrate is composed of a ceramic insulator having a first surface and a second surface opposite to the first surface, and in each of the plurality of unit structures, a cavity is provided on the first surface. In each of the plurality of unit structures, a metallized film is disposed on the first surface of the mother substrate and surrounds the cavity. In each of the plurality of unit structures, a first ground electrode layer is disposed on the second surface of the mother substrate and electrically connected to the metallized film. In each of the plurality of unit structures, a second ground electrode layer is disposed on the second surface of the mother substrate and electrically connected to the metallized film. In each of the plurality of unit structures, first and second element pads are disposed within the cavity and are for electrical element connection. In each of the plurality of unit structures, a first external electrode layer is disposed on the second surface of the mother substrate and electrically connected to the first element pad. In each of the plurality of unit structures, a second external electrode layer is disposed on the second surface of the mother substrate and electrically connected to the second element pad. The castellations are connected to first to fourth unit structures included in the plurality of unit structures, respectively. On the second surface of the mother substrate, the castellated electrode is connected with the first and second external electrode layers, and the first and second ground electrode layers, respectively.
Next, electrolytic plating is performed on the semi-finished substrate. After the electrolytic plating is performed, the first and second external electrode layers and the castellated electrode are cut off on the second surface of the mother substrate, respectively.
The description of the "first to fourth unit structures" does not mean that the total number of unit structures is 4. The total number of unit structures is any number of 4 or more.
Effects of the invention
According to the present invention, after the electrolytic plating is performed, the first and second external electrode layers and the castellated electrode are cut off from each other on the second surface of the mother substrate. Thus, the first and second external electrode layers can be electrically isolated from each other in the package. Thus, it is possible to electrically inspect each package after the electrical component is mounted and before the sheet-like substrate is divided. The cutting portion may be disposed near the castellated electrode. The castellation electrode is disposed at a position where the castellations are in contact with the first to fourth unit structures, that is, at a position where the boundaries of the unit structures are dense, and in the vicinity of such a position, it is easy to dispose the cutting portion while suppressing an influence on the number of packages obtained from the sheet-like substrate. Therefore, a decrease in the manufacturing efficiency of the package due to the provision of the cutting portion can be avoided. According to the above, it is possible to perform electrical inspection of each package after mounting the electrical component and before dividing the sheet-like substrate, and to improve the manufacturing efficiency of the package.
The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings.
Drawings
Fig. 1 is a perspective view schematically showing the structure of a sheet-like substrate in an embodiment of the present invention so as to show a cavity side.
Fig. 2 is a perspective view schematically showing the structure of the sheet-like substrate in the embodiment of the present invention so as to show the opposite side to the cavity side.
Fig. 3 is an exploded perspective view schematically showing the structure of an electronic device in an embodiment of the present invention.
Fig. 4 is a plan view schematically showing a structure of a cavity side of a sheet-like substrate in the embodiment of the present invention.
Fig. 5 is a plan view schematically showing the structure of the sheet-like substrate in the embodiment of the present invention, omitting the illustration of the structure shown in fig. 4.
Fig. 6 is a plan view schematically showing the structure of the sheet-like substrate in the embodiment of the present invention, omitting the structure shown in fig. 4 and the illustration of the mother substrate.
Fig. 7 is an enlarged view of the vicinity of the castellated electrode of fig. 6.
Fig. 8 is a plan view schematically showing the structure of a semi-finished substrate in the embodiment of the present invention, corresponding to fig. 6.
Fig. 9 is an enlarged view of the vicinity of the castellated electrode of fig. 8.
Fig. 10 is a flowchart schematically showing a method for manufacturing a sheet-like substrate in the embodiment of the present invention.
Fig. 11 is a flowchart schematically showing a method of manufacturing an electronic device according to an embodiment of the present invention.
Detailed Description
Embodiments of the present invention will be described below with reference to the drawings. In the drawings, the same or corresponding portions are denoted by the same reference numerals, and the description thereof is not repeated.
(sheet-like substrate)
Fig. 1 is a perspective view schematically showing the structure of the sheet substrate 80 in the present embodiment so as to show the cavity CV side. Fig. 2 is a perspective view schematically showing the structure of the sheet-like substrate 80 in the present embodiment so as to show the opposite side of the cavity CV side.
The sheet-like substrate 80 has an outer peripheral region and an effective region surrounded by the outer peripheral region. Thus, the peripheral region is located around the effective region. The effective region of the sheet substrate 80 is a region including a plurality of unit structures 9 arranged in a matrix. Between the unit structures 9 adjacent to each other, there is no need to provide a margin region that is discarded during the manufacturing process. That is, the unit structures 9 adjacent to each other may directly contact each other along the dividing groove 80G. In the present embodiment, each unit structure 9 has a rectangular shape in a planar layout, and a plurality of unit structures 9 are arranged along each side of the rectangular shape. The corners of the rectangular shape may be somewhat lacking.
The sheet substrate 80 has a mother substrate 10 and an electrode structure (described in detail below) subjected to electrolytic plating treatment. The mother substrate 10 is composed of a ceramic insulator, and has an upper surface S1 (first surface) and a lower surface S2 (second surface opposite to the first surface). The mother substrate 10 has a cavity CV provided in the upper surface S1 of each unit structure 9. The mother substrate 10 includes: a substrate upper portion 10a having a structure on the cavity CV side; and a substrate lower portion 10b having a structure opposite to the cavity CV side. The substrate upper portion 10a is laminated on the substrate lower portion 10b.
A dividing groove 80G is provided along the edge of the unit structure 9 on at least either one of the upper surface S1 and the lower surface S2 of the sheet-like substrate 80, preferably on both of them. The dividing groove 80G is provided not only in the effective region but also in the outer peripheral region. The dividing groove 80G is used to easily divide the sheet-like substrate 80 along the dividing groove. The dividing groove 80G has a V-shaped cross-sectional shape, for example. The dividing groove 80G may be provided on only one of the upper surface S1 and the lower surface S2. In addition, the dividing groove 80G may be omitted.
Fig. 3 is an exploded perspective view schematically showing the structure of an electronic device 90 manufactured using the sheet-like substrate 80 (fig. 1 and 2). The electronic device 90 includes a package 90G, an electrical element 91, and a cover 92. The electric element 91 is mounted on the first element pad 41 and the second element pad 42 in the cavity CV of the package 90G. The first element pad 41 and the second element pad 42 are electrodes of the package 90G for electrical connection with the electrical element 91. The cover 92 seals the cavity CV by engaging the package 90G. The plurality of unit structures 9 (fig. 1 and 2) are divided into packages 90G (fig. 3) accommodating the electric elements 91 (fig. 3). Therefore, the sheet substrate 80 is a multi-electronic component substrate for the package 90G.
Fig. 4 is a plan view schematically showing the structure of the cavity side of the sheet substrate 80. Fig. 5 is a plan view schematically showing the structure of the sheet-like substrate 80 in the present embodiment, with the structure shown in fig. 4 omitted. Fig. 6 is a plan view schematically showing the structure of the sheet-like substrate 80 in the present embodiment, omitting the illustration of the structures shown in fig. 4 and 5. In other words, fig. 6 is a view of the electrode structure provided on the lower surface S2 of the sheet-like substrate as seen from the cavity side (i.e., from the upper side) as in fig. 4 and 5. Fig. 7 is an enlarged view of the vicinity of the castellation electrode 70 of fig. 6. The sheet-like substrate 80 (fig. 1 and 2) is configured by laminating an upper structure 80a (fig. 4) including the substrate upper portion 10a and a lower structure 80b (fig. 5) including the substrate lower portion 10b.
In fig. 4 to 7, for convenience of the following description, 4 of the plurality of unit structures 9, that is, the first unit structure 9A to the fourth unit structure 9D, are denoted by reference numerals. In the figure, a first unit structure 9A and a second unit structure 9B are adjacent in one diagonal direction of the unit structure 9, and a third unit structure 9C and a fourth unit structure 9D are adjacent in the other diagonal direction of the unit structure. Further, in one side direction (lateral direction in the drawing) of the unit structure 9, the fourth unit structure 9D is adjacent to the first unit structure 9A, and the second unit structure 9B is adjacent to the third unit structure 9C. Further, in the other side direction (longitudinal direction in the drawing) of the unit structure 9, the fourth unit structure 9D is adjacent to the second unit structure 9B, and the first unit structure 9A is adjacent to the third unit structure 9C.
As shown in fig. 5, the sheet-like substrate 80 has a power supply connection terminal 81 and an outer peripheral wiring 82 on the substrate lower portion 10b as an electrode structure provided on the mother substrate 10 in the outer peripheral region. Electrolytic plating treatment is applied to the electrode structure. The power connection terminal 81 is used for voltage application in the electrolytic plating process. The power connection terminals 81 preferably protrude on the side surface of the sheet-like substrate 80. The outer peripheral wiring 82 is connected to the power supply connection terminal 81, and extends toward the effective area surrounded by the outer peripheral area. In addition, the outer peripheral wiring 82 may be covered by the substrate upper portion 10a (fig. 4).
The sheet substrate 80 has, as an electrode structure provided on the mother substrate 10, an effective region surrounded by an outer peripheral region: a metallized film 15; a first ground electrode layer 21 and a second ground electrode layer 22; a first outer peripheral via electrode 31 and a second outer Zhou Tongkong electrode 32; a first element pad 41 and a second element pad 42; a first external electrode layer 51 and a second external electrode layer 52; a first inner via electrode 61 and a second inner via electrode 62; a castellated electrode 70.
The castellations 70 are disposed at the corners of the unit structure 9. Therefore, castellations 70 are arranged at positions where the boundaries of the unit structures 9 are dense. With this arrangement, one castellation electrode 70 is arranged at a position in contact with the first to fourth unit structures 9A to 9D.
The castellated electrode is generally an electrode provided on a sidewall of the through hole or the notch, and has a hollow shape. In the present embodiment, the castellated electrode 70 is an electrode having a metal film provided on at least a part of a side wall of a through hole provided in the mother substrate 10. Specifically, the castellation electrode 70 has a metal film provided on a sidewall of a through hole provided in the mother substrate 10, in other words, at least a metal film provided on a sidewall of a through hole of the substrate lower portion 10b among through holes combined with the through hole of the substrate upper portion 10a and the through hole of the substrate lower portion 10b. Further, as shown in fig. 5, the castellation electrode 70 may also have an edge portion protruding from the edge of the through hole on the upper surface S1 of the substrate lower portion 10b. Further, as shown in fig. 6, the castellation electrode 70 may also have an edge portion protruding from the edge of the through hole on the lower surface S2.
Further, each castellated electrode 70 is divided into a plurality of portions by dividing the sheet-like substrate 80 along the dividing grooves 80G. As shown in fig. 3, the segmented castellations 70 are located at the corners of the package 90G.
In each of the plurality of unit structures 9, a metallized film 15 is disposed on the upper surface S1 of the mother substrate 10 and surrounds the cavity CV. A cover 92 (fig. 3) would be bonded to each metallized film 15.
In each of the plurality of unit structures 9, the first element pad 41 and the second element pad 42 are disposed in the cavity CV on the substrate lower portion 10b of the mother substrate 10. The electrical component 91 (fig. 3) is connected to the first component pad 41 and the second component pad 42. The first element pads 41 and the second element pads 42 are separated from each other.
In each of the plurality of unit structures 9, the first external electrode layer 51 and the second external electrode layer 52 are provided on the lower surface S2 of the mother substrate 10. In each of the plurality of unit structures 9, the first ground electrode layer 21 and the second ground electrode layer 22 are provided on the lower surface S2 of the mother substrate 10. The first external electrode layer 51 is separated from the second external electrode layer 52, the first ground electrode layer 21, and the second ground electrode layer 22, respectively. The second external electrode layer 52 is separated from the first external electrode layer 51, the first ground electrode layer 21, and the second ground electrode layer 22, respectively. The first ground electrode layer 21 and the second ground electrode layer 22 may be separated from each other. In the figure, in the rectangular shape of the unit structure 9, the first external electrode layer 51, the second external electrode layer 52, the first ground electrode layer 21, and the second ground electrode layer 22 are disposed at the lower right corner, the upper left corner, the lower left corner, and the upper right corner, respectively. In other words, in the unit structure 9 having two diagonal directions, the first and second external electrode layers 51 and 52 are arranged in one diagonal direction, and the first and second ground electrode layers 21 and 22 are arranged in the other diagonal direction.
In each of the plurality of unit structures 9, the first inner via electrode 61 penetrates the mother substrate 10 and connects between the first element pad 41 and the first external electrode layer 51. Thereby, the first external electrode layer 51 is electrically connected to the first element pad 41. In each of the plurality of unit structures 9, the second inner via electrode 62 penetrates the mother substrate 10 and connects between the second element pad 42 and the second external electrode layer 52. Thereby, the second external electrode layer 52 is electrically connected to the second element pad 42.
In each of the plurality of unit structures 9, the first outer peripheral through-hole electrode 31 penetrates the mother substrate 10 and connects between the metallized film 15 and the first ground electrode layer 21. Thereby, the first ground electrode layer 21 is electrically connected to the metallized film 15. In each of the plurality of unit structures 9, the second outer Zhou Tongkong electrode 32 penetrates the mother substrate 10 and connects between the metallized film 15 and the second ground electrode layer 22. Thereby, the second ground electrode layer 22 is electrically connected to the metallized film 15.
In the rectangular shape of the unit structure 9, the first outer peripheral via electrode 31 and the second outer Zhou Tongkong electrode 32 are disposed at the lower left corner and the upper right corner, respectively. In other words, in the unit structure 9 having two diagonal directions, the first outer peripheral via electrode 31 and the second outer Zhou Tongkong electrode 32 are arranged in the same diagonal direction as the diagonal direction in which the first ground electrode layer 21 and the second ground electrode layer 22 are arranged.
At least one of the first outer peripheral via electrode 31 and the second outer Zhou Tongkong electrode 32 is electrically connected to the outer peripheral wiring 82, and in the present embodiment, both are connected to the outer peripheral wiring 82. The connection may be direct connection or, as shown in fig. 5, may be via an edge portion of the castellation electrode 70.
In addition, as shown in fig. 5, in each of the plurality of unit structures 9, the first peripheral through-hole electrode 31 may be connected to the castellation electrode 70 on the upper surface S1 of the substrate lower portion 10b. As shown in fig. 5, in each of the plurality of unit structures 9, the second outer Zhou Tongkong electrode 32 can be connected to the castellations electrode 70 on the upper surface S1 of the lower substrate portion 10b.
As shown in fig. 7, on the lower surface S2 of the mother substrate 10, the castellated electrode 70 is electrically disconnected from the first external electrode layer 51 by the disconnection portion 73C. The castellated electrode 70 is electrically disconnected from the second external electrode layer 52 by the disconnection 74C. The castellated electrode 70 may be electrically cut from the first ground electrode layer 21 by the cut portion 71C. The castellated electrode 70 may be electrically cut from the second ground electrode layer 22 by a cut portion 72C. The cutting portions 71C, 72C, 73C, and 74C are typically portions where the wiring is cut by irradiation of laser light or the like. The sheet-like substrate 80 is obtained by subjecting a semi-finished substrate to electrolytic plating treatment and subsequent formation of the cut portions 71C, 72C, 73C, and 74C. The semi-finished substrate will be described below.
(semi-finished substrate and method for manufacturing sheet-like substrate Using the same)
The semi-finished substrate has substantially the same structure as the sheet-like substrate 80 described above. As a difference between the two, the electrode structure has not been subjected to electrolytic plating treatment at the time point when the semi-finished substrate is prepared. Further, patterns in the vicinity of the castellation electrode 70 on the lower surface S2 of the mother substrate 10 are different.
Fig. 8 is a plan view schematically showing the structure of a green sheet 80P according to the present embodiment, corresponding to fig. 6. Fig. 9 is an enlarged view of the vicinity of the castellated electrode 70 of fig. 8. As shown in fig. 9, in the semi-finished substrate 80P, on the lower surface S2 (fig. 2) of the mother substrate 10, the castellated electrode 70 is connected to the first external electrode layer 51, the second external electrode layer 52, the first ground electrode layer 21, and the second ground electrode layer 22, respectively. Specifically, as shown in fig. 9, the castellated electrode 70 has wiring portions 71 to 74 connected to the first ground electrode layer 21, the second ground electrode layer 22, the first external electrode layer 51, and the second external electrode layer 52, respectively, on the lower surface S2 (fig. 2). In addition, the portion on the lower surface S2 (the surface shown in fig. 9) in the castellated electrode 70 may also be divided into a plurality of portions (4 portions in fig. 9) by the separation groove 80G. Even in such a case, these plural portions are electrically connected to each other via the portions on the side walls in the castellation electrode 70. Therefore, the electrical connection between the electrode layers is not accidentally cut off due to the presence of the separation groove 80G.
The structures other than the above-described structures of the green sheet 80P are substantially the same as the structures of the sheet-like substrate 80 described above, and therefore, the description thereof will not be repeated.
Fig. 10 is a flowchart schematically showing a method of manufacturing a sheet substrate 80 using a semi-finished substrate 80P. First, in step S10 (fig. 10), a semi-finished substrate 80P (fig. 8 and 9) is prepared.
In step S20 (fig. 10), an electrolytic plating process is performed on the electrode structure of the semi-finished substrate 80P. For example, a nickel/gold plating process is performed.
Specifically, for the electrolytic plating process, a power supply (not shown) for electrolytic plating is connected to a power supply connection terminal 81 (fig. 1). As shown in fig. 5, the power supply connection terminal 81 is connected to the outer peripheral wiring 82. Accordingly, as shown by arrow CR1 (fig. 5), the current from the power supply reaches the second outer Zhou Tongkong electrode 32 in the first unit structure 9A through the power supply connection terminal 81 and the outer peripheral wiring 82. This current then passes through the second outer Zhou Tongkong electrode 32 to the metallized film 15 (fig. 4). Next, as shown by an arrow CR2 (fig. 4), the current passes through the metallized film 15 to reach the first peripheral through-hole electrode 31. Next, the current passes through the first outer peripheral through-hole electrode 31 to reach the first ground electrode layer 21 (fig. 8).
Next, referring to fig. 9, the current passes through the wiring portion 71 of the castellated electrode 70 and is distributed to the wiring portions 72 to 74 of the castellated electrode 70. Accordingly, the current reaches the second ground electrode layer 22 in the second unit structure 9B, the first external electrode layer 51 in the fourth unit structure 9D, and the second external electrode layer 52 in the third unit structure 9C through the wiring portions 72 to 74, respectively.
As a result, the first: the current passes from the second ground electrode layer 22 in the second unit structure 9B through the second outer Zhou Tongkong electrode 32 to the metallized film 15 in the second unit structure 9B (fig. 4). Second,: the current passes from the first external electrode layer 51 in the fourth unit structure 9D through the first inner via electrode 61 to the first element pad 41 in the fourth unit structure 9D (fig. 5). Third,: the current passes from the second external electrode layer 52 in the third unit structure 9C through the second inner via electrode 62 to the second element pad 42 in the third unit structure 9C (fig. 5).
As described above, the current supplied to the metallized film 15 in the first unit structure 9A reaches the metallized film 15 of the second unit structure 9B. The current can reach the metallized film of other unit structure through the same current path as described above. Since the current path is formed in this way, by supplying current to the unit structure 9 in the vicinity of the outer peripheral region among the unit structures 9 using the outer peripheral wiring 82, current can also be supplied to the unit structure 9 located further inside. That is, current can be supplied to all the unit structures 9. Accordingly, the electrolytic plating process of the entire electrode structure of the semi-finished substrate 80P can be performed.
In step S30 (fig. 10), after the electrolytic plating, the space between each of the first external electrode layer 51 and the second external electrode layer 52 and the castellation electrode 70 is cut off on the lower surface S2 of the mother substrate 10. Further, on the lower surface S2 of the mother substrate 10, the first ground electrode layer 21 and the second ground electrode layer 22 may be cut from the castellated electrode 70. Specifically, the wiring portions 73 and 74 are cut off (fig. 9), respectively, to form the cut-off portions 73C and 74C (fig. 7). The wiring portions 71 and 72 may be cut off (fig. 9), respectively, to form cut-off portions 71C and 72C (fig. 7). As a cutting method, a laser processing method is preferable. In this case, the cutting portions are fuse portions or ablation portions formed by irradiating laser light. According to such a cut-off portion, the first external electrode layer 51 and the second external electrode layer 52 are separated from the castellated electrode 70 on the lower surface S2, typically at intervals of 0.02mm or more and 0.10mm or less. The same applies to the interval between each of the first ground electrode layer 21 and the second ground electrode layer 22 and the castellated electrode 70.
(method for manufacturing electronic device Using sheet-like substrate)
Fig. 11 is a flowchart schematically showing a method of manufacturing an electronic device 90 (fig. 3) using the sheet-like substrate 80. First, in step S110, a sheet-like substrate 80 is prepared. In step S120, in each of the plurality of unit structures 9 of the sheet-like substrate 80, the electric element 91 (fig. 3) is mounted on the first element pad 41 and the second element pad 42. In step S130, next, the cover 92 (fig. 3) is bonded to the metallized film 15 in each of the plurality of unit structures 9 of the sheet-like substrate 80. Thereby, each of the electric elements 91 is sealed. As described above, the portions of the plurality of electronic devices 90 (fig. 3) are connected to each other through the dividing grooves 80G. In other words, in the steps S110 to S130, after the configuration is prepared in which the portions to be the plurality of packages 90G (fig. 3) are connected via the dividing grooves 80G, the electric element 91 is sealed in each of them.
In step S140, for each of the plurality of packages 90G (fig. 3) connected to each other as described above, electrical measurement is performed using the first external electrode layer 51 and the second external electrode layer 52. Thus, the electrical inspection of the electronic device 90 can be performed while maintaining the state where the portions of the plurality of packages 90G are connected.
In step S150, the sheet substrate 80 is next divided into a plurality of packages 90G (fig. 3) along the dividing grooves 80G. Thus, a plurality of electronic devices 90 are obtained.
(method for producing semi-finished substrate)
Hereinafter, a method for manufacturing the green sheet 80P will be described.
First, a slurry is prepared. Specifically, the ceramic powder, the sintering aid powder, the plasticizer, the binder, and the solvent, which are the main raw materials of the semi-finished substrate 80P, are kneaded and defoamed. For example, alumina (Al 2 O 3 ) Magnesium oxide (MgO), silicon dioxide (SiO) as sintering aid 2 ) Or calcium oxide (CaO), dioctyl phthalate as a plasticizer, an acrylate resin as a binder, toluene, xylene or alcohols as a solvent. The main material is not limited to alumina (Al 2 O 3 ) For example, aluminum nitride (Al 3 N 4 )。
The obtained slurry is formed into a sheet by a doctor blade method or the like, and then dried. Thus, an unfired ceramic sheet (green sheet) was obtained. Through holes are formed in the green sheet by punching and pressing. The through-hole is used to provide a cavity, a through-hole electrode, a castellated electrode, and the like in the semi-finished substrate 80P. An unfired metal (metallization paste) is printed in a pattern corresponding to the electrode structure of the green sheet 80P in the through-holes and on the surface of the green sheet. For printing, for example, screen printers are used. As the metallization paste, for example, a metallization paste containing a high-melting-point metal such as tungsten (W) or molybdenum (Mo) is used.
Next, the plurality of green sheets on which the unfired metal is printed as described above are stacked, specifically, two green sheets which are the upper structure 80a (fig. 4) and the lower structure 80b (fig. 5) are stacked. Then, pressure is applied to them while heating is performed. Thus, a laminate having a structure in which a plurality of green sheets are bonded to each other is obtained. A knife having a V-shaped tip was slid over the stack. Thereby, the dividing grooves 80G (fig. 1 and 2) are formed.
Then, the laminate is fired. The firing atmosphere is, for example, hydrogen (H) 2 ) Or nitrogen (N) 2 ) Is a reducing atmosphere of (a). The firing temperature is, for example, about 1600 ℃.
Thus, a semi-finished substrate 80P is obtained.
(summary of effects)
According to the present embodiment, after electrolytic plating is performed, as shown in fig. 7, the space between each of the first external electrode layer 51 and the second external electrode layer 52 and the castellated electrode 70 is cut off on the lower surface S2 of the mother substrate 10. In this way, the first external electrode layer 51 and the second external electrode layer 52 can be electrically isolated from each other in the package 90G (fig. 3). In this way, it is possible to perform electrical inspection on each package 90G after the electrical component 91 is mounted and before the sheet substrate 80 is divided.
The cutting portion can be disposed near the castellated electrode 70. The castellations 70 are arranged at positions where the castellations are in contact with the first to fourth unit structures 9A to 9D, that is, at positions where the boundaries of the unit structures 9 are dense, and in the vicinity of such positions, it is easy to arrange the cutting portions 73C and 74C while suppressing influence on the number of packages 90G obtained from the sheet-like substrate 80 (fig. 7). Therefore, a decrease in the manufacturing efficiency of the package 90G due to the provision of the cut portions 73C and 74C can be avoided.
As described above, the electrical inspection can be performed on each package 90G after the electrical component 91 is mounted and before the sheet-like substrate 80 is divided, and the manufacturing efficiency of the package 90G can be improved.
In the above description, the castellations 70 are provided at the positions contacting the first to fourth unit structures 9A to 9D, but as shown in fig. 4, castellations 70 contacting only 3 or less unit structures are provided near the outer peripheral region. In the present embodiment, the case where the matrix of the unit structure 9 has 3 rows and 3 columns is illustrated (see fig. 4), but the present embodiment is particularly useful when the number of rows of the matrix is 3 or more and the number of columns is 3 or more. However, the number of unit structures 9 is arbitrary as long as the unit structures 9 include the first to fourth unit structures 9A to 9D.
In the unit structure 9 described in detail above, the first external electrode layer 51 and the second external electrode layer 52 are arranged in one diagonal direction, and the first ground electrode layer 21 and the second ground electrode layer 22 are arranged in the other diagonal direction, but the arrangement of these electrode layers may be changed as appropriate. For example, the first external electrode layer 51 and the first ground electrode layer 21 may be arranged in one diagonal direction, and the second external electrode layer 52 and the second ground electrode layer 22 may be arranged in the other diagonal direction. The arrangement of the first outer peripheral via electrode 31, the second outer Zhou Tongkong electrode 32, the first inner via electrode 61, and the second inner via electrode 62 may be changed depending on the arrangement of these electrode layers. The arrangement of the first element pads 41 and the second element pads 42 is not limited to the arrangement shown in fig. 5, and may be changed according to the arrangement of the electrode layers and the types of the mounted electric elements.
In addition, in the above, for the purpose of electrically connecting the first ground electrode layer 21 with the metallized film 15, a member that replaces the first outer peripheral through hole electrode 31 may be used. Further, for the purpose of electrically connecting the second ground electrode layer 21 with the metallized film 15, a member instead of the second outer Zhou Tongkong electrode 32 may be used. Further, for the purpose of electrically connecting the first external electrode layer 51 with the first element pad 41, a member that replaces the first inner via electrode 61 may be used. Further, for the purpose of electrically connecting the second external electrode layer 52 with the second element pad 42, a member that replaces the second inner via electrode 62 may be used.
As examples of the above-described members, a castellated electrode penetrating between the upper surface S1 and the lower surface S2 may be provided with respect to the first outer peripheral through-hole electrode 31, the second outer Zhou Tongkong electrode 32, the first inner through-hole electrode 61, and the second inner through-hole electrode 62. The castellations may be separated from the castellations 70 (fig. 9), for example, and disposed at the boundary between the two unit structures 9.
As an example of the above-described members, a combination of a castellated electrode including an electrode disposed on a sidewall of the cavity CV and a via electrode electrically connected to the castellated electrode and penetrating the substrate lower portion 10b may be provided as the first outer peripheral via electrode 31 and the second outer Zhou Tongkong electrode 32.
The present invention can be freely combined with each other or modified and omitted as appropriate within the scope of the present invention. Although the present invention has been described in detail, the above description is illustrative in all aspects, and the present invention is not limited thereto. It should be understood that numerous modifications, not illustrated, can be devised without departing from the scope of the invention.
Symbol description
S1 upper surface (first surface)
S2 lower surface (second surface)
CV cavity
9. Unit structure
9A to 9D first to fourth unit structures
10. Mother substrate
10a upper part of the substrate
10b lower part of the substrate
15. Metallized film
21. First ground electrode layer
22. Second ground electrode layer
31. First peripheral through-hole electrode
32. Second outer Zhou Tongkong electrode
41. First element bonding pad
42. Second element bonding pad
51. A first external electrode layer
52. Second external electrode layer
61. First inner via electrode
62. Second inner via electrode
70. Castle type electrode
71 to 74 wiring portions
71C, 72C, 73C, 74C cutting portions
80. Sheet-like substrate
80a superstructure
80b substructure
80G dividing groove
80P semi-finished substrate
81. Power supply connection terminal
82. Peripheral wiring
90. Electronic device
90G package
91. Electrical component
92. And a cover body.

Claims (12)

1. A sheet-like substrate having an effective region and an outer peripheral region around the effective region, the effective region including a plurality of unit structures arranged in a matrix, the plurality of unit structures being divided into packages accommodating electric components, the sheet-like substrate comprising:
a mother substrate composed of a ceramic insulator having a first surface on which a cavity is provided in each of the plurality of unit structures and a second surface opposite to the first surface;
a metallized film disposed on the first surface of the mother substrate in each of the plurality of unit structures and surrounding the cavity;
a first ground electrode layer disposed on the second surface of the mother substrate in each of the plurality of unit structures and electrically connected to the metallized film;
a second ground electrode layer disposed on the second surface of the mother substrate in each of the plurality of unit structures and electrically connected to the metallized film;
a first element pad and a second element pad disposed within the cavity in each of the plurality of unit structures and electrically connected to the electrical element;
a first external electrode layer disposed on the second surface of the mother substrate in each of the plurality of unit structures and electrically connected to the first element pad;
a second external electrode layer disposed on the second surface of the mother substrate in each of the plurality of unit structures and electrically connected to the second element pad;
a castellated electrode connected to each of the first to fourth unit structures included in the plurality of unit structures;
a power supply connection terminal provided in the outer peripheral region; and
an outer peripheral wiring extending from the power supply connection terminal to the active region,
the castellation electrode is electrically disconnected from the first and second external electrode layers, respectively, on the second surface of the mother substrate.
2. The sheet substrate according to claim 1, wherein,
each of the plurality of unit structures further includes a first outer peripheral via electrode penetrating the mother substrate and connecting the metallized film to the first ground electrode layer.
3. The sheet substrate according to claim 1 or 2, wherein,
in each of the plurality of unit structures, a second outer Zhou Tongkong electrode is further provided, and the second outer Zhou Tongkong electrode penetrates the mother substrate and connects the metallized film to the second ground electrode layer.
4. The sheet substrate according to claim 1 or 2, wherein,
each of the plurality of unit structures further includes a first inner via electrode penetrating the mother substrate and connecting the first element pad to the first external electrode layer.
5. The sheet substrate according to claim 1 or 2, wherein,
in each of the plurality of unit structures, a second inner via electrode penetrating the mother substrate and connecting the second element pad to the second external electrode layer is further provided.
6. The sheet substrate according to claim 1 or 2, wherein,
the unit structures adjacent to each other among the plurality of unit structures are directly connected to each other along a dividing groove provided in at least any one of the first surface and the second surface.
7. A method for manufacturing a sheet-like substrate having an effective region and an outer peripheral region around the effective region, the effective region including a plurality of unit structures arranged in a matrix, the plurality of unit structures being divided into packages for housing electric components, wherein,
the method for manufacturing a sheet-like substrate comprises a step of preparing a semi-finished substrate,
the semi-finished substrate comprises:
a mother substrate composed of a ceramic insulator having a first surface on which a cavity is provided in each of the plurality of unit structures and a second surface opposite to the first surface;
a metallized film disposed on the first surface of the mother substrate in each of the plurality of unit structures and surrounding the cavity;
a first ground electrode layer disposed on the second surface of the mother substrate in each of the plurality of unit structures and electrically connected to the metallized film;
a second ground electrode layer disposed on the second surface of the mother substrate in each of the plurality of unit structures and electrically connected to the metallized film;
a first element pad and a second element pad disposed within the cavity in each of the plurality of unit structures and electrically connected to the electrical element;
a first external electrode layer disposed on the second surface of the mother substrate in each of the plurality of unit structures and electrically connected to the first element pad;
a second external electrode layer disposed on the second surface of the mother substrate in each of the plurality of unit structures and electrically connected to the second element pad; and
a castellated electrode connected to each of the first to fourth unit structures included in the plurality of unit structures,
on the second surface of the mother substrate, the castellated electrode is connected with the first and second external electrode layers, and the first and second ground electrode layers, respectively,
the method for manufacturing a sheet-like substrate further comprises:
a step of performing electrolytic plating on the semi-finished substrate; and
and cutting off the first and second external electrode layers and the castellated electrode on the second surface of the mother substrate after the electrolytic plating is performed.
8. The method for producing a sheet substrate according to claim 7, wherein,
in the step of preparing the semi-finished substrate, the semi-finished substrate includes, in each of the plurality of unit structures, a first peripheral through-hole electrode penetrating the mother substrate and connecting between the metallized film and the first ground electrode layer.
9. The method for producing a sheet-like substrate according to claim 7 or 8, wherein,
in the step of preparing the semi-finished substrate, the semi-finished substrate includes a second outer Zhou Tongkong electrode in each of the plurality of unit structures, the second outer Zhou Tongkong electrode penetrating the mother substrate and connecting the metallized film to the second ground electrode layer.
10. The method for producing a sheet-like substrate according to claim 7 or 8, wherein,
in the step of preparing the semi-finished substrate, the semi-finished substrate includes a first inner via electrode penetrating the mother substrate and connecting the first element pad with the first external electrode layer in each of the plurality of unit structures.
11. The method for producing a sheet-like substrate according to claim 7 or 8, wherein,
in the step of preparing the semi-finished substrate, the semi-finished substrate includes a second inner via electrode penetrating the mother substrate and connecting the second element pad with the second external electrode layer in each of the plurality of unit structures.
12. The method for producing a sheet-like substrate according to claim 7 or 8, wherein,
the unit structures adjacent to each other among the plurality of unit structures are directly connected to each other along a dividing groove provided in at least any one of the first surface and the second surface.
CN201880062354.5A 2017-11-29 2018-11-26 Sheet-like substrate and method for manufacturing sheet-like substrate Active CN111133570B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2017-228594 2017-11-29
JP2017228594 2017-11-29
PCT/JP2018/043329 WO2019107298A1 (en) 2017-11-29 2018-11-26 Sheet substrate and method for manufacturing sheet substrate

Publications (2)

Publication Number Publication Date
CN111133570A CN111133570A (en) 2020-05-08
CN111133570B true CN111133570B (en) 2023-09-15

Family

ID=66664898

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201880062354.5A Active CN111133570B (en) 2017-11-29 2018-11-26 Sheet-like substrate and method for manufacturing sheet-like substrate

Country Status (3)

Country Link
JP (1) JP6886043B2 (en)
CN (1) CN111133570B (en)
WO (1) WO2019107298A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024024683A1 (en) * 2022-07-29 2024-02-01 Ngkエレクトロデバイス株式会社 Ceramic wiring member motherboard and ceramic wiring member

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102249A (en) * 1991-10-08 1993-04-23 Sony Corp Electronic component, substrate for mounting electronic circuit element and manufacture thereof
JP2006013205A (en) * 2004-06-28 2006-01-12 Akita Denshi Systems:Kk Semiconductor device and manufacturing method therefor
JP2012151255A (en) * 2011-01-19 2012-08-09 Ngk Spark Plug Co Ltd Multi-piece divided wiring board
JP2012235519A (en) * 2009-11-11 2012-11-29 Nippon Dempa Kogyo Co Ltd Sheet like ceramic base and manufacturing method of the same
JP2015041891A (en) * 2013-08-22 2015-03-02 セイコーエプソン株式会社 Sheet substrate, method for manufacturing electronic device, and method for inspecting electronic device
JP2016072606A (en) * 2014-09-30 2016-05-09 日本特殊陶業株式会社 Wiring board and multi-piece wiring board

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101983630B1 (en) * 2016-01-22 2019-05-29 쿄세라 코포레이션 Package for storing electronic components, multi-piece wiring board, electronic device and electronic module

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102249A (en) * 1991-10-08 1993-04-23 Sony Corp Electronic component, substrate for mounting electronic circuit element and manufacture thereof
JP2006013205A (en) * 2004-06-28 2006-01-12 Akita Denshi Systems:Kk Semiconductor device and manufacturing method therefor
JP2012235519A (en) * 2009-11-11 2012-11-29 Nippon Dempa Kogyo Co Ltd Sheet like ceramic base and manufacturing method of the same
JP2012151255A (en) * 2011-01-19 2012-08-09 Ngk Spark Plug Co Ltd Multi-piece divided wiring board
JP2015041891A (en) * 2013-08-22 2015-03-02 セイコーエプソン株式会社 Sheet substrate, method for manufacturing electronic device, and method for inspecting electronic device
JP2016072606A (en) * 2014-09-30 2016-05-09 日本特殊陶業株式会社 Wiring board and multi-piece wiring board

Also Published As

Publication number Publication date
WO2019107298A1 (en) 2019-06-06
JPWO2019107298A1 (en) 2020-09-24
CN111133570A (en) 2020-05-08
JP6886043B2 (en) 2021-06-16

Similar Documents

Publication Publication Date Title
US10832980B2 (en) Electronic component housing package, multi-piece wiring substrate, electronic apparatus, and electronic module
CN111133570B (en) Sheet-like substrate and method for manufacturing sheet-like substrate
KR20110019536A (en) Ceramic substrate and manufacturing method thereof
JP5738109B2 (en) Multiple wiring board
JP4501524B2 (en) Ceramic multilayer substrate and manufacturing method thereof
JP2017200124A (en) Package for electronic component accommodation, and electronic device using the same
JP6005462B2 (en) Ceramic parts and manufacturing method thereof
CN114762098A (en) Electronic component housing package, electronic device, and electronic module
JP5078441B2 (en) Electronic component storage package, multi-piece electronic component storage package and electronic device, and methods for distinguishing between them
JP2004221514A (en) Multi-piece wiring substrate
US9236845B2 (en) Ceramic multilayer component
WO2014046133A1 (en) Package for accommodating electronic part, and electronic device
JP4889401B2 (en) Electronic component storage package, multi-component electronic component storage package, and electronic device
JP2007043061A (en) Multi-pattern wiring board
JP2014007292A (en) Electronic component housing package and electronic device
JP2006185977A (en) Wiring board
JPH11312753A (en) Wiring board
JP5289874B2 (en) Manufacturing method of ceramic parts
JP2006165177A (en) Ceramic package for storing electronic component, and manufacturing method therefor
JP2007234657A (en) Multiple patterning wiring board
JP2002353573A (en) Ceramic wiring board of multiple allocation
JPH05335441A (en) Package for accommodating semiconductor element
JP2005085834A (en) Multiple patterning wiring board
JP2015115489A (en) Multi-piece wiring board and wiring board
JPH055400B2 (en)

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant