CN111052374A - 多级分布式钳位器 - Google Patents

多级分布式钳位器 Download PDF

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Publication number
CN111052374A
CN111052374A CN201780094418.5A CN201780094418A CN111052374A CN 111052374 A CN111052374 A CN 111052374A CN 201780094418 A CN201780094418 A CN 201780094418A CN 111052374 A CN111052374 A CN 111052374A
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China
Prior art keywords
contacts
coupled
die
voltage
stage
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Pending
Application number
CN201780094418.5A
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English (en)
Chinese (zh)
Inventor
B·崔
K·拉达克里希南
W·兰贝特
M·希尔
K·巴拉斯
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Intel Corp
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Intel Corp
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Publication of CN111052374A publication Critical patent/CN111052374A/zh
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    • HELECTRICITY
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    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • H01L23/5286Arrangements of power or ground buses
    • HELECTRICITY
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    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
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    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • HELECTRICITY
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    • H01L25/50Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
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    • H01L2224/141Disposition
    • H01L2224/1418Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/14181On opposite sides of the body
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    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2225/06513Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
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    • H01L2225/06517Bump or bump-like direct electrical connections from device to substrate
    • HELECTRICITY
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    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06541Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H01L2225/06544Design considerations for via connections, e.g. geometry or layout
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223Capacitor integral with wiring layers
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN201780094418.5A 2017-09-29 2017-09-29 多级分布式钳位器 Pending CN111052374A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2017/054634 WO2019066976A1 (fr) 2017-09-29 2017-09-29 Pinces distribuées multiniveaux

Publications (1)

Publication Number Publication Date
CN111052374A true CN111052374A (zh) 2020-04-21

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CN201780094418.5A Pending CN111052374A (zh) 2017-09-29 2017-09-29 多级分布式钳位器

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Country Link
US (1) US11380652B2 (fr)
EP (1) EP3688802A4 (fr)
CN (1) CN111052374A (fr)
WO (1) WO2019066976A1 (fr)

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US11710720B2 (en) * 2018-06-28 2023-07-25 Intel Corporation Integrated multi-die partitioned voltage regulator
US11960339B2 (en) * 2021-07-09 2024-04-16 Advanced Micro Devices, Inc. Multi-die stacked power delivery

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US20080284037A1 (en) * 2007-05-15 2008-11-20 Andry Paul S Apparatus and Methods for Constructing Semiconductor Chip Packages with Silicon Space Transformer Carriers
US20100123215A1 (en) * 2008-11-20 2010-05-20 Qualcomm Incorporated Capacitor Die Design for Small Form Factors
US20110050334A1 (en) * 2009-09-02 2011-03-03 Qualcomm Incorporated Integrated Voltage Regulator with Embedded Passive Device(s)
WO2014008415A1 (fr) * 2012-07-05 2014-01-09 Littelfuse, Inc. Dispositif de limitation en tension destiné à une protection de circuit de surtension transitoire
WO2014094115A1 (fr) * 2012-12-21 2014-06-26 Gan Systems Inc. Dispositifs et systèmes comprenant des pilotes pour circuits de conversion de puissance
CN105742270A (zh) * 2014-12-24 2016-07-06 英特尔公司 堆叠集成电路封装中的集成无源组件
CN106341045A (zh) * 2015-07-07 2017-01-18 快捷半导体(苏州)有限公司 电源系统、自适应钳位电路及控制自适应钳位电路的方法

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US7952194B2 (en) * 2001-10-26 2011-05-31 Intel Corporation Silicon interposer-based hybrid voltage regulator system for VLSI devices
US7576434B2 (en) 2007-06-26 2009-08-18 Intel Corporation Wafer-level solder bumps
US8390071B2 (en) * 2010-01-19 2013-03-05 Freescale Semiconductor, Inc. ESD protection with increased current capability
JP2012253266A (ja) * 2011-06-06 2012-12-20 Sony Corp 半導体集積回路
JP5504235B2 (ja) 2011-09-29 2014-05-28 株式会社東芝 半導体装置
US8716856B2 (en) 2012-08-02 2014-05-06 Globalfoundries Singapore Pte. Ltd. Device with integrated power supply
US10115671B2 (en) 2012-08-03 2018-10-30 Snaptrack, Inc. Incorporation of passives and fine pitch through via for package on package
US9129935B1 (en) * 2012-10-05 2015-09-08 Altera Corporation Multi-chip packages with reduced power distribution network noise
JP2016526306A (ja) 2014-07-11 2016-09-01 インテル コーポレイション スケーラブルパッケージアーキテクチャ並びに関連する技法及び構造
US9406648B2 (en) * 2014-09-25 2016-08-02 Taiwan Semiconductor Manufacturing Company, Ltd. Power supply arrangement for semiconductor device
US10734806B2 (en) * 2016-07-21 2020-08-04 Analog Devices, Inc. High voltage clamps with transient activation and activation release control
US20190089150A1 (en) * 2017-09-19 2019-03-21 Kandou Labs, S.A. Distributed electrostatic discharge protection for chip-to-chip communications interface

Patent Citations (8)

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Publication number Priority date Publication date Assignee Title
US6376909B1 (en) * 1999-09-02 2002-04-23 Micron Technology, Inc. Mixed-mode stacked integrated circuit with power supply circuit part of the stack
US20080284037A1 (en) * 2007-05-15 2008-11-20 Andry Paul S Apparatus and Methods for Constructing Semiconductor Chip Packages with Silicon Space Transformer Carriers
US20100123215A1 (en) * 2008-11-20 2010-05-20 Qualcomm Incorporated Capacitor Die Design for Small Form Factors
US20110050334A1 (en) * 2009-09-02 2011-03-03 Qualcomm Incorporated Integrated Voltage Regulator with Embedded Passive Device(s)
WO2014008415A1 (fr) * 2012-07-05 2014-01-09 Littelfuse, Inc. Dispositif de limitation en tension destiné à une protection de circuit de surtension transitoire
WO2014094115A1 (fr) * 2012-12-21 2014-06-26 Gan Systems Inc. Dispositifs et systèmes comprenant des pilotes pour circuits de conversion de puissance
CN105742270A (zh) * 2014-12-24 2016-07-06 英特尔公司 堆叠集成电路封装中的集成无源组件
CN106341045A (zh) * 2015-07-07 2017-01-18 快捷半导体(苏州)有限公司 电源系统、自适应钳位电路及控制自适应钳位电路的方法

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EP3688802A4 (fr) 2021-05-19
US20200251448A1 (en) 2020-08-06
US11380652B2 (en) 2022-07-05
WO2019066976A1 (fr) 2019-04-04
EP3688802A1 (fr) 2020-08-05

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