CN111052347B - 高密度多组件且串联的封装件 - Google Patents

高密度多组件且串联的封装件 Download PDF

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Publication number
CN111052347B
CN111052347B CN201880051521.6A CN201880051521A CN111052347B CN 111052347 B CN111052347 B CN 111052347B CN 201880051521 A CN201880051521 A CN 201880051521A CN 111052347 B CN111052347 B CN 111052347B
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component package
density multi
forming
electronic components
interposer
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CN111052347A (zh
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詹姆斯·A·伯克
约翰·巴尔蒂图德
盖伦·W·米勒
约翰·E·麦康奈尔
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Kemet Electronics Corp
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Kemet Electronics Corp
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Priority claimed from US15/699,654 external-priority patent/US10681814B2/en
Priority claimed from US15/804,515 external-priority patent/US10707145B2/en
Priority claimed from US15/852,799 external-priority patent/US10178770B1/en
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Abstract

提供了一种改进的高密度多组件封装件。该封装件包括至少两个电子组件。每个电子组件包括第一外部端子和第二外部端子。至少一个电连接在相邻电子组件的相邻第一外部端子之间。至少一个机械连接在相邻电子组件之间。至少两个相邻电子组件串联连接。

Description

高密度多组件且串联的封装件
相关申请的交叉引用
本申请是要求于2017年11月6日提交的未决美国专利申请No.
15/804,515的优先权的部分继续申请，该未决美国专利申请No.
15/804,515是要求于2017年9月8日提交的未决美国专利申请No.
15/699,654的优先权的部分继续申请，以上两个未决美国专利申请以引用的方式并入本文中。本申请还是要求于2017年12月22日提交的未决美国专利申请No.15/852,799的优先权的部分继续申请，该未决美国专利申请通过引用并入本文。
技术领域
本发明涉及一种电子组件的高密度封装件，以及一种制造该封装件的方法，其中在有限的覆盖区(footprint)内可以实现增加的功能性。更具体地说，本发明具体涉及一种高密度封装件，其包括插入件、高温导电粘合剂(HTCA)和高温绝缘粘合剂(HTIA)的组合，其允许多种电子组件的串联连接。
背景技术
对在日益变小的装置中提供增加的功能性的电子产品存在持续的需求。这种称为小型化的期望已经主导了与组件、安装技术等相关的研究工作。虽然大部分努力集中在减小电路板上的电子组件的覆盖区，但是最近的努力已经集中在堆叠组件，从而占据电路板上方和下方的空间，而不是占据电路板的表面积。
在共同转让给McConnell等人的美国专利No.9,472,342中描述了堆叠的多层陶瓷电容器(MLCC)，该专利通过引用结合到本文中，其中无引线多层陶瓷电容器以堆叠的形式形成，在该堆叠中，使用瞬态液相烧结(TLPS)粘合剂将两个或更多个MLCC通过它们的端子接合在一起。由于TLPS在焊接温度下不会回流，因此可以通过本领域已知的技术(例如焊接)对所得到的堆叠件进行表面安装。
尽管是有利的，但是无引线堆叠仅提供电并联的电容器，因此应用有些受限。存在许多需要串联连接的电子组件的应用。可以通过端对端地(而不是以堆叠方式)接合各个组件的端子来实现串联连接的组件，然而这增加了安装所需的空间，这与小型化的强烈期望相反。
目前需要一种包括多个组件的封装件，这些组件可以串联连接，同时使封装件在电路板上的覆盖区最小化。本文提供一种用于多个组件(优选包括至少一个MLCC)的改良封装件，其中该封装件中的至少一些电子组件串联连接。
发明内容
本发明涉及高密度多组件封装件。
更具体地说，本发明涉及高密度多组件封装件，其允许封装件中的不同组件串联或并联连接。
本发明的特定特征是能够将高密度封装件垂直或水平地安装在电路板上。
如将认识到的，在高密度多组件封装件和制造高密度多组件封装件的方法中提供这些和其它实施例。高密度多组件封装件包括至少两个电子组件，其中电子组件中的每个电子组件包括第一外部端子和第二外部端子。至少一个插入件在相邻电子组件之间并且通过互连件附接到插入件，其中插入件选自有源插入件和机械插入件。相邻电子组件串联连接。
在电子电路中提供了又一实施例。该电子电路包括高密度多组件封装件，该封装件包括至少两个电子组件，其中每个电子组件包括第一外部端子和第二外部端子。插入件在相邻电子组件之间，其中插入件选自有源插入件和机械插入件。相邻电子组件串联连接。提供一种电路板，其中该电路板包括迹线，其中至少一个迹线是有源迹线，并且至少一个迹线是机械焊盘。第一电子组件的至少一个第一外部端子与一个有源迹线电接触，并且第二电子组件的至少一个第二外部端子与机械焊盘电接触。
在用于形成高密度多组件封装件的方法中提供又一实施例，所述方法包括：
提供至少两个电子组件，其中每个电子组件包括第一外部端子和第二外部端子；
形成电子组件的堆叠件，其中至少一个插入件在相邻电子组件之间，其中所述插入件选自有源插入件和机械插入件；以及
利用互连件将所述第一外部端子附接至所述插入件上的第一迹线，并且将所述第二外部端子附接至所述插入件上的第二迹线，其中相邻电子组件串联连接。
在用于形成电子电路的方法中提供了又一实施例，该方法包括：
通过以下步骤形成高密度多组件封装件：
提供至少两个电子组件，其中每个电子组件包括第一外部端子和第二外部端子；
形成电子组件的堆叠件，其中至少一个插入件在相邻电子组件之间，其中所述插入件选自有源插入件和机械插入件；以及
利用互连件将所述第一外部端子附接到所述插入件上的第一迹线，并且将所述第二外部端子附接到所述插入件上的第二迹线，其中相邻电子组件串联连接；
提供包括迹线的电路板，其中至少一个迹线是有源迹线，并且至少一个迹线是机械焊盘；
利用互连件将第一电子组件的至少一个第一外部端子附接到一个有源迹线；以及
利用所述互连件将第二电子组件的至少一个第二外部端子附接到机械焊盘。
在高密度多组件封装件中提供了又一实施例。该封装件具有至少两个电子组件，其中每个电子组件包括第一外部端子和第二外部端子。至少一个第一粘合剂在相邻电子组件的相邻第一外部端子之间。至少一个第二粘合剂在相邻电子组件之间，且至少两个相邻电子组件串联连接。第一粘合剂和第二粘合剂独立地选自由高温导电粘合剂和高温绝缘粘合剂构成的组。
在电子电路中提供了又一实施例。该电子电路具有高密度多组件封装件，其中该封装件包括至少两个电子组件，其中每个电子组件包括第一外部端子和第二外部端子，在相邻第一外部端子之间的至少一个第一粘合剂，在相邻电子组件之间的至少一个第二粘合剂，并且其中至少两个相邻电子组件串联连接。第一粘合剂和第二粘合剂独立地选自由高温导电粘合剂和高温绝缘粘合剂构成的组。该电子电路还包括电路板，该电路板包括迹线，其中至少一个迹线是有源迹线，并且所述迹线中的至少一个迹线是机械焊盘。第一电子组件的至少一个第一外部端子与一个有源迹线电接触。第二电子组件的至少一个第二外部端子与机械焊盘电接触。
在用于形成高密度多组件封装件的方法中提供又一实施例。该方法包括：
提供至少两个电子组件，其中每个电子组件包括第一外部端子和第二外部端子；
形成相邻电子组件的堆叠件；
利用相邻第一外部端子之间的第一粘合剂附接相邻第一外部端子；
利用相邻电子组件之间的第二粘合剂附接相邻电子组件；
其中所述第一粘合剂和所述第二粘合剂独立地选自由高温导电粘合剂和高温绝缘粘合剂构成的组；以及
其中相邻电子组件串联连接。
在包括至少两个电子组件的高密度多组件封装件中提供了又一个实施例。每个电子组件包括第一外部端子和第二外部端子。至少一个电连接在相邻电子组件的相邻第一外部端子之间。至少一个机械连接在相邻电子组件之间。至少两个相邻电子组件串联连接。
在用于形成高密度多组件封装件的方法中提供又一实施例，所述方法包括：
提供至少两个电子组件，其中每个电子组件包括第一外部端子和第二外部端子；
形成电子组件的堆叠件；
在相邻电子组件的相邻第一外部端子之间形成至少一个电连接；在相邻电子组件之间形成至少一个机械连接；以及
其中所述相邻电子组件串联连接。
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图1和图1A是本发明的实施例的示意性侧视图。
图2是本发明的实施例的示意性侧视图。
图3是本发明的实施例的示意性侧视图。
图4是本发明的实施例的示意性侧视图。
图5是本发明的实施例的示意性侧视图。
图6是本发明的实施例的示意性侧视图。
图7是本发明的实施例的示意性横截面侧视图。
图8是本发明的实施例的示意性横截面侧视图。
图9是本发明的实施例的示意性横截面侧视图。
图10是本发明的实施例的示意性俯视图。
图11是本发明的实施例的示意性俯视图。
图12是本发明的实施例的示意性俯视图。
图13是本发明的实施例的示意性俯视图。
图14是本发明的实施例的电气示意图。
图15是本发明的实施例的电气示意图。
图16A是本发明的实施例的示意性侧视图。
图16B是本发明的实施例的示意性侧视图。
图17是本发明的实施例的示意性俯视图。
图18是本发明的实施例的示意性侧视图。
图19是本发明的实施例的示意性俯视图。
图20是本发明的实施例的示意性侧视图。
图21是本发明的实施例的电气示意图。
图22是本发明的实施例的电气示意图。
图23是本发明的实施例的示意性侧视图。
图24是本发明的实施例的示意性侧视图。
图25是本发明的实施例的示意性侧视图。
图26是本发明的实施例的示意性侧视图。
图27是本发明的实施例的电气示意图。
图28是本发明的实施例的电气示意图。
图29是本发明的实施例的电气示意图。
图30是本发明的实施例的示意性侧视图。
图31是本发明的实施例的示意性侧视图。
图32是本发明的实施例的示意性侧视图。
图33是本发明的实施例的示意性横截面侧视图。
图34是本发明的实施例的示意性横截面侧视图。
图35是本发明的实施例的示意性横截面侧视图。
图36是本发明的实施例的示意性横截面侧视图。
图37是本发明的实施例的电气示意图。
图38是本发明的实施例的示意性横截面俯视图。
图39是本发明的实施例的示意性横截面俯视图。
图40是本发明的实施例的示意性横截面俯视图。
图41和图42是本发明的实施例的电气示意图。
图43是本发明的实施例的电气示意图。
图44是本发明的实施例的示意性横截面侧视图。
图45是本发明的实施例的示意性横截面俯视图。
图46是本发明的实施例的示意性横截面侧视图。
图47是本发明的实施例的示意性横截面侧视图。
图48和图48A是本发明的实施例的示意性横截面俯视图。
图49是本发明的实施例的示意性横截面俯视图。
图50是本发明的实施例的示意性横截面俯视图。
图51是本发明的实施例的示意性横截面俯视图。
具体实施方式
本发明涉及一种电子组件的高密度多组件封装件，其中至少一些电子组件串联连接，并且该封装件使在电路板上所需的表面积最小化。更具体地说，本发明涉及一种电子组件的堆叠件，其包括在相邻电子组件的相邻外部端子之间或相邻电子组件之间的高温导电粘合剂(HTCA)、高温绝缘粘合剂(HTIA)、和插入件的组合。该插入件提供了在电子组件的堆叠件内的每个相邻组件的一个端子之间的连接。该插入件还可提供组件间绝缘和/或分离，以避免高压应用中的电弧放电。
在一个实施例中，电子组件的封装件可以是表面安装的，其中最外面的组件的末端端子电连接到电路。高密度多组件封装件可以用于形成包含混合电子组件的高密度封装件，并且提供电串联以及电并联连接电子组件的灵活性，从而使得多功能组件的高密度封装件能够具有各种电子配置。
在一个实施例中，相邻电子组件之间的HTCA和HTIA的组合提供了串联配置。在本发明中，HTCA提供电子组件堆叠件内的相邻组件的端子之间的电连接。HTIA提供了相邻组件之间的机械结合和电绝缘。HTCA和HTIA的组合允许组件被布置在具有串联和并联连接性的较高密度的封装件中。这种压紧(compaction)在垂直或水平安装配置中都是有益的。在一个实施例中，电子组件的封装件可以是表面安装的，其中最外面的组件的末端端子电连接到电路。高密度多组件封装件可以用于形成包含混合电子组件的高密度封装件，并且提供电串联以及电并联连接电子组件的灵活性，从而使得多功能组件的高密度封装件能够具有各种电子配置。HTCA和HTIA可以在同一过程中被接合或分别地被接合。此外，组件可以形成为接合的堆叠件并且该堆叠件随后被安装到电路板，或者电路板安装和堆叠件形成可以同时发生。
为了使用插入件在相邻电子组件之间形成串联连接，在实施例中，插入件具有通过插入件的电连接，插入件用作如将描述的过孔或围绕插入件的衬底的导电包覆物(wrap)。可以是迹线组件的焊料焊盘优选地设置在过孔或包覆物上，以形成到电子组件的外部端子的机械和电接合。过孔可以用导电材料填充或不填充导电材料。在不填充导电材料的情况下，在组装期间可以用互连材料填充过孔以连接相对侧上的组件。烧结的金属膏、导电粘合剂或TLPS是合适的互连件，因为它们可以被固化或烧结以在组装过程中形成连接而在工艺期间不流出。可以使用任何导电金属来形成这些导电焊盘。在有机插入件的情况下，铜和铝是常见的，但是对于无机插入件，可以使用任何厚或薄的导电金属。这些也可以通过过度电镀(over-plating)来保护。
将参考形成本公开的整体的、非限制性的组成部分的附图来描述本发明。在各个附图中，类似的元件将相应地编号。
在图1和图2中以横截面示意图示出了插入件。在图1中，插入件10包括通过延伸穿过衬底16的通孔14形成的有源焊盘12，从而提供衬底两侧的导电焊盘18之间的电连接。机械焊盘20不与衬底上的与其相对的机械焊盘电接触。在图2中，有源焊盘12是环绕(wrap-around)焊盘的形式，而机械焊盘20是衬底16的表面上的迹线的一部分。具有至少一个有源焊盘和至少一个可选机械焊盘的插入件在本文中将被称为有源插入件。图1A中示出了具有未填充的过孔15的插入件，其中，可以在组装之前或组装期间填充过孔14’。
将参考图3描述本发明的实施例，其中以示意性侧视图示出了高密度多组件封装件30。在图3中，为了讨论的目的示出了四个电子组件，但不限于此。仅出于说明和讨论的目的，任意地对每个电子组件进行了编号。在图3中，插入件10在相邻电子组件之间。每个电子组件具有与有源焊盘12电接触从而形成电连接的一个外部端子32，以及与机械焊盘20接触并粘附到该机械焊盘20从而形成机械连接的一个外部端子。在图3中，有源焊盘表示为位于衬底的两侧的导电焊盘，有源焊盘通过形成电连接的过孔而电连接。外部端子优选地通过互连件34接合到焊盘，如将在本文中的别处讨论的，互连件34例如为导电粘合剂、焊料、聚合物焊料、TLPS接合件、烧结金属互连件、扩散焊料、或直接铜接合件。相邻插入件的有源焊盘和机械焊盘交替设置，从而提供了在电子组件1的外部端子321处任意开始并以电子组件4的外部端子328结束的电子路径。因此，四个电子组件串联连接。虽然四个电子组件的数量足以说明本发明，但是应当理解，本发明可以从两个组件扩展到任何数量的电子组件，并且可以实现各种变化。优选地，组件的数量为至少两个至不超过100个。
将参考图4描述本发明的实施例，其中以示意性侧视图示出了高密度多组件封装件30。在图4中，为了讨论的目的示出了四个电子组件，但不限于此。仅出于说明和讨论的目的，任意地对每个电子组件进行了编号。在图4中，HTCA 310和HTIA 311在相邻电子组件的相邻外部端子之间。每个电子组件具有一个外部端子32，该外部端子32通过HTCA 310与相邻外部端子电接触，或者通过HTIA 311用电绝缘接合物理地附接，该HTIA 311优选地在相邻外部端子之间。HTCA形成电连接，HTIA形成机械连接。在图4中，电子路径被形成为：任意地开始于电子组件1的外部端子321处并结束于电子组件4的外部端子328。因此，四个电子组件都串联连接。虽然四个电子组件的数量足以说明本发明，但是应当理解，本发明可以从两个组件扩展到任何数量的电子组件，并且可以实现各种变化。优选地，组件的数量为至少两个至不超过100个。
将参考图5和图6描述本发明的实施例，其中以示意性侧视图说明垂直安装到衬底36的高密度多组件封装件。衬底36上的有源电路迹线38与外部端子321和328功能性地电连接。外部端子321通过互连件42直接附接到有源电路迹线381，该互连件可以与外部端子和插入件之间的互连件相同，或者可以不同。连接器44与外部端子328以及源迹线382电接触，其中有源迹线38对装置的电子电路而言是不可或缺的。连接器可以是诸如电线或跳线的电连接，并且另外不提供另外的功能，或者连接器可以是诸如电气组件的功能性连接。特别优选的连接器包括电阻器、熔断器、电感器或柔性电路。机械焊盘40提供机械稳定性，并通过互连件42直接附接到外部端子322。
将参考图7、图8和图9描述本发明的实施例，其中柔性电路被用作连接器。参考图7，以横截面示意图示出的柔性电路连接器144包括柔性衬底160。为了机械坚固性，可选但优选的机械焊盘20提供了与外部端子(如图9的326)的机械连接。一对导电焊盘18与过孔14电连接，过孔14与迹线146电接触。一导电焊盘与外部端子325电接触，并且一导电焊盘与电路迹线382电接触。
将参考图10和图11描述本发明的实施例，其中以示意性俯视图说明水平安装到电路板36的高密度多组件封装件。在图10和图11中，每个外部端子32附接到电路板的迹线，其中外部端子321和328分别附接到与电路迹线46电接触的有源迹线381和382，并且其余的外部端子优选通过未示出的互连件经由焊料焊盘43附接到机械焊盘40。在图10和图11中，电子组件都是串联连接的。在图11中，HTIA 311是可选的，因为电子组件被机械地固定到电路板。HTIA仍是优选的，因为它提供机械稳定性，并因此允许在板安装过程之前且独立于板安装过程地制造电子组件的堆叠件。这也便于在板组装之前进行部件测试。
将参考图12和图13描述本发明的实施例，其中以示意性俯视图说明安装到衬底36的高密度多组件封装件。在图12中，电子组件1和4如关于图10和图11所示和所述的那样安装。电子组件2和3具有在它们之间直接形成电连接的互连件34或HTCA 310，因此电子组件2和3电并联。图14中示出了一般的电气示意图，其中电子组件2和3在串联连接的电子组件1和4之间电并联。图15中提供了电气示意图，其中电气组件1是电感器，电气组件2和3是MLCC，且电气组件4是熔断器，从而提供了熔断电感器电容器(fused inductor capacitor)高密度组件。
将参考图16A和图16B描述本发明的实施例，其中示出了插入件50。在图16A中，插入件包括机械焊盘20，其不与衬底16上的与其相对的机械焊盘电接触。在图16B中，机械焊盘20是衬底16的表面上的迹线的电隔离的部分。如将从进一步的讨论中认识到的，图16A和图16B中所示的插入件不具有有源焊盘，并且在本文中将被称为机械插入件。
将参考图17、图18、图19和图20描述本发明的实施例，其中在图17和图19中的俯视示意图以及图18和图20中的侧面示意图中示出了装置的电子电路的一部分。为了讨论的目的，一系列焊盘58被顺序编号。连接相邻焊盘的迹线54由电连接的焊盘指定。迹线是可以包括用于连接的焊盘的电路径。例如，迹线5423提供焊盘582和583之间的导电性。机械插入件50或HTIA 311在相邻电子组件之间，其中焊盘581和588通过迹线56向电路提供连接性。在外部端子处与电气组件2和3并联地电安装的辅助电气组件5提供串联和并联电连接的组合，并且组件5不增加电路板36的由封装件111占据的表面积。辅助电气组件是在所述堆叠件外围但与所述堆叠件电连接的电气组件。虽然用五个电气组件来说明，但是电气组件的数量和布置在此不受限制。
图21中提供了图17、图18、图19和图20中所示的封装件的代表性电路图，其中电子组件1、2、3和4电串联连接，电子组件5与组件2和3电并联。图22中说明示例性实施例，其中电子组件1为电感器，电子组件2和3为MLCC，电子组件5为电阻器且电子组件4为熔断器。
将参考图23和图24描述本发明的实施例，其中以局部横截面示意图说明安装到衬底36的高密度多组件封装件。在图23和图24中，电子组件在平行的相邻堆叠件中，其中辅助电子组件P跨越电子组件N和M。电子组件P可以是在被桥接的那些组件之间提供功能性的附加电子组件，或者电子组件P可以提供如由电跳线、导线或导电箔提供的导电性。在一个实施例中，电子组件P可以是插入件或柔性电路，该插入件或柔性电路具有两个有源焊盘和位于这两个有源焊盘之间的用于有源焊盘之间的电连接性的迹线。如图所示，但不限于此，焊盘62是与未示出的电路迹线电通信的有源焊盘，而焊盘60是不以其它方式电连接到电路的机械焊盘。可以包括包覆成型件(over-molding)64，以防止表面电弧，以形成对湿气渗透的屏障或便于机械放置。
在本发明的另一实施例中，通过增加与电路板的有源连接的数量，可以在高密度组件封装件中实现电滤波器。Pi、T和LC滤波器广泛用于馈通或表面安装配置中，但是希望继续小型化这些封装件并提供高密度表面可安装解决方案。图25和图26中示出了Pi滤波器封装件的示例，其中电子组件2是电感器，电子组件1和3是MLCC。电感器的输入和输出通过MLCC连接到接地迹线51，从而提供Pi滤波器，其中图27示出电气示意图。图25和图26中仅示出了有源电路迹线，并且可以添加其它非有源焊盘用于机械接合以增加机械稳定性。图28中示出了“LC”滤波器的电子示意图，图29中示出了“T”滤波器。
在待附接的组件具有面向下的端子的情况下，可以使用具有重新定向过孔的有源插入件70，如图30所示，其中导电焊盘18通过过孔14电连接到导电焊盘72。当如图31或图32所示使用时，通过到重新定向过孔的连接，面向下的端子中的一个连接到电路，另一个连接到下一个组件76的一个端子，以形成串联连接。必要时，每个焊盘74独立地表示机械焊盘或导电焊盘，从而允许电子组件的设计的灵活性和高密度多组件封装件的功能性。
将参考图33和图34描述本发明的实施例。在图33和图34中，示出了多个组件1至8，其中，在一个平面中的相邻组件(例如，组件1和2或3和4或5和6或7和8)通过使用机械焊盘20或HTCA 310的公共电附接而串联连接。通过机械焊盘20或通过HTIA 311提供到相邻平行电子组件(如，2和3)的机械连接。相邻组件通过有源焊盘18或通过HTCA 310而跨过有源插入件10电接触，有源焊盘18通过过孔14跨过插入件连接。通过提供多个焊盘以及有源焊盘、机械焊盘、HTCA或HTIA的组合，可以在有限的空间中提供组件的多种布置。
将参考图35和图36描述本发明的实施例。
在图35中，多个插入件提供形成串联和并联电连接的灵活性。堆叠件中的组件之间的堆叠件内(Intrastack)插入件210(其可独立地为有源插入件或机械插入件)允许串联电连接，如本文中所讨论的。优选地为有源插入件的堆叠件间(interstack)插入件211在组件的相邻堆叠件S1和S2之间提供导电性，其中为了说明的目的，堆叠件S1包括组件1、2和3，堆叠件S2包括组件4、5和6。为了说明的目的，堆叠件间插入件具有通过在相邻的组件3和6以及相邻的组件2和5之间的过孔14电接触的有源焊盘18，从而提供具有电串联的两组组件2至5和3至6的封装件，其中每组与组件1和4电串联，如图36中示意性地表示的。在图35中，封装件与电路板36上的有源电路迹线38电接触，电路板36具有针对机械支撑而提供的机械焊盘40。替代地，例如，机械焊盘401可以是有源电路，从而允许使用堆叠件的一部分(例如仅组件1)，其中，组件1的功能性在该图示中在迹线381和401之间被隔离。
图35和图36中所示的实施例允许测试封装件内的各个组件。
在图36中，HTCA 310和HTIA 311的组合提供形成串联和并联电连接的灵活性。堆叠件间HTCA 310提供组件的相邻堆叠件S1和S2之间的导电性，为了说明的目的，堆叠件S1包括组件1、2和3，堆叠件S2包括组件4、5和6。为了说明的目的，相邻组件3和6以及相邻组件2和5提供具有电串联的两组组件2至5和3至6的封装件，其中，每组与组件1和4电串联，如图37示意性所示。在图36中，封装件与电路板36上的有源电路迹线38电接触，电路板36具有针对机械支撑而提供的机械焊盘40。替代地，例如，机械焊盘401可以是有源电路，从而允许使用堆叠件的一部分(例如仅组件1)，其中，组件1的功能性在该图示中在迹线381和401之间被隔离。这允许测试封装件内的各个组件。
将参考图38、图39和图40描述本发明的实施例，其中提供了允许多端子组件通过单独的焊盘连接到电路的封装件。在图38、图39和图40中，示出了三个组件，但并不限于此。在图38中，有源插入件在相邻组件之间，并且每个组件的每个外部端子与电路迹线电接触。在图40中，提供了一种封装件，其允许通过使用HTCA 310和HTIA 311将多端子组件连接到电路。在图40中，示出了三个组件，但并不限于此，HTCA在相邻组件之间，并且每个组件的每个外部端子与电路迹线电接触。根据封装件的期望的功能性，一些电路迹线151可以是有源的，而一些可以是机械的。作为示例，迹线151A、151C和151B可用于提供图41的示意图，当组件1和3是电感器而组件2是电容器时，图41的示意图可提供图29的T滤波器。替代地，迹线151A、151B和151E可用于提供图42的示意图，当组件1为电感器且组件2为电容器时，图42的示意图可提供图28的LC或L滤波器。通过使用HTCA和HTIA的交替布置或利用插入件的等效结构，电路迹线151A、151B、151C和151F可用于提供图43的示意图，如果组件1和3是电容器而组件2是电感器，则图43的示意图可提供图27的Pi滤波器。单个封装件可以提供多个功能。可以理解，组件的数量可以相当大，因此功能性可以是基本上无限制的。
将参考图44描述本发明的实施例。在图44中，以示意性截面图示出了功能插入件200，其中功能插入件包括功能焊盘300，其中至少一个组件1电接触功能焊盘并且在功能焊盘之间。通过迹线304电接触的导电焊盘302提供到附加组件2至4的电连接性，而不限制数量。功能焊盘和导电焊盘各自与有源迹线38电接触。封装件可被包装在包覆成型件64中。
图45中以示意性横截面图示出了本发明的实施例。在图45中，示出了两个电子组件，应当理解，这两个电子组件可以是电子组件的堆叠件的一部分。在图45中，外部端子321和322通过HTCA 310处于电接触，如本文别处所述。外部端子323和324不处于电接触，而是在其间具有间隔件9，其中间隔件可以是气隙或非导电材料，其中非导电材料可以是HTIA。为了稳定性的目的，优选不导电的辅助粘合剂112粘合相邻电子组件的主体。粘合剂可以与一个电子组件的一个外部端子和相邻电子组件的主体接触。为了本发明的目的，辅助粘合剂是与至少一个电子组件的至少一个主体机械接触的粘合剂，并且可以以其他方式与第二电子组件的主体、第二电子组件的外部端子或焊料焊盘机械接触。
图46中以示意性侧视图说明本发明的实施例，其中示出垂直于衬底36安装由1至8表示(不限于此)的电子组件的两个堆叠件。提供一种间隔件17，其用作相邻电子组件的相邻外部端子之间的绝缘体。可以理解，如图46所示的堆叠件可以如图11所示水平安装，并且可以采用HTCA 310、HTIA 311和间隔件17的交替布置，从而允许如本文别处所述的串联和并联电连接的组合。
图47中以示意性侧视图示出了本发明的实施例。在图47中，HTIA 311在相邻电子组件之间，从而允许堆叠件的电子组件的串联连接。相邻外部端子通过HTCA 310处于电连接，如本文别处所述。如将认识到的，如图47所示的堆叠件可如图35所示水平安装，且可采用HTCA和HTIA的交替布置，其中进一步包括间隔件，从而允许如本文别处所述的串联和并联电连接的组合。
为了讨论的目的，在图48和48A中示意性地示出了被表示为Pi滤波器的本发明的实施例，其适于滤除不想要的电干扰。一对电子组件1和2(优选为电容器)通过电感器串联连接，该电感器包括具有至少一层电感材料31的导体19，以及可选的电绝缘材料10。更优选地，导体在每侧上具有电感材料。互连件12可以是有源插入件的一部分，其向电子组件提供导电性。可以是插入件的可选电绝缘材料优选地形成电感器的外层。在特别优选的实施例中，电感材料是金属薄片复合材料。特别优选的电感材料包括铁、铝和硅中的至少一种的合金，优选地为薄片形式。电感器可以形成为导电箔或引线的夹层结构，从而在电感材料内或周围形成电连接路径。
图50中以局部截面图示出了电感器的实施例，其中电感材料31夹在导体19之间。到相邻导体的电连接性可以通过使用过孔12来实现。图51中以局部截面图示出了电感器的替代实施例，其中相邻层的电感材料偏移，从而允许通过诸如HTCA 310的导电材料的导电性。电感材料和导体的层数没有特别限制，并且可以调节每层电感材料和导体的厚度以获得所需的电感性能。
图49中以示意性截面图示出了具有电磁干扰抑制器的pi滤波器的替代实施例，其中电感器包括如图51所示的偏移层。
本发明的特别的优点是电感的改进。如图10或图11所示，在水平方向上安装的高密度多组件堆叠件的杂散电感随着电子组件和电路板之间的路径长度减小而减小，因此等效串联电感(ESL)也减小。在MLCC的情况下，与水平方向上的2.9nH的ESL相比，可以实现垂直方向上的0.9nH的ESL。等效串联电阻(ESR)也可以被降低，这是特别重要的，因为它与施加AC电压时消耗的功率成正比。这对于MLCC是特别有利的，因为在电子组件的水平取向中，MLCC的内部电极是垂直的，这对于电感是有利的，并且电阻长度降低，从而减小ESR。
每个电子组件优选地独立地选自由跳线、导线、电容器、电阻器、变阻器、电感器、二极管、熔断器、过压放电装置、传感器、开关、静电放电抑制器、电磁干扰抑制器、半导体和集成电路构成的组。二极管可以是发光二极管。更优选地，电子组件选自由电容器、电阻器、变阻器、电感器、二极管、熔断器、过压放电装置、传感器、开关、导线、跳线、电磁干扰抑制器或静电放电抑制器构成的组。优选的是，电容器是MLCC，更优选的是，至少一个电子组件是MLCC。
特别优选的电磁干扰抑制器包括磁粉，优选是经退火的软磁粉。薄片状磁性颗粒是优选的，其中包括铁、铝和硅中的至少一种的合金特别适合于本发明的示范。
电子组件的外部端子在本文没有特别的限制，条件是它们可以通过HTCA或HTIA或通过互连件(如焊料、导电粘合剂、聚合物焊料、TLPS接合件、烧结金属互连件、扩散焊料或直接铜接合件)而被附接到有源或机械焊盘。TLPS是电子组件的外部端子和焊盘之间的优选互连件。外部端子可以是TLPS的一个组件，如本文将更充分描述的，其中TLPS的附加组件插入在要接合的外部端子之间，或者对外部端子要接合的表面而言是不可或缺的。TLPS材料与包含银、锡、金、铜、铂、钯、镍或其组合的表面加工(surface finishes)兼容，作为引线框加工(lead frame finishes)、组件连接或内部电极，以在两个表面之间形成电子导电冶金接合。
瞬态液相烧结(TLPS)粘合剂形成到电子元件的端子，或者将外部端子附接到表面(例如，焊料焊盘或相邻外部端子)，从而用作互连件。TLPS端子具有以下优点：能够适应不同表面加工以及不同长度的电子元件。此外，由于没有焊球形成，电子元件可以堆叠在彼此的顶部，在它们之间仅具有TLPS，并且没有如焊料附接技术进行清洁通常所需的间隙。当电子元件为MLCC时，TLPS可直接与电子组件的内部电极接合，并且可在低温下形成端子。在实施例中，通过使用热压缩工艺可以制备更高密度的端子，从而形成改进的外部引线附接接合。
焊料是在第一次回流之后不经历成分变化的合金。焊料仅具有一个熔点，并且可以被无限次地再熔化。最常见的焊料是60％Sn40％Pb。焊料已经是电子产品中为了提供电子元件和电路板或衬底之间的机械和电互连而选择的材料。焊料非常适合于批量生产组装工艺。焊料的物理性质可以简单地通过改变用于产生焊料合金的金属或比率而改变。当本文提及焊料时，将意味着至少两种金属的合金，其可以在几乎相同的温度下再熔化多次。
瞬态液相烧结(TLPS)接合件可与焊料区别开。TLPS材料在暴露于高温之前是两种或更多种金属或金属合金的混合物，从而区分材料的热历史。TLPS材料在暴露于高温之前表现出低熔点，在暴露于这些温度之后表现出较高熔点。初始熔点是低温金属或两种低温金属的合金的结果。第二熔化温度是当低温金属或合金与高温熔点金属形成新合金从而产生具有较高熔点的金属间化合物时所形成的金属间化合物的熔化温度。TLPS材料在待结合的金属表面之间形成冶金接合。与无锡/铅或无铅(Pb)焊料不同，TLPS粘合剂在它们形成金属间结合时不会扩散。由于高的二次回流温度，TLPS系统的返工非常困难。瞬态液相烧结是用于描述当两种或更多种TLPS相容材料彼此接触并升高到足以熔化低温金属的温度时所得冶金条件的过程给出的术语。为了产生TLPS工艺或互连，这些金属中的至少一种来自具有低熔点的金属族，例如锡(Sn)或铟(In)，并且第二金属来自具有高熔点的金属族，例如铜(Cu)或银(Ag)。当Sn和Cu被放在一起并且温度升高时，Sn和Cu形成CuSn金属间化合物，并且所得的熔点高于具有低熔点的金属的熔点。在In和Ag的情况下，当向In施加足够的热量以使其熔化时，其实际上扩散到Ag中，产生固溶体，该固溶体又具有比In本身更高的熔点。TLPS将用于一般性地提及该工艺和用于在两种或更多种TLPS相容性金属之间产生冶金接合的TLPS相容性材料。TLPS提供电和机械互连件，其可以在相对低的温度(＜300℃)下形成，并且具有＞600℃的二次再熔化温度。这些温度通过TLPS相容性金属的不同组合确定。扩散或烧结的速率是时间温度函数，并且对于金属的不同组合是不同的。结果是固溶体具有新的熔化温度，该新的熔化温度接近高温熔化金属的熔化温度。
TLPS技术特别适合于在两个优选相对平的配合表面之间提供机械和导电冶金接合。通常用于TLPS工艺的金属选自两种金属族。一种由低熔化温度金属组成，例如铟、锡、铅、锑、铋、镉、锌、镓、碲、汞、铊、硒或钋，第二族由高温熔化金属组成，例如银、铜、铝、金、铂、钯、铍、铑、镍、钴、铁和钼，以便产生扩散的固溶体。
非常希望使用无助熔剂工艺来消除结合内的任何潜在的空隙。由于TLPS是基于烧结的工艺，因此接合线是均匀的并且没有空隙。焊料所需的助熔剂被包容(entrapped)在结合中，随后被烧尽而留下空隙。在半导体工业的情况下，特别是在裸芯附接工艺的情况下，这些空隙可能在集成电路(I/C)内产生热点，这可能导致过早故障和可靠性问题。TLPS解决了这个问题，因为TLPS是烧结过程并且不含助熔剂。当两种金属配合(mated)在一起并加热时，较低熔点金属扩散到较高熔点金属中，以在配合的表面区域上形成固溶体。
为了产生实心均匀的接合线，配合的表面必须是平坦且共面的，以确保在整个配合的表面上的紧密接触。配合的表面所需的平面度也限制该技术的应用，因为存在许多不够平坦以产生良好结合的表面。使用膏状的TLPS允许将不平坦的表面结合。更具体地说，使用膏状的TLPS允许两个不规则形状的表面在没有紧密的或连续的接触线的情况下结合。可以将与液体载体材料结合以形成膏的TLPS相容性金属颗粒芯施加在具有混合表面制备技术(如镀覆、烧结厚膜和或镀覆烧结厚膜)的两个非平坦非均匀表面之间，然后加热到具有最低熔点的金属的熔化温度并保持该温度足够长的时间以形成结合。单一金属颗粒芯消除了在膏中对多种金属的需要，从而使得金属的比率不成为问题。也可以通过使用银(具有约960℃高熔点的金属)作为芯颗粒，然后用具有低温金属(如具有157℃熔点的铟)的金属壳涂覆该颗粒来产生单一颗粒。
两步回流也可与瞬态液相烧结工艺一起使用，其中在第一步骤中，根据TLPS合金化工艺中使用的金属，使用5秒至5分钟范围内的相对短的时间周期和180℃至280℃范围内的低温，在低温下形成导电冶金接合。在第二步骤中，部件经受较长持续时间(例如但不限于5分钟至60分钟)的使用200℃至300℃的温度范围的等温老化工艺。形成初始接合所需的较短时间非常适合于自动化工艺。在另一种方法中，可以使用单步工艺，其中TLPS在例如250℃到325℃的温度下持续例如10秒到30秒的持续时间，在外部引线和(一个或多个)电子组件之间形成端子或导电冶金接合。较低温度(例如175℃至210℃)可以使用较长的持续时间，例如10至30分钟。当电子组件本身对温度敏感时，这是特别有用的。
可以施加与助熔剂和溶剂混合以形成膏的铟粉，以在两个试样(coupon)之间产生TLPS冶金接合，所述试样具有铜的基底金属，铜上镀有Ni，然后Ni上镀有约5微米(200μ英寸)的银。样品可以通过以下制备：将铟膏分配到具有上述电镀表面的试样上，然后将两个试样彼此接触放置，并加热到150℃达5秒，接着将温度升高到约320℃达约60秒。这样制备的样品的接合强度可以表现出85至94磅范围内的拉伸重量(等于4177psi的剪切应力)，并且可以实现5至9磅范围内平均为7磅的拉伸剥离重量(pull peel weight)。这些结果与剪切强度约为3000psi且拉伸剥离强度在7至10磅范围内的SnPb焊料的结果相当。一个主要的区别在于，AgIn接合处可以承受超过600℃的二次熔化温度。这些结果表明，用于接合两个镀银试件的In膏即使不强于目前的焊料SnPb焊料，也至少与其相当，而且具有高得多的二次熔化温度，因此产生适用于高温互连应用并且不含铅的材料。TLPS膏或预制件中可以具有惰性填料，以用于两个目的。一个目的是使由于昂贵金属而引起的成本最小化，第二个目的是直接与暴露的内部电极以及电子元件的非端子的端部进行直接的电和冶金接合。特别是当通过用惰性材料或用较低成本的导电材料替换特别是高熔点金属组件的一部分来填充间隙时，可以降低成本。特别优选的用于代替高熔点金属的填料是非金属，例如熔点＞300℃的陶瓷和玻璃或玻璃化转变温度(Tg)＞200℃的高温聚合物。一个示例可以是热固性聚合物，例如聚酰亚胺。用这些非金属之一代替高熔点金属的两个特别的优点是，在TLPS接合形成期间，TLPS的活性低熔点金属不会被扩散消耗。当从具有低熔点的玻璃族中选择时，惰性填料的第二个优点是在TLPS膏或预制件的混合物内的玻璃将与例如MLCC的暴露的陶瓷主体和非端子的暴露的玻璃料产生接合。非金属也可以通过诸如喷涂或电镀的方法用低熔点金属涂覆。
银以及纳米银和纳米铜的烧结金属互连件也可以用于形成互连件。所得到的互连件可以使用低温烧结工艺形成，但是在银960℃的情况下，所形成的接合具有与金属相关的高熔点。然而，这些工艺在分批操作中通常需要长时间的高压，这与CuSn TLPS相比可能限制生产量。而且，纳米尺寸的金属可能是极其昂贵的。
扩散焊接也可用作形成互连件的结合方法。这结合了传统焊接和扩散接合工艺的特征。该工艺依赖于组件上的金属和熔化的焊料的薄层之间的反应，以形成在结合温度下为固体的一个或多个金属间相。由于低熔点材料(例如焊料)与较高熔点金属反应，这也可以在更广义的TLPS定义中考虑。
也可以使用直接铜接合，但是这是主要用于裸芯附接的高温扩散工艺，因此它可能对一些组件有害。
将外部端子粘附到焊料焊盘的方法可以包括涂覆两个配合的表面，一个表面用高熔点金属涂覆，并且该表面的配合表面用低熔点金属涂覆。涂覆工艺可由气相沉积或电镀组成。第二种方法是将由低熔点金属或两种或更多种低熔点金属的合金制成的预制件膜夹在涂覆有高熔点金属的两个平坦表面之间。第三种方法是产生由高熔点金属(例如铜)的颗粒组成的膏，然后将两种合金化的低熔点金属的颗粒加入到清洁待接合的表面并用作金属颗粒的液体成分的两用液体中并混合到该两用液体中，以形成膏混合物。
如果在所述循环时间内两种金属的完全扩散没有完成，并且没有达到最大二次回流温度，则可以对结合进行第二加热处理。在这种情况下，结合或组装可以经受高于低熔点材料的温度，并保持15分钟至2小时的时间。可改变时间和温度以提供由二次组装工艺或最终环境应用要求规定的期望的二次回流温度。在铟/银TLPS的情况下，可以达到超过600℃的二次熔化温度。
除了施加膏以在合适的表面之间形成TLPS合金结合之外，这也可以通过预制件来实现。在其最简单的表现形式中，预制件可以是低温TLPS组件的薄箔。替代地，可以通过浇铸和干燥膏以除去溶剂来生成预制件。所得到的固体预制件可以放置在待接合的表面之间。在这种情况下，可能需要向膏中加入合适的粘合剂以在干燥后增加强度。在所有这些情况下，预制件应该是可延展的，使得它可以符合待接合的表面。
在许多应用中，高孔隙度是可接受的。然而，在苛刻的环境(例如高湿度)中，或在电路板安装过程中，高孔隙率是不期望的，因为水或其他化学品可能渗透穿过接合件，这可能导致接合件失效。因此，本发明的优选实施例是使用热压缩接合工艺在瞬态液相烧结结合件内形成低孔隙率的端子。该方法的附加优点是在单一步骤中在225℃至300℃的范围内的温度下使用15至30秒的低处理时间，使其适于自动化。当使用引线时，在小于30秒的一步(one-step)低温下并且结合热压缩接合，可以产生坚固的结合件，用于将外部引线附接到电子元件的应用。
当使用聚合物焊料时，热压缩接合也是优选的处理方法，因为它有助于在接触表面之间形成高密度冶金接合。热压缩的优点包括相对于二次附接工艺更牢固的结合，并且实现了具有更高强度的附接。0.5至4.5千克/cm2(7.1至64psi)的压缩力，更优选0.6至0.8千克/cm2(8.5至11psi)的压缩力足以说明本文的热压缩教导。约0.63千克/cm2(9psi)是用于说明本教导的特别适合的压力。
非常希望产生具有最小孔隙率的结合件，其表现出以下特性：用于拉伸剥离试验的强机械强度、拉伸和剪切高电导率、150℃至225℃范围内的低初始工艺温度、超过300℃或更高的二次回流温度、在不均匀表面之间进行紧密接触或具有最大为.015英寸的间隙。
HTCA可以是包括单一金属(例如铟)的互连件，其包含在膏中，该膏可用于形成到涂覆有高熔点金属(例如银)的表面的接合。铟扩散到银中允许形成较低温度的瞬态液相，该液相随后反应以实现较高温度的接合。在较低熔点膏中实现高扩散速率对于这种接合形成是关键的。为了在最终的结合中获得所需的性能，例如减少的空隙和均相，可能需要向膏中添加其它金属。然而，保持低熔点材料的高扩散性是关键的。为此，如果除了低熔点金属之外还需要一种或多种金属，则优选在形成膏之前通过涂覆金属粉来引入这些金属。优选将最低熔点金属涂覆到较高熔点金属上以保持活性表面。涂覆还具有以下期望的效果：减小膏的不同金属元素之间的扩散长度，从而与将一种或多种另外的金属粉简单混合到单一金属膏相反，允许更容易地形成优选相。
作为HTCA的导电粘合剂通常是填充有银或金颗粒的交联聚合物，其在特定温度范围(通常为150℃)内固化或交联，以形成与待结合材料的机械接合。它们的导电性通过以下产生：金属颗粒在聚合物基质的范围内彼此紧密接触以形成从一个颗粒到另一个颗粒的导电路径。因为粘合剂本质上是有机的，因此它们具有相对低的温度能力，通常在约150℃至约300℃的范围内。导电环氧树脂一旦固化，就不能被再加工。与TLPS接合不同，暴露于高热或腐蚀性环境中可能分解聚合物接合并氧化金属颗粒，从而降低电性能。互连件的电和机械性能都可能受到损害，导致ESR增加和机械强度降低。
聚合物焊料HTCA可包括基于Pb/Sn合金系统或无铅系统如Sn/Sb的常规焊料系统，其与用作清洁剂的交联聚合物组合。交联聚合物还具有形成交联聚合物接合(例如环氧树脂接合)的能力，其在金属的熔化阶段形成，从而形成焊料合金和机械聚合物接合。聚合物焊料的优点在于，聚合物接合在高于焊料熔点的温度下提供额外的机械接合强度，从而给予焊料结合在高于焊料熔点约5℃至80℃范围内的较高操作温度。聚合物焊料将当前焊料合金与交联聚合物在同一膏内结合，以在固化时(例如通过加热)提供冶金接合和机械接合，从而在高温下提供额外的焊料结合强度。然而，仅仅通过材料的物理性能，已经提高了温度上限和结合强度。300℃的实际极限得以保持，而通过TLPS产生的接合可以实现更高的温度。
高温绝缘粘合剂可以是热或湿固性(thermal or moisture set)粘合剂、UV固化粘合剂或压敏粘合剂。特别优选的高温绝缘粘合剂包括环氧树脂、酚醛树脂、酚醛三聚氰胺甲醛树脂、酚醛氯丁橡胶、间苯二酚甲醛、聚酯、聚酰亚胺、氰基丙烯酸酯、丙烯画、苯乙烯嵌段共聚物、苯乙烯丁二烯共聚物、聚芳撑(polyarylene)、聚氨酯、聚硫化物、聚酰胺、硅酮和蜡等。可以选择HTIA以与HTCA同时形成接合，或者在一些情况下，可以优选地提供单独的接合工艺。HTIA接合工艺可通过压力、加热、UV固化、湿固化或热熔沉积来实现。另外，HTIA可以包含足够尺寸和介电性质的惰性填料，以确保电路/堆叠件设计和使用条件所需的相邻组件之间的最小介电间隔。
用于插入件的构造的材料在此不受特别限制，其中标准印刷电路板(PCB)材料适合使用。层压材料、纤维增强树脂、陶瓷填充树脂、特殊材料和柔性衬底是特别合适的。阻燃(FR)层压材料特别适合作为插入件材料，尤其是FR-1、FR-2、FR-3、FR-4、FR-5或FR-6。FR-2是酚醛纸、酚醛棉纸或用酚醛树脂浸渍的纸。FR-4是特别优选的，其是用环氧树脂浸渍的织造玻璃纤维布。复合环氧材料(CEM)是合适的，特别是CEM-1、CEM-2、CEM-3、CEM-4或CEM-5，它们各自包含增强材料，如棉纸、无纺玻璃或在环氧树脂中的纺织玻璃。玻璃衬底(G)被广泛使用，例如G-5、G-7、G-9、G-10、G-11等，其中最优选的是G-10和G-11，它们中的每一种是在环氧树脂中的纺织玻璃。聚四氟乙烯(PTFE)可以是陶瓷填充的或者是例如RF-35中的玻璃纤维增强的，其是特别合适的衬底。电子级陶瓷材料(如聚醚醚酮(PEEK)、氧化铝、或钇稳定氧化锆(yttria stabilized zirconia))是可以获得的，96％ Al2O3和99.6％ Al2O3是可以容易地商购的。双马来酰亚胺三嗪(BT)环氧树脂是特别合适的衬底材料。柔性衬底通常是聚酰亚胺，例如从Kapton或UPILEX购得的聚酰亚胺箔，或者从Pyralux购得的聚酰亚胺含氟聚合物复合物。也使用铁合金，例如合金42、殷钢(Invar)、科瓦铁镍钴合金(Kovar)，或者非铁材料，例如Cu、磷青铜或BeCu。
封装件或封装件的部分可通过非导电聚合物或树脂包覆成型。用于包覆成型的材料在此不受特别限制。可以进行包覆成型以将封装件或其中的组件与电路的其他元件的电交互隔离，或者保护封装件或其中的组件不受环境变化的影响。包覆成型对于标记和用于拾取和放置设备也是有益的，因为包覆成型可以以光学或机械设备可识别的特定几何形状来施加。另外，利用通过现有组装方法附接到封装件的商业上可获得的电连接，可以将封装件机械地封装在壳体、外壳或其它组装件中，以用作电路或组装件中的插头。
已经参照优选实施例描述了本发明，但本发明不限于此。可以实现本文没有具体阐述的其它实施例和改进，但是它们在如在所附权利要求中更具体阐述的本发明的范围内。

Claims (108)

1.一种高密度多组件封装件，包括：
至少两个电子组件，所述至少两个电子组件堆叠在彼此的顶部上，其中所述电子组件中的每个电子组件包括第一外部端子和第二外部端子；
在相邻电子组件之间的至少一个插入件，其中所述相邻电子组件通过互连件附接到所述插入件，所述插入件选自有源插入件和机械插入件；
至少一个电连接，其在相邻电子组件的相邻第一外部端子之间；
至少一个机械连接，其在所述相邻电子组件的相邻第二外部端子之间；以及
其中所述至少两个相邻电子组件串联连接，
其中所述有源插入件包括在相对面上的机械焊盘和有源焊盘，每个所述相邻电子组件的第一外部端子通过所述有源焊盘电连接，每个所述相邻电子组件的第二外部端子独立地机械连接到所述机械焊盘中的一个机械焊盘，
其中所述机械插入件包括在相对面上的机械焊盘，每个所述相邻电子组件的外部端子独立地机械连接到所述机械焊盘中的一个机械焊盘。
2.根据权利要求1所述的高密度多组件封装件，其中，所述电连接还包括第一粘合剂，且所述机械连接包括第二粘合剂。
3.根据权利要求2所述的高密度多组件封装件，其中，所述第一粘合剂和所述第二粘合剂独立地选自高温导电粘合剂和高温绝缘粘合剂。
4.根据权利要求3所述的高密度多组件封装件，其中，所述第二粘合剂是所述高温绝缘粘合剂，并且所述第二粘合剂在相邻第二外部端子之间。
5.根据权利要求3所述的高密度多组件封装件，其中，所述高温绝缘粘合剂选自环氧树脂、酚醛树脂、酚醛三聚氰胺甲醛树脂、酚醛氯丁橡胶、间苯二酚甲醛、聚酯、聚酰亚胺、氰基丙烯酸酯、丙烯画、苯乙烯嵌段共聚物、苯乙烯丁二烯共聚物、聚芳撑、聚氨酯、聚硫化物、聚酰胺、硅酮和蜡。
6.根据权利要求1所述的高密度多组件封装件，其中，所述有源插入件还包括衬底，每个有源焊盘与所述衬底的相对侧上的对应有源焊盘电接触，每个机械焊盘不与所述衬底的相对侧上的对应机械焊盘电接触，其中对于所述相邻电子组件中的至少一个，第一外部端子通过所述衬底上彼此相对的两个有源焊盘中的一个电连接，第二外部端子接触并粘附至所述衬底上的彼此相对的两个机械焊盘中的一个，但是不与所述两个机械焊盘中的另一个电连接。
7.根据权利要求1所述的高密度多组件封装件，其中，所述机械插入件还包括衬底，并且不具有有源焊盘。
8.根据权利要求7所述的高密度多组件封装件，其中，连接至所述机械插入件的相邻电子组件通过以下电连接：连接至一个电子组件的第一外部端子和第二外部端子中的一个的第一焊盘，连接至另一电子组件的第一外部端子和第二外部端子中的一个的第二焊盘，以及连接所述第一焊盘和所述第二焊盘的迹线。
9.根据权利要求1所述的高密度多组件封装件，包括多个插入件。
10.根据权利要求9所述的高密度多组件封装件，其中，所述多个插入件中的每个插入件是有源插入件。
11.根据权利要求9所述的高密度多组件封装件，其中，所述多个插入件中的每个插入件是机械插入件。
12.根据权利要求9所述的高密度多组件封装件，包括至少一个所述有源插入件和至少一个所述机械插入件。
13.根据权利要求1所述的高密度多组件封装件，其中，所述互连件选自由焊料、导电粘合剂、聚合物焊料和瞬态液相烧结粘合剂构成的组。
14.根据权利要求13所述的高密度多组件封装件，其中，所述瞬态液相烧结粘合剂包括高熔点金属和低熔点金属。
15.根据权利要求14所述的高密度多组件封装件，其中，所述低熔点金属选自由铟、锡、铅、锑、铋、镉、锌、镓、碲、汞、铊、硒或钋构成的组。
16.根据权利要求14所述的高密度多组件封装件，其中，所述高熔点金属选自由银、铜、铝、金、铂、钯、铍、铑、镍、钴、铁和钼构成的组。
17.根据权利要求14所述的高密度多组件封装件，其中，所述瞬态液相烧结粘合剂包括锡和铜或铟和银。
18.根据权利要求1所述的高密度多组件封装件，其中，所述插入件包括至少三个焊盘。
19.根据权利要求1所述的高密度多组件封装件，其中，至少一个所述外部端子包括从由银、锡、金、铜、铂、钯和镍构成的组中选择的金属。
20.根据权利要求1所述的高密度多组件封装件，还包括在相邻第二外部端子之间的间隔件。
21.根据权利要求20所述的高密度多组件封装件，其中，所述间隔件选自气隙和非导电材料。
22.根据权利要求1所述的高密度多组件封装件，还包括辅助粘合剂。
23.根据权利要求1所述的高密度多组件封装件，其中，每个所述电子组件独立地选自由跳线、导线、电容器、电阻器、变阻器、电感器、二极管、熔断器、过压放电装置、传感器、开关、静电放电抑制器、电磁干扰抑制器、半导体和集成电路构成的组。
24.根据权利要求23所述的高密度多组件封装件，其中，所述电容器是MLCC。
25.根据权利要求23所述的高密度多组件封装件，其中，所述电子组件选自由MLCC、电阻器、变阻器、电感器、二极管、熔断器、过压放电装置、电磁干扰抑制器、传感器、开关和静电放电抑制器构成的组。
26.根据权利要求25所述的高密度多组件封装件，其中，至少一个所述电子组件是MLCC。
27.根据权利要求25所述的高密度多组件封装件，其中，所述二极管是发光二极管。
28.根据权利要求1所述的高密度多组件封装件，其中，所有电子组件串联连接。
29.根据权利要求1所述的高密度多组件封装件，其中，至少两个附加电子组件并联电连接。
30.根据权利要求1所述的高密度多组件封装件，其中，所述组件中的至少一个组件通过互连件直接附接到相邻组件。
31.根据权利要求30所述的高密度多组件封装件，其中，所述互连件是导电的。
32.根据权利要求1所述的高密度多组件封装件，其中，所述电子组件形成至少一个堆叠件。
33.根据权利要求32所述的高密度多组件封装件，还包括辅助电气组件。
34.根据权利要求33所述的高密度多组件封装件，包括至少两个堆叠件，其中，所述辅助电气组件跨越所述堆叠件。
35.根据权利要求33所述的高密度多组件封装件，其中，所述辅助电气组件与至少两个所述电子组件电并联。
36.根据权利要求35所述的高密度多组件封装件，其中，所述辅助电气组件选自辅助有源插入件和辅助机械插入件。
37.根据权利要求1所述的高密度多组件封装件，其选自由Pi滤波器、T滤波器和LC滤波器构成的组。
38.根据权利要求1所述的高密度多组件封装件，包括至少三个端子。
39.根据权利要求1所述的高密度多组件封装件，还包括衬底。
40.根据权利要求39所述的高密度多组件封装件，其中，所述衬底包括至少两个电路迹线。
41.根据权利要求40所述的高密度多组件封装件，其中，所述衬底包括至少三个电路迹线。
42.根据权利要求1所述的高密度多组件封装件，其中，所述电子组件形成至少两个堆叠件。
43.根据权利要求42所述的高密度多组件封装件，还包括堆叠件间插入件。
44.根据权利要求43所述的高密度多组件封装件，其中，所述堆叠件间插入件是有源插入件。
45.根据权利要求1所述的高密度多组件封装件，进一步地，其中，至少一个所述插入件是堆叠件内插入件。
46.根据权利要求1所述的高密度多组件封装件，还包括柔性电路。
47.根据权利要求1所述的高密度多组件封装件，还包括包覆成型件。
48.根据权利要求1所述的高密度多组件封装件，其中，所述插入件是功能插入件。
49.根据权利要求1所述的高密度多组件封装件，其中，至少一个所述外部端子包括从由银、锡、金、铜、铂、钯和镍构成的组中选择的金属。
50.一种电子电路，包括：
根据权利要求1所述的高密度多组件封装件；
以及
电路板，其包括迹线，其中所述迹线中的至少一个迹线是有源迹线，并且所述迹线中的至少一个迹线是机械焊盘；
其中所述电子组件中的第一电子组件的至少一个第一外部端子与一个所述有源迹线电接触；
其中所述电子组件中的第二电子组件的至少一个第二外部端子与机械焊盘电接触。
51.根据权利要求50所述的电子电路，其中，所述高密度多组件封装件垂直地安装在所述电路板上。
52.根据权利要求51所述的电子电路，还包括在一个所述外部端子和一个所述有源迹线之间的连接器。
53.根据权利要求52所述的电子电路，其中，所述连接器选自由电连接和功能连接构成的组。
54.根据权利要求53所述的电子电路，其中，所述连接器是附加电子组件。
55.根据权利要求50所述的电子电路，其中，所述高密度多组件封装件水平地安装在所述电路板上。
56.根据权利要求55所述的电子电路，还包括电连接相邻外部端子的至少一个迹线。
57.根据权利要求50所述的电子电路，其中，至少三个端子与所述电路板的迹线电接触。
58.根据权利要求50所述的电子电路，其中，所述插入件包括至少三个焊盘。
59.一种用于形成高密度多组件封装件的方法，包括：
提供至少两个电子组件，其中所述电子组件中的每个电子组件包括第一外部端子和第二外部端子；
形成所述电子组件的堆叠件，其中所述电子组件堆叠在彼此的顶部上并且至少一个插入件位于相邻电子组件之间，其中所述相邻电子组件通过互连件附接到所述插入件，所述插入件选自有源插入件和机械插入件；
形成在相邻电子组件的相邻第一外部端子之间的至少一个电连接；
形成在所述相邻电子组件的相邻第二外部端子之间的至少一个机械连接；以及
其中所述相邻电子组件串联连接，
其中所述有源插入件包括在相对面上的机械焊盘和有源焊盘，每个所述相邻电子组件的第一外部端子通过所述有源焊盘电连接，每个所述相邻电子组件的第二外部端子独立地机械连接到所述机械焊盘中的一个机械焊盘，
其中所述机械插入件包括在相对面上的机械焊盘，每个所述相邻电子组件的外部端子独立地机械连接到所述机械焊盘中的一个机械焊盘。
60.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述电连接还包括第一粘合剂，且所述机械连接包括第二粘合剂。
61.根据权利要求60所述的用于形成高密度多组件封装件的方法，其中，所述第一粘合剂和所述第二粘合剂独立地选自高温导电粘合剂和高温绝缘粘合剂。
62.根据权利要求61所述的用于形成高密度多组件封装件的方法，其中，所述第二粘合剂是所述高温绝缘粘合剂，并且所述第二粘合剂在相邻第二外部端子之间。
63.根据权利要求61所述的用于形成高密度多组件封装件的方法，其中，所述高温绝缘粘合剂选自环氧树脂、酚醛树脂、酚醛三聚氰胺甲醛树脂、酚醛氯丁橡胶、间苯二酚甲醛、聚酯、聚酰亚胺、氰基丙烯酸酯、丙烯画、苯乙烯嵌段共聚物、苯乙烯丁二烯共聚物、聚芳撑、聚氨酯、聚硫化物、聚酰胺、硅酮和蜡。
64.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述有源插入件还包括衬底，每个有源焊盘与所述衬底的相对侧上的对应有源焊盘电接触，每个机械焊盘不与所述衬底的相对侧上的对应机械焊盘电接触，其中对于所述相邻电子组件中的至少一个，第一外部端子通过所述衬底上彼此相对的两个有源焊盘中的一个电连接，第二外部端子接触并粘附至所述衬底上的彼此相对的两个机械焊盘中的一个，但是不与所述两个机械焊盘中的另一个电连接。
65.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述机械插入件还包括衬底，并且不具有有源焊盘。
66.根据权利要求59所述的用于形成高密度多组件封装件的方法，还包括形成导电过孔。
67.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述插入件包括空隙，所述空隙包括烧结的金属膏、导电粘合剂或TLPS。
68.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述插入件包括空隙，其中所述附接包括将烧结的金属膏、导电粘合剂或TLPS并入所述空隙中以形成导电过孔。
69.根据权利要求65所述的用于形成高密度多组件封装件的方法，其中，连接至所述机械插入件的相邻电子组件通过以下电连接：连接至一个电子组件的第一外部端子和第二外部端子中的一个的第一焊盘，连接至另一电子组件的第一外部端子和第二外部端子中的一个的第二焊盘，以及连接所述第一焊盘和所述第二焊盘的迹线。
70.根据权利要求59所述的用于形成高密度多组件封装件的方法，包括多个插入件。
71.根据权利要求70所述的用于形成高密度多组件封装件的方法，其中，所述多个插入件中的每个插入件是有源插入件。
72.根据权利要求70所述的用于形成高密度多组件封装件的方法，其中，所述多个插入件中的每个插入件是机械插入件。
73.根据权利要求70所述的用于形成高密度多组件封装件的方法，包括至少一个所述有源插入件和至少一个所述机械插入件。
74.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述互连件选自由焊料、导电粘合剂、聚合物焊料和瞬态液相烧结粘合剂构成的组。
75.根据权利要求74所述的用于形成高密度多组件封装件的方法，其中，所述瞬态液相烧结粘合剂包括高熔点金属和低熔点金属。
76.根据权利要求75所述的用于形成高密度多组件封装件的方法，其中，所述低熔点金属选自由铟、锡、铅、锑、铋、镉、锌、镓、碲、汞、铊、硒或钋构成的组。
77.根据权利要求75所述的用于形成高密度多组件封装件的方法，其中，所述高熔点金属选自由银、铜、铝、金、铂、钯、铍、铑、镍、钴、铁和钼构成的组。
78.根据权利要求75所述的用于形成高密度多组件封装件的方法，其中，所述瞬态液相烧结粘合剂包括锡和铜或铟和银。
79.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述插入件包括至少三个焊盘。
80.根据权利要求59所述的用于形成高密度多组件封装件的方法，还包括在相邻第二外部端子之间的间隔件。
81.根据权利要求80所述的用于形成高密度多组件封装件的方法，其中，所述间隔件选自气隙和非导电材料。
82.根据权利要求59所述的用于形成高密度多组件封装件的方法，还包括辅助粘合剂。
83.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，每个所述电子组件独立地选自由跳线、导线、电容器、电阻器、变阻器、电感器、二极管、熔断器、过压放电装置、传感器、开关、静电放电抑制器、电磁干扰抑制器、半导体和集成电路构成的组。
84.根据权利要求83所述的用于形成高密度多组件封装件的方法，其中，所述电容器是MLCC。
85.根据权利要求84所述的用于形成高密度多组件封装件的方法，其中，所述电子组件选自由跳线、导线、MLCC、电阻器、变阻器、电感器、二极管、熔断器、过压放电装置、传感器、开关电磁干扰抑制器和静电放电抑制器构成的组。
86.根据权利要求85所述的用于形成高密度多组件封装件的方法，其中，至少一个所述电子组件是MLCC。
87.根据权利要求85所述的用于形成高密度多组件封装件的方法，其中，所述二极管是发光二极管。
88.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所有电子组件串联连接。
89.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，至少两个附加电子组件并联电连接。
90.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述组件中的至少一个组件通过互连件直接附接到相邻组件。
91.根据权利要求90所述的用于形成高密度多组件封装件的方法，其中，所述互连件是导电的。
92.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述电子组件形成至少一个堆叠件。
93.根据权利要求92所述的用于形成高密度多组件封装件的方法，还包括辅助电气组件。
94.根据权利要求93所述的用于形成高密度多组件封装件的方法，包括至少两个堆叠件，其中，所述辅助电气组件跨越所述堆叠件。
95.根据权利要求94所述的用于形成高密度多组件封装件的方法，其中，所述辅助电气组件选自辅助有源插入件和辅助机械插入件。
96.根据权利要求93所述的用于形成高密度多组件封装件的方法，其中，所述辅助电气组件与至少两个所述电子组件电并联。
97.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，至少一个所述外部端子包括从由银、锡、金、铜、铂、钯和镍构成的组中选择的金属。
98.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述高密度多组件封装件选自由Pi滤波器、T滤波器和LC滤波器构成的组。
99.根据权利要求59所述的用于形成高密度多组件封装件的方法，还包括衬底。
100.根据权利要求99所述的用于形成高密度多组件封装件的方法，其中，所述衬底包括至少两个电路迹线。
101.根据权利要求100所述的用于形成高密度多组件封装件的方法，其中，所述衬底包括至少三个电路迹线。
102.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述电子组件形成至少两个堆叠件。
103.根据权利要求102所述的用于形成高密度多组件封装件的方法，还包括堆叠件间插入件。
104.根据权利要求103所述的用于形成高密度多组件封装件的方法，其中，所述堆叠件间插入件是有源插入件。
105.根据权利要求59所述的用于形成高密度多组件封装件的方法，进一步地，其中，至少一个所述插入件是堆叠件内插入件。
106.根据权利要求59所述的用于形成高密度多组件封装件的方法，还包括柔性电路。
107.根据权利要求59所述的用于形成高密度多组件封装件的方法，还包括包覆成型件。
108.根据权利要求59所述的用于形成高密度多组件封装件的方法，其中，所述插入件是功能插入件。
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