CN110998783B - 具有双嵌入式电极的基板支撑件 - Google Patents
具有双嵌入式电极的基板支撑件 Download PDFInfo
- Publication number
- CN110998783B CN110998783B CN201880053387.3A CN201880053387A CN110998783B CN 110998783 B CN110998783 B CN 110998783B CN 201880053387 A CN201880053387 A CN 201880053387A CN 110998783 B CN110998783 B CN 110998783B
- Authority
- CN
- China
- Prior art keywords
- electrode
- substrate support
- substrate
- disposed
- dielectric layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 205
- 230000009977 dual effect Effects 0.000 title description 4
- 238000000034 method Methods 0.000 claims abstract description 41
- 239000003989 dielectric material Substances 0.000 claims description 20
- 238000000576 coating method Methods 0.000 claims description 18
- 230000008878 coupling Effects 0.000 claims description 16
- 238000010168 coupling process Methods 0.000 claims description 16
- 238000005859 coupling reaction Methods 0.000 claims description 16
- 239000011248 coating agent Substances 0.000 claims description 14
- 238000001816 cooling Methods 0.000 claims description 14
- 239000004020 conductor Substances 0.000 claims description 13
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 9
- 230000015556 catabolic process Effects 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 abstract description 8
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 41
- 239000007789 gas Substances 0.000 description 17
- 239000002344 surface layer Substances 0.000 description 14
- 150000002500 ions Chemical class 0.000 description 12
- 239000000463 material Substances 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 238000001704 evaporation Methods 0.000 description 6
- 230000008020 evaporation Effects 0.000 description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- 239000000443 aerosol Substances 0.000 description 5
- 238000000231 atomic layer deposition Methods 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 238000009826 distribution Methods 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- -1 e.g. Inorganic materials 0.000 description 3
- 239000012530 fluid Substances 0.000 description 3
- 239000011888 foil Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000002826 coolant Substances 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000005546 reactive sputtering Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 238000009616 inductively coupled plasma Methods 0.000 description 1
- 238000010849 ion bombardment Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000003507 refrigerant Substances 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/3255—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32697—Electrostatic control
- H01J37/32706—Polarising the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67103—Apparatus for thermal treatment mainly by conduction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Analytical Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Drying Of Semiconductors (AREA)
- Plasma Technology (AREA)
Abstract
在本文中描述的实施例总体而言涉及等离子体辅助处理腔室或等离子体增强处理腔室。更具体地,在本文中的实施例涉及被配置为向基板提供脉冲DC电压的静电吸盘(ESC)基板支撑件,和在等离子体辅助半导体制造工艺或等离子体增强半导体制造工艺期间使用脉冲DC电压偏压基板的方法。
Description
背景技术
技术领域
在本文中描述的实施例总体而言涉及用于半导体制造的处理腔室,具体地,涉及具有基板支撑组件的处理腔室以及偏压基板的方法,所述基板支撑组件被配置为偏压设置在其上的基板。
对相关技术的描述
可靠地产生高深宽比特征是半导体器件的下一代超大规模集成电路(VLSI)和极大规模集成电路(ULSI)的关键技术挑战之一。形成高深宽比特征的一种方法使用等离子体辅助蚀刻工艺以在基板的材料层(诸如介电层)中形成高深宽比开口。在典型的等离子体辅助蚀刻工艺中,在处理腔室中形成等离子体,并且来自等离子体的离子朝向基板和在基板上的掩模中形成的开口加速,以在掩模表面下方的材料层中形成开口。通常,通过将400kHz至2MHz的范围中的低频RF功率耦合到基板从而将离子朝向基板加速,从而在基板上产生偏压电压。然而,将RF功率耦合到基板不会相对于等离子体向基板施加单电压。在常用配置中,在基板和等离子体之间的电位差以RF功率的频率从接近零值振荡到最大负值。缺少单电位(所述单电位将离子从等离子体加速到基板)导致在基板表面处和在基板的材料层中形成的开口(特征)中的大范围的离子能量。另外,由RF偏压产生的不同离子轨迹相对于基板表面而产生离子的大角度分布。当蚀刻高深宽比特征的开口时,大范围的离子能量是不期望的,因为离子没有以足够高的能量到达特征的底部,以维持期望的蚀刻速率。相对于基板表面的离子的大角度分布是不期望的,因为其导致特征轮廓的变形,诸如在特征的垂直侧壁中的颈缩和弯曲。
因此,本领域中存在有能够在等离子体辅助蚀刻工艺期间在基板的材料表面处提供具有窄角度分布的窄范围的高能量离子的需求。
发明内容
本公开内容总体而言涉及等离子体辅助处理腔室或等离子体增强处理腔室。更具体地,在本文中的实施例涉及被配置为在等离子体辅助半导体制造工艺或等离子体增强半导体制造工艺期间向基板提供脉冲DC电压的静电吸盘(ESC)基板支撑件以及偏压基板的方法。
在一个实施例中,提供了一种基板支撑组件。基板支撑组件包括基板支撑件,基板支撑件包括:第一介电层,所述第一介电层用于支撑基板,设置在第二介电层上;第一电极,所述第一电极设置在第一介电层和第二介电层之间,用于通过第一介电层的电容而将脉冲DC功率电容耦合至基板;以及第二电极,所述第二电极用于通过在基板和第二电极之间提供电位而将基板电夹持到基板支撑件,其中第二电极与第一电极电隔离。在一个实施例中,偏压电极和ESC电极在基板支撑件中彼此平面地设置。在另一个实施例中,偏压电极比ESC电极更靠近基板支撑表面。在另一实施例中,偏压电极包括:平面部分;多个导电特征,所述多个导电特征在平面部分和基板支撑表面之间;以及多个连接器,所述多个连接器将平面部分电耦合到多个导电特征。偏压电极的平面部分和多个导电特征都经由与其耦合的电容而向基板提供脉冲DC偏压。在这个实施例中,多个连接器比ESC电极更靠近基板支撑表面。
在另一个实施例中,提供了一种用脉冲DC电压偏压基板的方法。所述方法包括以下步骤:使处理气体流到处理腔室中;从处理气体形成等离子体;以及通过在基板和设置在基板支撑件中的第一电极之间提供电位而将基板电夹持到设置在处理腔室中的基板支撑件。在本文中,基板支撑件包括第一介电层和第二介电层。所述方法进一步包括:通过第一介电层的电容而将提供到第二电极的脉冲DC功率电容耦合到基板,其中第二电极的至少一部分设置在第一介电层和第二介电层之间。
在另一个实施例中,提供了一种处理腔室。处理腔室包括界定处理容积的一个或多个侧壁和底部、以及设置在处理容积中的基板支撑组件。基板支撑组件包括:冷却基座,所述冷却基座由导热材料形成;基板支撑件,所述基板支撑件热耦合到冷却基座,基板支撑件包括第一介电材料层和第二介电材料层。基板支撑组件进一步包括:第一电极,所述第一电极设置在第一介电材料层和第二介电材料层之间,用于通过第一介电材料层的电容将脉冲DC功率电容耦合到基板;以及第二电极,所述第二电极用于通过在基板和第二电极之间提供电位而将基板电夹持到基板支撑件。在本文中,第二电极与第一电极电隔离。在一些实施例中,处理腔室进一步包括等离子体产生设备,所述等离子体产生设备包括电耦合到RF功率供应的电容耦合等离子体(CCP)源或电感耦合等离子体(ICP)源。例如,在一个实施例中,等离子体产生设备包括:等离子体电极,所述等离子体电极设置在处理容积中并面向基板支撑件;以及功率导管,所述功率导管配置成将等离子体电极电耦合到RF功率供应。在其他实施例中,等离子体产生设备包括:微波等离子体源(诸如电子回旋共振等离子体(ECR)源或线性微波等离子体源(LPS));和功率导管,所述功率导管配置成将微波等离子体源电耦合到微波功率供应。
附图简单说明
因此,以可以详细地理解本公开内容的上述特征的方式,可通过参考实施例而获得上文简要概述的本公开内容的更具体的描述,其中一些实施例显示在附图中。然而,应注意附图仅显示了本公开内容的典型实施例,且因此不应被视为限制本公开内容的范围,因为本公开内容可以允许其他同等有效的实施例。
图1是根据一个实施例的处理腔室的示意性剖视图,处理腔室具有设置于所述处理腔室中的双嵌入式电极的静电吸盘(ESC)基板支撑件。
图2A是在图1中所示的处理腔室中使用的基板支撑组件的一部分的特写剖视图。
图2B是根据一个实施例的基板支撑组件的俯视剖视图。
图2C是根据另一个实施例的基板支撑组件的俯视图。
图3A是根据另一个实施例的基板支撑组件的一部分的特写剖视图。
图3B示出了图3A中所示的偏压电极的一部分。
图3C是根据另一个实施例的基板支撑组件的俯视图。
图4是说明根据在本文中所述的实施例的在等离子体辅助工艺期间偏压基板的方法的流程图。
具体实施方式
在本文中描述的实施例总体而言涉及等离子体辅助处理腔室或等离子体增强处理腔室。更具体地,在本文中的实施例涉及被配置为向基板提供脉冲DC电压的静电吸盘(ESC)基板支撑件,以及在等离子体辅助半导体制造工艺或等离子体增强半导体制造工艺期间使用脉冲DC电压偏压基板的方法。将基板电容耦合到脉冲DC电源(在基板上放置脉冲DC偏压)增加了在基板与处理腔室中形成的等离子体之间的电位差,从而将离子从等离子体加速朝向基板的活性表面。
图1是根据一个实施例的处理腔室100的示意性剖视图,处理腔室100具有设置在处理腔室100中的双嵌入式电极的静电吸盘(ESC)基板支撑组件205。在此实施例中,处理腔室100是等离子体处理腔室,诸如等离子体蚀刻腔室、等离子体增强沉积腔室(例如等离子体增强化学气相沉积(PECVD)腔室或等离子体增强原子层沉积(PEALD)腔室)、等离子体处理腔室或基于等离子体的离子注入腔室(例如,等离子体掺杂(PLAD)腔室),
处理腔室100的特征在于界定处理容积120的腔室盖103、一个或多个侧壁102和腔室底部104。喷头112(具有设置成通过喷头112的多个开口118)设置在腔室盖103中,并用以将处理气体从气体入口114均匀地分配至处理容积120中。喷头112耦合到RF功率供应142(或在一些实施例中,VHF功率供应),RF功率供应142从处理气体通过与其的电容耦合而点燃等离子体135。处理容积120通过真空出口152而流体耦合到真空源,诸如流体耦合到一个或多个专用真空泵,真空出口152将处理容积120保持在低于大气压的条件下,并且从处理容积120排出处理和其他气体。设置在处理容积120中的基板支撑组件205耦合到支撑轴124,支撑轴124密封地延伸通过腔室底部104。支撑轴124耦合到第一致动器140,第一致动器140升高和降低支撑轴124和设置在支撑轴124上的基板支撑组件205,以促进基板115的处理以及将基板115传送进出处理腔室100。通常,当基板支撑组件205处于升高位置或处理位置时,基板115与喷头112间隔开在约0.2英寸与2.0英寸之间,诸如约1.25英寸。
基板115通过一个或多个侧壁102中的一个中的传送开口126装载到处理容积120中,传送开口126通常在基板115处理期间用门或阀(未示出)来密封。设置在升降销箍134上方的多个升降销136可移动地设置通过基板支撑组件205,以促进将基板115传送往返基板支撑组件205。升降销箍134耦合到升降箍轴131,升降箍轴131密封地延伸通过腔室底部104,升降箍轴131通过第二致动器130升高和降低升降销箍134。当升降销箍134处于升高位置时,多个升降销136在基板支撑组件205的表面上方延伸,从而从基板支撑组件205的表面升降基板115并能够通过机器人处理器接近基板115。当升降销箍134处于降低位置时,多个升降销136与基板支撑组件205的表面齐平或在基板支撑组件205的表面下方,并且基板115直接安置在基板支撑表面203上以进行处理。
在本文中的基板支撑组件205包括冷却基座125和热耦合到冷却基座125并且设置在冷却基座125上的基板支撑件200。在本文中的基板支撑组件205的冷却基座125用以在处理期间调节基板支撑件200的温度,并由此调节设置在基板支撑表面203上的基板115的温度。在本文中,冷却基座125包括设置在冷却基座125中的一个或多个流体管道137,所述一个或多个流体管道137流体耦合到冷却剂源133(诸如制冷剂源或水源),并与冷却剂源133流体连通。通常,冷却基座125由耐腐蚀的导热材料形成,诸如耐腐蚀金属,例如铝、铝合金或不锈钢,并通过粘附剂或通过机械方式来热耦合到基板支撑件200。
在处理期间,基板115的离子轰击将加热基板115。处理容积120的低压导致在基板115和基板支撑表面203之间的不良热传导。因此,在本文中的实施例中,在处理期间,背侧气体被提供到在基板115和基板支撑表面203的凹陷部分之间的间隙229,其中背侧气体将基板115热耦合到基板支撑表面203并增加其之间的热传递。通常,基板支撑表面203包括从基板支撑表面203延伸的多个突起228,当基板115设置在基板支撑表面203上时,多个突起228能够使背侧气体流到在基板115和基板支撑表面203之间的间隙229中。背侧气体通过一个或多个气体导管147而流到基板支撑表面203和在设置在基板支撑表面203的凹陷部分与设置在基板支撑表面203上的基板115之间的间隙229,一个或多个气体导管147通过基板支撑件200设置。在本文中,一个或多个气体导管147耦合到导热惰性背侧气体源146,诸如氦气源。
图2A是处理腔室100中使用的基板支撑组件205的一部分的特写剖视图。图2B是根据一个实施例的嵌入基板支撑组件205的介电材料的电极的俯视剖视图。多个升降销136未在图2B中示出。图2C是根据另一实施例的基板支撑件200的俯视图。基板支撑件200包括第一层200A和第二层200B,其中每个层200A和200B由包括金属氧化物或金属氮化物的介电材料,或包括金属氧化物或金属氮化物的混合物的介电材料(诸如Al2O3、AlN、Y2O3或其组合)所形成。在一个实施例中,第一层200A由具有在160μm下的击穿电压为9kV的99.5%的氧化铝形成。在本文中,通过将大块的介电材料接合到第二层200B以及设置在第二层200B中或第二层200B上的多个电极,并将大块的介电材料研磨到期望的厚度T1,从而形成第一层200A以形成基板支撑件200。通常,第一层200A具有在约100μm和约300μm之间的厚度T1,例如约160μm。在其他实施例中,使用任何合适的涂覆方法(诸如CVD、PECVD、ALD、PEALD、蒸发、溅射、反应性蒸发、反应性溅射、等离子体弧涂覆、气溶胶涂覆或其组合)来形成第一层200A。
多个电极包括:第一电极222(偏压电极),用于将基板115电容耦合到第一电源156;和第二电极238,用于将基板115电夹持到基板支撑件200。电极222和238中的每一个由一个或多个导电材料部分(诸如金属网、箔、板或其组合)形成。在一些实施例中,第一电极222由多于一个不连续导电材料部分(诸如多个金属网、箔、板或其组合)形成,所述多于一个不连续导电材料部分与一个或多个连接器电耦合,使得不连续材料部分包括单电极。在一些实施例中,第二电极238由多于一个不连续导电材料部分形成,所述多于一个不连续导电材料部分与一个或多个连接器电耦合以包括单电极。在本文中的实施例中,通过沉积导电层,同时或顺序地形成电极222和238;沉积方法包括CVD、PECVD、ALD、PEALD、蒸发、溅射、等离子体弧涂覆、气溶胶涂覆、电镀或其组合或任何合适的涂布方法。在图2A和图2B中,第一电极222和第二电极238平面地设置在基板支撑件200的第二层200B的介电材料上或嵌入基板支撑件200的第二层200B的介电材料中。在图2B中,第一电极和第二电极布置在交叉结构中。第一电极222包括在距基板支撑件200的中心的多个半径处的多个方位角部分222A和与多个方位角部分222A接触的多个径向部分222B。在本文中,径向部分222B具有相同长度,并且多个方位角部分222A围绕基板支撑件200的中心同心地设置。在其他实施例中,第一电极222可具有方位角部分222A和/或径向部分222B的长度和/或布置的任何组合。在图2B中,第一电极222由单个材料部分或多个电耦合材料部分形成。第二电极238包括整体网,并通过形成在整体网中的开口和设置在第二电极238与第一电极222之间的第二层200B的介电材料而与第一电极222电隔离。通常,第二电极238的表面积与第一电极222的表面积的比例大于约80:10,诸如大于约90:10,或例如约90:10。在其他实施例中,第一电极222或第一电极222的一部分比第二电极238更靠近基板支撑表面203。
图2C是根据另一实施例的基板支撑组件205的俯视图。在图2C中,第一电极222设置在第二电极(未示出)和基板支撑件200的表面之间的平面中。第一电极222包括整体材料部分,整体材料部分具有多个方位角部分222A,多个方位角部分222A连接到多个径向部分222B中的零个或者一个或多个。
在本文中,第一电源156向第一电极222以在约10Hz和约100kHZ(诸如在约500Hz和约50kHZ)之间的频率而提供在约0kV和约10kV之间的高电压(HV)脉冲DC功率。脉冲DC功率经由基板支撑件200的第一层200A的电容而电容耦合到基板。第二电极238(通过在基板115和基板支撑表面203之间提供电位而在基板115和基板支撑表面203之间提供夹持力)电耦合到第二电源158,在本文中是静态DC功率供应,其提供在约-5000V和约5000V之间。
图3A是根据另一实施例的基板支撑组件305的一部分的特写剖视图。图3B示出了图3A中所示的第一电极335(偏压电极)的一部分。基板支撑组件305包括冷却基座125和热耦合到冷却基座125并设置在冷却基座125上的基板支撑件300。基板支撑件300包括设置在基板支撑件300中的多个电极、子表面层300B和设置在子表面层300B上的表面层300A。多个电极包括:第一电极335(偏压电极),用于将基板115电容耦合到第一电源156;和第二电极338,用于利用第二电源158将基板115电夹持到基板支撑件300。
表面层300A包括在子表面层300B之上形成的介电涂层(诸如Al2O3、AlN、Y2O3或其组合)和设置在子表面层300B上的多个导电特征342。第一电极335包括平面部分322、设置在平面部分322和表面层300A之间的多个导电特征342、以及将平面部分322电耦合到多个导电特征342的多个连接器340。第二电极338与第一电极335电隔离,并且与第一电极335的平面部分322平面设置。在本文中,第一电极335的平面部分322和第二电极338各自由一个或多个导电材料部分形成,诸如金属网、箔、板、或其组合。在一些实施例中,通过沉积导电层,同时或顺序地形成电极和电极322、338和342的部分;沉积方法包括CVD、PECVD、ALD、PEALD、蒸发、溅射、等离子体弧涂覆、气溶胶涂覆、电镀或其组合、或任何合适的涂覆方法。第一电极335的平面部分322由连续的导电材料形成,而第二电极338由多于一个不连续导电材料部分形成,所述多于一个不连续导电材料部分通过一个或多个电连接器彼此电耦合。在其他实施例中,第一电极335的平面部分322和第二电极338各自由连续的导电材料部分形成,并通过其结构的交叉而彼此电隔离,诸如第图2B中所示的交叉结构。在其他实施例中,第二电极338由连续的导电材料形成,且第一电极335的平面部分322由多于一个不连续导电材料部分形成,所述多于一个不连续导电材料部分通过一个或多个电连接器彼此电耦合。在其他实施例中,第一电极335的平面部分322比第二电极338更靠近基板支撑表面303。在一些实施例中,第一电极335的平面部分322与基板支撑表面303通过平面部分322与基板支撑表面303之间的一个或多个介电层间隔开,一个或多个介电层具有在约100μm和约300μm之间(诸如约160μm)的组合厚度。
多个导电特征342和多个连接器340由导电材料(诸如金属)形成。例如,在一个实施例中,多个导电特征342由使用物理气相沉积(PVD)方法沉积的钛形成,并具有在约5μm和约15μm之间(诸如约10μm)的厚度,且多个连接器340由铝形成。在本文中,多个导电特征342与基板支撑表面303通过表面层300A的涂层厚度T2而间隔开。
通常,子表面层300B和/或表面层300A包括介电材料且各自由金属氧化物或金属氮化物,或包括金属氧化物或金属氮化物的混合物(诸如Al2O3、AlN、Y2O3或其组合)的介电材料形成。使用任何合适的涂覆方法(诸如CVD、PECVD、ALD、PEALD、蒸发、溅射、反应性蒸发、反应性溅射、等离子体弧涂覆、气溶胶涂覆或其组合)来沉积表面层300A的介电涂层。表面层300A的涂层厚度T2在约2μm和约200μm之间,诸如在约5μm和约100μm之间。在一些实施例中,表面层300A通过气溶胶涂覆子表面层300B和设置在子表面层300B上的多个导电特征342形成,其中Al2O3具有约10μm、约30μm或约100μm的涂层厚度T2。在一些实施例中,表面层300A的介电材料具有在约100V/μm与约200V/μm之间的击穿电压。
图3C是根据另一实施例的基板支撑组件的俯视图。在图3C中,第一电极335的平面部分322设置在第二电极(未示出)和基板支撑件300的表面之间的平面中。在本文中的平面部分322包括具有多个方位角部分322A的整体材料部分,每个方位角部分322A包括连接到延伸至其半径和/或通过其半径的多个径向部分322B的环。
图4是示出根据在本文中描述的实施例的在等离子体辅助工艺期间偏压基板的方法400的流程图。在410处的方法400包括使处理气体流到处理腔室中,且在420处包括从处理气体形成等离子体。
430处的方法400包括将基板电夹持到设置在处理腔室中的基板支撑件,诸如图2A至图2B中描述的基板支撑件200或图3A至图3B中描述的基板支撑件300。将基板电夹持到基板支撑件包括在基板和设置在基板支撑件中的静电吸盘(ESC)电极之间提供电位。通常,ESC耦合到DC功率供应,DC功率供应在此提供在约-5000V和约+5000V之间(诸如在约500V和约4500V之间,诸如在约1000V和约3000V之间,例如约2500V)。
440处的方法400包括通过经由基板支撑件的第一介电层的电容将脉冲DC功率(从脉冲DC功率供应提供给偏压电极)电容耦合到基板来偏压基板。在一些实施例中,在活动420处将处理气体流到处理腔室中和/或在活动430处从处理气体形成等离子体之前或同时偏压基板。在本文中,偏压电极或偏压电极的一部分是与在基板支撑件的第一介电层和第二介电层之间的ESC电极平面地设置的。通常,脉冲DC功率供应以在约10Hz和约100kHZ之间的频率向偏压电极提供在约0kV至约10kV之间的高压(HV)脉冲DC功率。在其他实施例中,偏压电极或偏压电极的一部分比ESC电极更靠近基板支撑表面。应当注意,等离子体也可在操作420之后、操作430之后或者操作440之后形成。
在本文中所述的基板支撑组件和方法在与使用静电夹持力兼容的等离子体辅助工艺期间实现了电容耦合脉冲DC偏压基板。脉冲DC偏压允许增加对基板表面处和基板表面中形成的特征开口中的离子能量和角度分布的控制。这种增加的控制至少在形成高深宽比特征和/或需要平直的蚀刻轮廓的特征时是期望的,诸如在用于存储器装置(诸如非易失性闪存装置和动态随机存取存储器装置)的介电材料中的高深宽比蚀刻;诸如在用于浅沟槽隔离(STI)应用的硅蚀刻中;以及诸如在FinFET装置中使用的硅鳍片。
虽然前述内容针对本公开内容的实施例,但可在不背离本公开内容的基本范围的情况下设计本公开内容的其他和进一步的实施例,并且本公开内容的范围由以下的权利要求而确定。
Claims (13)
1.一种基板支撑组件,包括:
基板支撑件,包括:
第一介电层,所述第一介电层用于支撑基板,所述第一介电层设置在第二介电层上;
第一电极,所述第一电极设置在所述第一介电层和所述第二介电层之间,用于通过所述第一介电层的电容来将脉冲DC功率电容耦合至所述基板;以及
第二电极,所述第二电极用于通过在所述基板和所述第二电极之间提供电位从而将所述基板电夹持到所述基板支撑件,其中所述第二电极与所述第一电极电隔离,
其中所述第一电极包括:平面部分;多个导电特征,所述多个导电特征设置在所述平面部分与基板支撑表面之间;以及多个连接器,所述多个连接器将所述平面部分电耦合到所述多个导电特征,
其中所述平面部分包括多个径向部分和围绕所述基板支撑件的中心同心地设置的多个方位角部分,并且其中所述多个径向部分中的每一个径向部分接触多于一个方位角部分。
2.如权利要求1所述的基板支撑组件,其中所述第一电极和所述第二电极具有交叉结构。
3.如权利要求1所述的基板支撑组件,其中所述第一电极的至少一部分比所述第二电极更靠近基板支撑表面。
4.如权利要求1所述的基板支撑组件,其中所述第一电极的第一表面积与所述第二电极的第二表面积的比例小于80比10。
5.如权利要求4所述的基板支撑组件,其中所述第一介电层设置在所述第一电极的至少一部分与基板支撑表面之间,并且具有在2 μm与200 μm之间的厚度。
6.如权利要求1所述的基板支撑组件,其中所述第一介电层包括形成在所述第二介电层之上的介电涂层,并且所述多个导电特征设置在所述第二介电层上。
7.如权利要求1所述的基板支撑组件,其中所述第一介电层具有在5 μm与200 μm之间的厚度。
8.如权利要求1所述的基板支撑组件,其中所述第一介电层具有在100 V/μm与200 V/μm之间的击穿电压。
9.一种处理腔室,包括:
一个或多个侧壁和底部,所述一个或多个侧壁和所述底部界定处理容积;以及
基板支撑组件,所述基板支撑组件设置在所述处理容积中,包括:
冷却基座,所述冷却基座由导热材料形成;
基板支撑件,所述基板支撑件热耦合到所述冷却基座,所述基板支撑件包括第一介电材料层和第二介电材料层;
第一电极,所述第一电极设置在所述第一介电材料层和所述第二介电材料层之间,用于通过所述第一介电材料层的电容将脉冲DC功率电容耦合到基板;以及
第二电极,所述第二电极用于通过在所述基板和所述第二电极之间提供电位而将所述基板电夹持到所述基板支撑件,其中所述第二电极与所述第一电极电隔离,
其中所述第一电极包括:平面部分;多个导电特征,所述多个导电特征设置在所述平面部分与基板支撑表面之间;以及多个连接器,所述多个连接器将所述平面部分电耦合到所述多个导电特征,
其中所述平面部分包括多个径向部分和围绕所述基板支撑件的中心同心地设置的多个方位角部分,并且其中所述多个径向部分中的每一个径向部分接触多于一个方位角部分。
10.如权利要求9所述的处理腔室,其中所述第一电极和所述第二电极的至少一部分平面地设置。
11.如权利要求9所述的处理腔室,其中所述第一电极的至少一部分比所述第二电极更靠近基板支撑表面。
12.一种处理基板的方法,包括:
使处理气体流到处理腔室中;
从所述处理气体形成等离子体;
通过在基板和设置在基板支撑件中的第一电极之间提供电位而将所述基板电夹持到设置在处理腔室中的所述基板支撑件,所述基板支撑件包括第一介电层和第二介电层,
其中所述第一电极包括:平面部分;多个导电特征,所述多个导电特征设置在所述平面部分与基板支撑表面之间;以及多个连接器,所述多个连接器将所述平面部分电耦合到所述多个导电特征,
其中所述平面部分包括多个径向部分和围绕所述基板支撑件的中心同心地设置的多个方位角部分,并且其中所述多个径向部分中的每一个径向部分接触多于一个方位角部分;以及
经由所述第一介电层的电容而将提供给第二电极的脉冲DC功率电容耦合到所述基板,其中所述第二电极的至少一部分设置在所述第一介电层和所述第二介电层之间。
13.如权利要求12所述的方法,其中所述第一电极和所述第二电极彼此平面设置,并且其中所述第一电极的第一表面积与所述第二电极的第二表面积的比例大于80比10。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/710,700 | 2017-09-20 | ||
US15/710,700 US10811296B2 (en) | 2017-09-20 | 2017-09-20 | Substrate support with dual embedded electrodes |
PCT/US2018/042961 WO2019060029A1 (en) | 2017-09-20 | 2018-07-19 | SUBSTRATE SUPPORT WITH DOUBLE INTEGRATED ELECTRODES |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110998783A CN110998783A (zh) | 2020-04-10 |
CN110998783B true CN110998783B (zh) | 2022-11-22 |
Family
ID=65720602
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201880053387.3A Active CN110998783B (zh) | 2017-09-20 | 2018-07-19 | 具有双嵌入式电极的基板支撑件 |
Country Status (6)
Country | Link |
---|---|
US (1) | US10811296B2 (zh) |
JP (1) | JP6967656B2 (zh) |
KR (1) | KR102343829B1 (zh) |
CN (1) | CN110998783B (zh) |
TW (1) | TWI736785B (zh) |
WO (1) | WO2019060029A1 (zh) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11532497B2 (en) * | 2016-06-07 | 2022-12-20 | Applied Materials, Inc. | High power electrostatic chuck design with radio frequency coupling |
WO2019143474A1 (en) * | 2018-01-18 | 2019-07-25 | Applied Materials, Inc. | Etching apparatus and methods |
US10555412B2 (en) | 2018-05-10 | 2020-02-04 | Applied Materials, Inc. | Method of controlling ion energy distribution using a pulse generator with a current-return output stage |
US11476145B2 (en) | 2018-11-20 | 2022-10-18 | Applied Materials, Inc. | Automatic ESC bias compensation when using pulsed DC bias |
JP7451540B2 (ja) | 2019-01-22 | 2024-03-18 | アプライド マテリアルズ インコーポレイテッド | パルス状電圧波形を制御するためのフィードバックループ |
US11508554B2 (en) | 2019-01-24 | 2022-11-22 | Applied Materials, Inc. | High voltage filter assembly |
CN111524782B (zh) * | 2019-02-05 | 2023-07-25 | 东京毅力科创株式会社 | 等离子体处理装置 |
TW202119538A (zh) * | 2019-09-19 | 2021-05-16 | 美商應用材料股份有限公司 | 用於清潔基座加熱器的原位dc電漿 |
US11043387B2 (en) | 2019-10-30 | 2021-06-22 | Applied Materials, Inc. | Methods and apparatus for processing a substrate |
US11462389B2 (en) | 2020-07-31 | 2022-10-04 | Applied Materials, Inc. | Pulsed-voltage hardware assembly for use in a plasma processing system |
US11798790B2 (en) | 2020-11-16 | 2023-10-24 | Applied Materials, Inc. | Apparatus and methods for controlling ion energy distribution |
US11901157B2 (en) | 2020-11-16 | 2024-02-13 | Applied Materials, Inc. | Apparatus and methods for controlling ion energy distribution |
US11495470B1 (en) | 2021-04-16 | 2022-11-08 | Applied Materials, Inc. | Method of enhancing etching selectivity using a pulsed plasma |
US11791138B2 (en) | 2021-05-12 | 2023-10-17 | Applied Materials, Inc. | Automatic electrostatic chuck bias compensation during plasma processing |
US11948780B2 (en) | 2021-05-12 | 2024-04-02 | Applied Materials, Inc. | Automatic electrostatic chuck bias compensation during plasma processing |
US11967483B2 (en) | 2021-06-02 | 2024-04-23 | Applied Materials, Inc. | Plasma excitation with ion energy control |
US20220399185A1 (en) | 2021-06-09 | 2022-12-15 | Applied Materials, Inc. | Plasma chamber and chamber component cleaning methods |
US11810760B2 (en) | 2021-06-16 | 2023-11-07 | Applied Materials, Inc. | Apparatus and method of ion current compensation |
US11569066B2 (en) | 2021-06-23 | 2023-01-31 | Applied Materials, Inc. | Pulsed voltage source for plasma processing applications |
US11776788B2 (en) | 2021-06-28 | 2023-10-03 | Applied Materials, Inc. | Pulsed voltage boost for substrate processing |
US11476090B1 (en) | 2021-08-24 | 2022-10-18 | Applied Materials, Inc. | Voltage pulse time-domain multiplexing |
KR20210153003A (ko) | 2021-11-29 | 2021-12-16 | 김고은 | 내비형 모빌리티 도난 방지기 |
US11694876B2 (en) | 2021-12-08 | 2023-07-04 | Applied Materials, Inc. | Apparatus and method for delivering a plurality of waveform signals during plasma processing |
US11972924B2 (en) | 2022-06-08 | 2024-04-30 | Applied Materials, Inc. | Pulsed voltage source for plasma processing applications |
Family Cites Families (66)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4340462A (en) | 1981-02-13 | 1982-07-20 | Lam Research Corporation | Adjustable electrode plasma processing chamber |
US6253704B1 (en) | 1995-10-13 | 2001-07-03 | Mattson Technology, Inc. | Apparatus and method for pulsed plasma processing of a semiconductor substrate |
US5770023A (en) | 1996-02-12 | 1998-06-23 | Eni A Division Of Astec America, Inc. | Etch process employing asymmetric bipolar pulsed DC |
JPH09252047A (ja) * | 1996-03-18 | 1997-09-22 | Hitachi Ltd | 静電吸着電極 |
US5751537A (en) * | 1996-05-02 | 1998-05-12 | Applied Materials, Inc. | Multielectrode electrostatic chuck with fuses |
US6051114A (en) | 1997-06-23 | 2000-04-18 | Applied Materials, Inc. | Use of pulsed-DC wafer bias for filling vias/trenches with metal in HDP physical vapor deposition |
US6187685B1 (en) | 1997-08-01 | 2001-02-13 | Surface Technology Systems Limited | Method and apparatus for etching a substrate |
US6273958B2 (en) * | 1999-06-09 | 2001-08-14 | Applied Materials, Inc. | Substrate support for plasma processing |
US6201208B1 (en) | 1999-11-04 | 2001-03-13 | Wisconsin Alumni Research Foundation | Method and apparatus for plasma processing with control of ion energy distribution at the substrates |
WO2001052302A1 (en) | 2000-01-10 | 2001-07-19 | Tokyo Electron Limited | Segmented electrode assembly and method for plasma processing |
EP1211725A4 (en) * | 2000-05-10 | 2003-02-26 | Ibiden Co Ltd | ELECTROSTATIC CHUCK |
US20040066601A1 (en) * | 2002-10-04 | 2004-04-08 | Varian Semiconductor Equipment Associates, Inc. | Electrode configuration for retaining cooling gas on electrostatic wafer clamp |
US7126808B2 (en) | 2003-04-01 | 2006-10-24 | Varian Semiconductor Equipment Associates, Inc. | Wafer platen equipped with electrostatic clamp, wafer backside gas cooling, and high voltage operation capability for plasma doping |
US7988816B2 (en) | 2004-06-21 | 2011-08-02 | Tokyo Electron Limited | Plasma processing apparatus and method |
US7601246B2 (en) | 2004-09-29 | 2009-10-13 | Lam Research Corporation | Methods of sputtering a protective coating on a semiconductor substrate |
US7872292B2 (en) | 2006-02-21 | 2011-01-18 | United Microelectronics Corp. | Capacitance dielectric layer and capacitor |
JP2008041993A (ja) * | 2006-08-08 | 2008-02-21 | Shinko Electric Ind Co Ltd | 静電チャック |
EP1912266A1 (en) | 2006-10-10 | 2008-04-16 | STMicroelectronics S.r.l. | Method of forming phase change memory devices in a pulsed DC deposition chamber |
EP2102889B1 (en) | 2006-12-12 | 2020-10-07 | Evatec AG | Rf substrate bias with high power impulse magnetron sputtering (hipims) |
US8422193B2 (en) | 2006-12-19 | 2013-04-16 | Axcelis Technologies, Inc. | Annulus clamping and backside gas cooled electrostatic chuck |
US7718538B2 (en) | 2007-02-21 | 2010-05-18 | Applied Materials, Inc. | Pulsed-plasma system with pulsed sample bias for etching semiconductor substrates |
KR100855002B1 (ko) | 2007-05-23 | 2008-08-28 | 삼성전자주식회사 | 플라즈마 이온 주입시스템 |
JP5018244B2 (ja) | 2007-05-30 | 2012-09-05 | 住友大阪セメント株式会社 | 静電チャック |
US20090004836A1 (en) | 2007-06-29 | 2009-01-01 | Varian Semiconductor Equipment Associates, Inc. | Plasma doping with enhanced charge neutralization |
KR20090024866A (ko) | 2007-09-05 | 2009-03-10 | 주식회사 코미코 | 기판 지지유닛 및 이를 갖는 기판 가공 장치 |
US8133359B2 (en) | 2007-11-16 | 2012-03-13 | Advanced Energy Industries, Inc. | Methods and apparatus for sputtering deposition using direct current |
US8609546B2 (en) | 2007-11-29 | 2013-12-17 | Lam Research Corporation | Pulsed bias plasma process to control microloading |
TWI390582B (zh) * | 2008-07-16 | 2013-03-21 | Sumitomo Heavy Industries | Plasma processing device and plasma processing method |
JP5295833B2 (ja) | 2008-09-24 | 2013-09-18 | 株式会社東芝 | 基板処理装置および基板処理方法 |
US8383001B2 (en) | 2009-02-20 | 2013-02-26 | Tokyo Electron Limited | Plasma etching method, plasma etching apparatus and storage medium |
US8382999B2 (en) | 2009-03-26 | 2013-02-26 | Applied Materials, Inc. | Pulsed plasma high aspect ratio dielectric process |
US8404598B2 (en) * | 2009-08-07 | 2013-03-26 | Applied Materials, Inc. | Synchronized radio frequency pulsing for plasma etching |
JP5960384B2 (ja) * | 2009-10-26 | 2016-08-02 | 新光電気工業株式会社 | 静電チャック用基板及び静電チャック |
US20120000421A1 (en) | 2010-07-02 | 2012-01-05 | Varian Semicondutor Equipment Associates, Inc. | Control apparatus for plasma immersion ion implantation of a dielectric substrate |
US8828883B2 (en) | 2010-08-24 | 2014-09-09 | Micron Technology, Inc. | Methods and apparatuses for energetic neutral flux generation for processing a substrate |
US20120088371A1 (en) | 2010-10-07 | 2012-04-12 | Applied Materials, Inc. | Methods for etching substrates using pulsed dc voltage |
US8757603B2 (en) * | 2010-10-22 | 2014-06-24 | Applied Materials, Inc. | Low force substrate lift |
US8916056B2 (en) | 2012-10-11 | 2014-12-23 | Varian Semiconductor Equipment Associates, Inc. | Biasing system for a plasma processing apparatus |
US10049948B2 (en) | 2012-11-30 | 2018-08-14 | Lam Research Corporation | Power switching system for ESC with array of thermal control elements |
US8941969B2 (en) * | 2012-12-21 | 2015-01-27 | Applied Materials, Inc. | Single-body electrostatic chuck |
KR102064914B1 (ko) | 2013-03-06 | 2020-01-10 | 삼성전자주식회사 | 식각 공정 장치 및 식각 공정 방법 |
KR20150128965A (ko) | 2013-03-13 | 2015-11-18 | 어플라이드 머티어리얼스, 인코포레이티드 | 구리를 위한 uv-보조 반응성 이온 에칭 |
US20140271097A1 (en) * | 2013-03-15 | 2014-09-18 | Applied Materials, Inc. | Processing systems and methods for halide scavenging |
US20140263182A1 (en) | 2013-03-15 | 2014-09-18 | Tokyo Electron Limited | Dc pulse etcher |
KR20180110213A (ko) | 2013-08-06 | 2018-10-08 | 어플라이드 머티어리얼스, 인코포레이티드 | 국부적으로 가열되는 다-구역 기판 지지부 |
JP6024921B2 (ja) * | 2013-11-01 | 2016-11-16 | パナソニックIpマネジメント株式会社 | プラズマ処理装置及びプラズマ処理方法 |
US9853579B2 (en) * | 2013-12-18 | 2017-12-26 | Applied Materials, Inc. | Rotatable heated electrostatic chuck |
US9101038B2 (en) | 2013-12-20 | 2015-08-04 | Lam Research Corporation | Electrostatic chuck including declamping electrode and method of declamping |
KR102222902B1 (ko) | 2014-05-12 | 2021-03-05 | 삼성전자주식회사 | 플라즈마 장비 및 이를 이용한 반도체 소자의 제조 방법 |
US20170263478A1 (en) | 2015-01-16 | 2017-09-14 | Lam Research Corporation | Detection System for Tunable/Replaceable Edge Coupling Ring |
US10163610B2 (en) | 2015-07-13 | 2018-12-25 | Lam Research Corporation | Extreme edge sheath and wafer profile tuning through edge-localized ion trajectory control and plasma operation |
US9761459B2 (en) | 2015-08-05 | 2017-09-12 | Lam Research Corporation | Systems and methods for reverse pulsing |
US9620376B2 (en) | 2015-08-19 | 2017-04-11 | Lam Research Corporation | Self limiting lateral atomic layer etch |
US9984858B2 (en) | 2015-09-04 | 2018-05-29 | Lam Research Corporation | ALE smoothness: in and outside semiconductor industry |
US10192751B2 (en) | 2015-10-15 | 2019-01-29 | Lam Research Corporation | Systems and methods for ultrahigh selective nitride etch |
US10062599B2 (en) | 2015-10-22 | 2018-08-28 | Lam Research Corporation | Automated replacement of consumable parts using interfacing chambers |
US10124492B2 (en) | 2015-10-22 | 2018-11-13 | Lam Research Corporation | Automated replacement of consumable parts using end effectors interfacing with plasma processing system |
US9881820B2 (en) | 2015-10-22 | 2018-01-30 | Lam Research Corporation | Front opening ring pod |
US20170115657A1 (en) | 2015-10-22 | 2017-04-27 | Lam Research Corporation | Systems for Removing and Replacing Consumable Parts from a Semiconductor Process Module in Situ |
US9601319B1 (en) | 2016-01-07 | 2017-03-21 | Lam Research Corporation | Systems and methods for eliminating flourine residue in a substrate processing chamber using a plasma-based process |
US10699878B2 (en) | 2016-02-12 | 2020-06-30 | Lam Research Corporation | Chamber member of a plasma source and pedestal with radially outward positioned lift pins for translation of a substrate c-ring |
US10651015B2 (en) | 2016-02-12 | 2020-05-12 | Lam Research Corporation | Variable depth edge ring for etch uniformity control |
US10438833B2 (en) | 2016-02-16 | 2019-10-08 | Lam Research Corporation | Wafer lift ring system for wafer transfer |
US9966231B2 (en) | 2016-02-29 | 2018-05-08 | Lam Research Corporation | Direct current pulsing plasma systems |
US10269566B2 (en) | 2016-04-29 | 2019-04-23 | Lam Research Corporation | Etching substrates using ale and selective deposition |
US9852889B1 (en) | 2016-06-22 | 2017-12-26 | Lam Research Corporation | Systems and methods for controlling directionality of ions in an edge region by using an electrode within a coupling ring |
-
2017
- 2017-09-20 US US15/710,700 patent/US10811296B2/en active Active
-
2018
- 2018-07-19 WO PCT/US2018/042961 patent/WO2019060029A1/en active Application Filing
- 2018-07-19 JP JP2020502960A patent/JP6967656B2/ja active Active
- 2018-07-19 CN CN201880053387.3A patent/CN110998783B/zh active Active
- 2018-07-19 KR KR1020207007494A patent/KR102343829B1/ko active IP Right Grant
- 2018-07-25 TW TW107125605A patent/TWI736785B/zh active
Also Published As
Publication number | Publication date |
---|---|
JP6967656B2 (ja) | 2021-11-17 |
KR102343829B1 (ko) | 2021-12-24 |
US20190088519A1 (en) | 2019-03-21 |
CN110998783A (zh) | 2020-04-10 |
TWI736785B (zh) | 2021-08-21 |
JP2020534667A (ja) | 2020-11-26 |
TW201933424A (zh) | 2019-08-16 |
US10811296B2 (en) | 2020-10-20 |
WO2019060029A1 (en) | 2019-03-28 |
KR20200030642A (ko) | 2020-03-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110998783B (zh) | 具有双嵌入式电极的基板支撑件 | |
US10937678B2 (en) | Substrate support with multiple embedded electrodes | |
TWI771470B (zh) | 具有電浮電源供應的基板支撐件 | |
JP7425160B2 (ja) | 周期的かつ選択的な材料の除去及びエッチングのための処理チャンバ | |
US20190088518A1 (en) | Substrate support with cooled and conducting pins |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |