CN110993570A - Wafer level packaging structure and packaging method - Google Patents
Wafer level packaging structure and packaging method Download PDFInfo
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- CN110993570A CN110993570A CN201911326314.XA CN201911326314A CN110993570A CN 110993570 A CN110993570 A CN 110993570A CN 201911326314 A CN201911326314 A CN 201911326314A CN 110993570 A CN110993570 A CN 110993570A
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/02535—Details of surface acoustic wave devices
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Acoustics & Sound (AREA)
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
The embodiment of the invention discloses a wafer level packaging structure and a packaging method, wherein the structure comprises the following components: a filter wafer having a plurality of functional regions and a plurality of electrodes; the cofferdam is arranged corresponding to the functional area and surrounds the functional area, and the vertical projection of the cofferdam on the working surface is partially overlapped with the electrode; the cover plates are in one-to-one correspondence with the cofferdams, and the outer edges of the vertical projections of the cover plates on the working surface are positioned between the inner edges and the outer edges of the vertical projections of the cofferdams on the working surface; a first insulating layer covering the cover plate and the cofferdam, wherein the vertical projection of the first insulating layer on the working surface is partially overlapped with the electrode; metal wiring lines which are arranged on the first insulating layer and are electrically connected with the electrodes in a one-to-one correspondence manner; a second insulating layer covering the metal wiring and the first insulating layer, the second insulating layer having a plurality of openings corresponding to the metal wiring one by one and exposing a part of the metal wiring; and a metal solder ball filling the opening and electrically connected to the metal wiring. The packaging structure improves the yield of the filter chip, and has lower cost and simple process.
Description
Technical Field
The embodiment of the invention relates to the field of semiconductors, in particular to a wafer level packaging structure and a packaging method.
Background
The wafer level package has advantages of smaller package size and better electrical performance, and can be widely applied in the semiconductor field, for example, the wafer level package process is used to package the saw filter wafer.
The existing wafer-level packaging process for the surface acoustic wave filter mostly adopts the whole packaging cover plate to package the filter wafer integrally, because the Coefficient of Thermal Expansion (CTE) of the cover plate material (generally silicon, glass) and the filter wafer material is far away, the warpage is difficult to control in the processing process, the wafer is easy to break, and the packaging failure or yield loss is caused. In addition, the existing packaging process usually adopts a gold-gold flip-chip welding process to form a cavity between the working surface of the filter and the cover plate, so that the cost is high, and the process is complex.
Disclosure of Invention
The embodiment of the invention provides a wafer level packaging structure and a packaging method, which are used for improving the packaging yield and saving the cost.
An embodiment of the present invention provides a wafer level package structure, including:
the working surface of the filter wafer comprises a plurality of functional areas, each functional area is correspondingly provided with a plurality of electrodes, and the plurality of electrodes are symmetrically distributed on the periphery of the functional area;
a plurality of cofferdams, wherein one cofferdam is arranged corresponding to one functional area, is arranged on the working surface of the filter wafer and surrounds the functional area, and the vertical projection of the cofferdam on the working surface is partially overlapped with the electrode;
the cover plates correspond to the cofferdams one by one, and the outer edges of the vertical projections of the cover plates on the working surface are positioned between the inner edges and the outer edges of the vertical projections of the cofferdams on the working surface;
the first insulating layer covers the side walls of the cover plate and the cofferdam, which are vertical to the working surface, and the surface of the cover plate, which is far away from the working surface, and the vertical projection of the first insulating layer on the working surface is partially overlapped with the electrode;
a plurality of metal wirings corresponding to the electrodes one by one, the metal wirings being disposed on the first insulating layer and electrically connected to the electrodes;
the second insulating layer covers the metal wiring and the first insulating layer, and is provided with a plurality of openings which correspond to the metal wiring one by one and expose part of the metal wiring;
and the metal solder balls fill the openings and are electrically connected with the metal wiring.
Furthermore, the composition material of the cofferdam comprises a high molecular photosensitive rubber material, and the thickness h1 of the cofferdam along the direction vertical to the working surface meets the requirement that the thickness h1 is less than or equal to 5 mu m and less than or equal to 100 mu m.
Further, the material of the cover plate comprises silicon, glass, lithium tantalate or lithium niobate, and the thickness h2 of the cover plate along the direction vertical to the working surface meets the requirement that the thickness h2 is more than or equal to 30 mu m and less than or equal to 400 mu m.
Further, the cover plate is rectangular in shape along a first cross-sectional plane perpendicular to the working surface.
Further, the cover plate is in a regular trapezoid shape along a first cross section perpendicular to the working surface.
Further, the material of the first insulating layer includes a photosensitive organic insulating material, and a thickness h3 of the first insulating layer in a direction perpendicular to the working face satisfies 5 μm. ltoreq. h 3. ltoreq.50 μm.
Further, the material of the metal wiring includes at least one of titanium, copper, aluminum, nickel, palladium, a titanium alloy, a copper alloy, an aluminum alloy, a nickel alloy, and a palladium alloy, and a thickness h4 of the metal wiring in a direction perpendicular to the working face satisfies 2 μm or more and h4 or more and 20 μm or less.
Further, the constituent material of the second insulating layer includes a photosensitive polymer, and a thickness h5 of the second insulating layer in a direction perpendicular to the working face satisfies 5 μm h5 m 50 μm.
Furthermore, the metal solder ball is a finished solder ball, and the thickness h6 of the metal solder ball along the direction vertical to the working surface meets the requirement that h6 is more than or equal to 30 mu m.
Based on the same inventive concept, the embodiment of the invention also provides a wafer level packaging method, which comprises the following steps:
providing a filter wafer, wherein the working surface of the filter wafer comprises a plurality of functional areas, each functional area is correspondingly provided with a plurality of electrodes, and the plurality of electrodes are symmetrically distributed on the periphery of the functional area;
forming a plurality of cofferdams, wherein one cofferdam is arranged corresponding to one functional area, is arranged on the working surface of the filter wafer and surrounds the functional area, and the vertical projection of the cofferdam on the working surface is partially overlapped with the electrode;
covering cover plates, wherein the cover plates correspond to the cofferdams one by one, and the outer edges of the vertical projections of the cover plates on the working surface are positioned between the inner edges and the outer edges of the vertical projections of the cofferdams on the working surface;
forming a first insulating layer, wherein the first insulating layer covers the side walls, perpendicular to the working surface, of the cover plate and the cofferdam and the surface, far away from the working surface, of the cover plate, and the vertical projection of the first insulating layer on the working surface is partially overlapped with the electrode;
forming a plurality of metal wirings, wherein the metal wirings correspond to the electrodes one by one, and the metal wirings are arranged on the first insulating layer and are electrically connected with the electrodes;
forming a second insulating layer, wherein the second insulating layer covers the metal wiring and the first insulating layer, and is provided with a plurality of openings which correspond to the metal wiring one by one and expose part of the metal wiring;
forming a metal solder ball, wherein the metal solder ball fills the opening and is electrically connected with the metal wiring;
and cutting the filter wafer along the cutting grooves of the filter wafer to obtain a plurality of filter chips.
According to the embodiment of the invention, the cofferdams which are in one-to-one correspondence with the functional areas of the filter wafer are arranged, the cover plate is arranged above the cofferdams, the electric connection between the electrodes on the filter wafer and the metal welding balls is realized by using metal wiring, and the isolation and protection effects are realized by using the first insulating layer and the second insulating layer, so that the problems of high cost, complex process and the like of cover plate warping and cavity formation in the prior art are solved, the yield of filter chips is improved, the cost is reduced, and the process is simplified.
Drawings
Fig. 1 is a schematic top view of a wafer level package structure according to an embodiment of the invention;
FIG. 2 is a cross-sectional view of the package structure shown in FIG. 1 along line AA';
FIG. 3 is a schematic diagram of another wafer level package structure according to an embodiment of the present invention;
FIG. 4 is a flowchart of a wafer level packaging method according to an embodiment of the present invention;
fig. 5-13 are schematic packaging flow diagrams of the wafer level package structure shown in fig. 2.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic top view of a wafer level package structure according to an embodiment of the present invention, and fig. 2 is a schematic cross-sectional view of the package structure shown in fig. 1 along a section line AA', where the package structure can be applied to package of a saw filter wafer to protect a working surface of the filter and to lead out an electrode. Referring to fig. 2, the wafer level package structure includes: the working surface of the filter wafer 110 includes a plurality of functional regions 111, each functional region 111 is correspondingly provided with a plurality of electrodes 112, and the plurality of electrodes 112 are symmetrically distributed on the periphery of the functional region 111; a plurality of cofferdams 120, one cofferdam 120 is arranged corresponding to one functional area 111, and is arranged on the working surface of the filter wafer 110 and surrounds the functional area 111, and the vertical projection of the cofferdam 120 on the working surface is partially overlapped with the electrode 112; the cover plates 130 correspond to the cofferdams 120 one by one, and the outer edges of the vertical projections of the cover plates 130 on the working surface are positioned between the inner edges and the outer edges of the vertical projections of the cofferdams 120 on the working surface; a first insulating layer 140 covering the cover plate 130 and the side wall of the cofferdam 120 perpendicular to the working surface and the surface of the cover plate 130 away from the working surface, and the vertical projection of the first insulating layer 140 on the working surface partially overlaps with the electrode 112; a plurality of metal wirings 150 corresponding to the electrodes 112 one by one, the metal wirings 150 being disposed on the first insulating layer 140 and electrically connected to the electrodes 112; a second insulating layer 160 covering the metal wire 150 and the first insulating layer 140, wherein the second insulating layer 160 has a plurality of openings, and the openings correspond to the metal wire 150 one by one and expose a part of the metal wire 150; and a metal solder ball 170, wherein the metal solder ball 170 fills the opening and is electrically connected with the metal wiring 150.
Illustratively, the functional regions 111 are provided with interdigital transducers for conversion of acoustic-electrical signals, and the functional devices provided in the functional regions are different for different types of wafers. The dam 120 is a material having viscosity and is shaped like a ring, and can be adhered to the filter wafer 110 and surround the functional area 111, wherein one dam 120 surrounds one functional area 111, and specifically, the dam 120 is located between the electrode 112 and the functional area 111 and the dam 120 can cover a partial area of the electrode 112. The single cover plate 130 cut in advance is adhered to the dam 120, so that a sealed cavity for protecting the functional region 111 can be formed. By correspondingly covering the single cover plate 130 on the cofferdam 120 of the functional area 111, the problem of warping caused by covering the whole wafer with a large cover plate in the prior art can be avoided, and the yield of the filter chip is improved. The adhesive dam 120 can avoid the high cost and complex process of forming the cavity by gold and gold bonding in the prior art. Since the cover plate 130 is usually made of a semiconductor material, the cover plate 130 and the dam 120 are covered by the first insulating layer 140, so that the subsequent electrical contact between the metal wiring 150 and the cover plate 130 can be effectively avoided, and the quality of the filter chip can be further improved. The metal wire 150 is a bridge electrically connecting the electrode 112 on the working surface of the wafer and the metal solder ball 170 on the surface of the package structure, and the filter chip is electrically connected to the working circuit through the metal solder ball 170. The second insulating layer 160 can protect the exposed metal wiring 150, thereby achieving the sealing protection of the package structure. By providing openings exposing the metal wires 150 on the second insulating layer 160 and filling the openings with the solder balls 170, the electrical connection between the solder balls 170 and the electrodes 112 can be achieved, thereby completing the wafer level package. The top view of the filter wafer 110 with the wafer level package completed is shown in fig. 1, and then the wafer may be diced along the dicing grooves 113 to obtain a plurality of filter chips.
According to the embodiment of the invention, the cofferdams which are in one-to-one correspondence with the functional areas of the filter wafer are arranged, the cover plate is arranged above the cofferdams, the electric connection between the electrodes on the filter wafer and the metal welding balls is realized by using metal wiring, and the isolation and protection effects are realized by using the first insulating layer and the second insulating layer, so that the problems of high cost, complex process and the like of cover plate warping and cavity formation in the prior art are solved, the yield of filter chips is improved, the cost is reduced, and the process is simplified.
On the basis of the above embodiment, optionally, the constituent material of the cofferdam 120 includes a high molecular photosensitive rubber material, and the thickness h1 of the cofferdam 120 along the direction perpendicular to the working surface satisfies 5 μm ≦ h1 ≦ 100 μm.
The high molecular photosensitive material is favorable for processing the annular cofferdam 120, and in addition, the rubber material is selected for facilitating the adhesion of the cofferdam 120 with the cover plate and the wafer respectively to form a sealed cavity, thereby saving the cost and simplifying the process. The thickness of the cofferdam 120 perpendicular to the working surface is 5-100 μm, which can play a good supporting role, so that the cofferdam 120 is not easy to deform.
In addition, the material of the cofferdam 120 may also have the characteristics of stable heat resistance, good chemical resistance, low water absorption, low gas release characteristics, and the like, so as to improve the product life.
Optionally, the material of the cover plate 130 comprises silicon, glass, lithium tantalate or lithium niobate, and the thickness h2 of the cover plate 130 in the direction perpendicular to the working surface satisfies 30 μm ≦ h2 ≦ 400 μm.
The material is easy to process, has high hardness and can play a good supporting role. The purpose of adjusting the thermal expansion coefficient of the cover plate material can be realized by adjusting the components during the preparation of the cover plate, so that the thermal expansion coefficient of the cover plate material is close to that of the filter wafer material as much as possible, and the probability of warping in the attaching process is further reduced. In addition, the thickness of the cover substrate may be processed to 30 μm to 400 μm using mechanical polishing, plasma etching, or the like, in order to reduce the overall thickness of the package structure while securing the supporting force of the cover plate.
Optionally, the cover plate is rectangular in shape along a first cross-section perpendicular to the working surface.
The first section, i.e., the section shown in fig. 2, is a simple cutting process for cutting the cover plate 130 into a rectangular parallelepiped, and the process complexity is not increased.
Fig. 3 is another wafer level package structure according to an embodiment of the invention. As shown in fig. 3, the cover plate 130 may alternatively have a regular trapezoidal shape along a first cross-sectional shape perpendicular to the working surface.
The first cross section, i.e., the cross section shown in fig. 3, is more favorable for the implementation of the subsequent metal wiring 150 process by setting the sidewall of the cover plate 130 close to the electrode 112 as an inclined surface, so as to ensure the conductivity of the metal wiring 150, thereby further improving the quality of the filter chip. Illustratively, a large sheet of cover substrate may be cut into individual cover sheets using a blade having a trapezoidal shape in its knife edge profile.
Optionally, the material of the first insulating layer 140 includes a photosensitive organic insulating material, and a thickness h3 of the first insulating layer 140 in a direction perpendicular to the working surface satisfies 5 μm ≦ h3 ≦ 50 μm.
The first insulating layer 140 is made of a photosensitive organic insulating material, so that good insulating performance can be achieved, and the processing and etching processes are mature and simple. The thickness of the first insulating layer 140 perpendicular to the working surface is set to 5 to 50 μm, which can achieve good insulation without excessively increasing the thickness of the filter chip.
It should be noted that the material of the first insulating layer 140 is not limited to the photosensitive organic insulating material, and the material of the first insulating layer may include any organic insulating material with good electrical insulating property, stable heat resistance, stable chemical resistance, low water absorption rate, and low thermal expansion coefficient, which is not limited in the embodiment of the present invention. In addition, the thickness of the first insulating layer 140 may be reduced as much as possible while ensuring the insulating property, and the embodiment of the present invention is not limited thereto.
Optionally, the material of the metal wiring 150 includes at least one of titanium, copper, aluminum, nickel, palladium, a titanium alloy, a copper alloy, an aluminum alloy, a nickel alloy, and a palladium alloy, and a thickness h4 of the metal wiring 150 in a direction perpendicular to the working surface satisfies 2 μm or more and h4 or more and 20 μm or less.
The material has good conductivity, can ensure the quality of a filter chip, can ensure the density of metal wiring by setting the thickness of the metal wiring perpendicular to the working surface to be not less than 2 microns and not more than h4 and not more than 20 microns, and further ensures that the metal wiring can provide a stable conductive function.
Optionally, the composition material of the second insulating layer 160 includes a photosensitive polymer, and a thickness h5 of the second insulating layer 160 in a direction perpendicular to the working surface satisfies 5 μm ≦ h5 ≦ 50 μm.
The second insulating layer 160 is made of a photosensitive polymer, which is advantageous for preparing a patterned insulating layer structure. The thickness of the second insulating layer 160 perpendicular to the working surface is set to be 5-50 μm, so that the second insulating layer 160 is compact, can play a good role in protection, and cannot cause film cracking due to over-thickness.
It should be noted that the photopolymer material used for preparing the second insulating layer 160 needs to have the characteristics of stable heat resistance, stable chemical resistance, low water absorption, low coefficient of thermal expansion of the material, etc. to improve the quality of the filter chip.
Optionally, the solder balls 170 are finished solder balls, and the thickness h6 of the solder balls 170 in the direction perpendicular to the working surface satisfies that h6 is greater than or equal to 30 μm.
Finished solder balls are selected as the metal solder balls 170 to be filled in the openings, so that the preparation process can be effectively simplified. The finished product of the tin ball is generally an alloy of tin, silver and copper, or a small ball with the inside being copper and the outside being wrapped with nickel and tin. It should be noted that, the metal solder ball may also be prepared by using solder paste, which is not limited in the implementation of the present invention. The solder paste is a mixture containing metals such as tin, silver and copper, and various components such as soldering flux and additives.
The thickness of the solder ball 170 perpendicular to the working surface can be set according to the thickness of the second insulating layer 160, generally, it is sufficient to ensure that the thickness of the solder ball 170 is greater than the thickness of the second insulating layer 160, which is not limited in the embodiment of the present invention, and in addition, the width (diameter) of the solder ball 170 parallel to the working surface can be adaptively adjusted according to the size of the opening, which is not limited herein.
Fig. 4 is a flowchart of a wafer level packaging method according to an embodiment of the invention, fig. 5-13 are packaging flow diagrams of the wafer level packaging structure shown in fig. 2, and the thickness marks of the layers in fig. 5-13 are also applicable to the description of the thickness of the layers in the above embodiment. Next, a packaging process of the wafer level package structure according to an embodiment of the invention will be described in detail with reference to fig. 4 to 13.
As shown in fig. 4, the packaging method specifically includes the following steps:
step 210, providing a filter wafer, where a working surface of the filter wafer includes a plurality of functional regions, each functional region is correspondingly provided with a plurality of electrodes, and the plurality of electrodes are symmetrically distributed on the periphery of the functional region.
Referring to fig. 5, the working surface of the filter wafer 110 to be packaged includes a plurality of cutting grooves 113 arranged in an array, and a region surrounded by the cutting grooves 113 includes a functional region 111 and a plurality of electrodes 112 disposed corresponding to the functional region 111. Illustratively, the functional area 111 primarily includes a fork ring power converter for converting the acousto-electric signals. The electrode 112 is used for electrically connecting with an external circuit to realize the function of the filter chip. After the wafer level package is completed, the wafer is cut along the cutting groove 113, and a plurality of filter chips are obtained. The subsequent packaging process is described below with reference to a cross-sectional view taken along section line BB'.
And 220, forming a plurality of cofferdams, wherein one cofferdam is arranged corresponding to one functional area, is arranged on the working surface of the filter wafer and surrounds the functional area, and the vertical projection of the cofferdam on the working surface is partially overlapped with the electrode.
Referring to fig. 6, which is a cross-sectional view, and fig. 7, which is a top view, the bank 120 surrounds the functional region 111 in a ring shape, and also exposes a portion of the electrode 112. Wherein the thickness h1 of the cofferdam 120 along the direction vertical to the working face satisfies 5 μm & lt, h1 & lt, 100 μm.
The cofferdam 120 can be made of a high molecular photosensitive rubber material to realize the processing of the annular cofferdam 120. Specifically, the method for forming the patterned bank 120 includes: firstly, the method is realized by using a high-molecular photosensitive glue material through spin coating and a semiconductor photoetching technology; secondly, attaching a high-molecular photosensitive dry film material to the surface of the filter wafer 110, and then implementing the graphical structure by using a photoetching technology; and thirdly, directly using a 3D printing technology to directly print the viscous rubber material on the surface of the wafer in a graphical manner, and the specific process is not repeated herein.
The size of the exposed portion of the dam 120 on the electrode 112 is about 10 to 100 μm, and may be designed according to the size of the electrode 112, for example, the dam covers at most 1/2 of the electrode area, which is not limited in the embodiment of the present invention.
And 230, covering cover plates, wherein the cover plates correspond to the cofferdams one by one, and the outer edges of the vertical projections of the cover plates on the working surface are positioned between the inner edges and the outer edges of the vertical projections of the cofferdams on the working surface.
Referring to FIG. 8, the cover plate 130 is rectangular in shape along a first cross-sectional surface perpendicular to the working surface, and a thickness h2 in a direction perpendicular to the working surface satisfies 30 μm. ltoreq. h 2. ltoreq.400. mu.m.
The material of the cover plate 130 may be silicon, glass, lithium tantalate, lithium niobate, or other materials that are easy to process. Illustratively, a large piece of cover sheet material may be cut into individual small pieces of cover sheet 130 using conventional knife-wheel cutting or laser cutting techniques, the small pieces of cover sheet 130 corresponding in size to the cofferdams 120 and being capable of overlying the cofferdams 120, being placed over each cofferdam 120 and then pressure bonded. Since the material of the dam 120 is self-adhesive, the functional region 111 of the filter chip can be sealed by the process of attaching the small cover plate 130 to the dam 120. In addition, since the cover substrate is cut into a single piece, severe warpage caused by excessive stress due to bonding of the cover plate 130 and the filter wafer 110 made of different materials is avoided.
The edge of the cover plate 130 is designed to have a certain distance from the edge of the cofferdam 120, that is, the outer edge of the vertical projection of the cover plate 130 on the working surface is located between the inner edge and the outer edge of the vertical projection of the cofferdam 120 on the working surface, so that the alignment difficulty when the cover plate 130 is covered can be reduced, and the alignment precision is improved. For example, the distance may be set to 5 μm, which is not limited by the embodiment of the present invention.
It should be noted that, the shape of the first cross section of the cover plate along the direction perpendicular to the working plane may also be a regular trapezoid, so as to facilitate the implementation of the subsequent metal wiring process.
Step 240, forming a first insulating layer, where the first insulating layer covers the cover plate and the sidewall of the cofferdam perpendicular to the working surface and the surface of the cover plate away from the working surface, and a vertical projection of the first insulating layer on the working surface is partially overlapped with the electrode.
Referring to fig. 9, after the cover plate 130 is attached to the filter wafer 110, the first insulating layer 140 covering the cover plate 130 and the dam 120 is formed, so as to insulate the cover plate 130 from the subsequent metal wires 150, thereby improving the quality of the filter chip. Wherein the thickness h3 of the first insulating layer 140 in the direction perpendicular to the working surface satisfies 5 μm h3 m 50 μm.
The material of the first insulating layer 140 may be a photosensitive organic insulating material, specifically, a photosensitive organic insulating material with a thickness of 5 μm to 50 μm is manufactured on the filter wafer 110 by using a semiconductor spraying technique, and then the first insulating layer 140 shown in fig. 9 is formed by using a photolithography technique to expose a portion of the electrode 112 for implementing a subsequent rewiring process.
It should be noted that the material of the first insulating layer may also be silicon dioxide, a layer of silicon dioxide material with a thickness of 1-5 μm may be manufactured by using a physical vapor chemical deposition technique, and then the dielectric layer etching technique or the laser ablation technique is used to form the first insulating layer 140 shown in fig. 9, so as to expose a portion of the electrode 112 for implementing a subsequent rewiring process.
Referring to fig. 10, which is a cross-sectional view, and fig. 11, which is a top view, the metal wirings 150 correspond to the electrodes 112 one to one, and there is no electrical connection between the metal wirings 150. Wherein a thickness h4 of the metal wiring 150 in a direction perpendicular to the working plane satisfies 2 μm. ltoreq. h 4. ltoreq.20 μm.
Specifically, the process of forming the metal wire 150, i.e., the re-wiring process, is to form a metal wire for electrical connection on the upper surface of the first insulating layer 140, so as to lead the electrode 112 to the surface of the first insulating layer 140 through the metal wire 150 for subsequent electrical connection with the metal solder ball 170. In the method, the metal wiring 150 can be manufactured by sequentially adopting the processes of magnetron sputtering, electroplating, photoetching, metal corrosion, chemical plating and the like. The metal wire 150 may be made of metal or alloy such as titanium, copper, aluminum, nickel, palladium, or may include metal tungsten and gold to achieve good conductivity, and the thickness of the metal wire 150 is generally 2 μm to 20 μm, and the metal wire 150 in the thickness range has good compactness, thereby ensuring the quality of the filter chip.
Referring to fig. 12, after the above-mentioned rewiring process is completed, a second insulating layer 160 may be formed over the metal wire 150 and the first insulating layer 140 to form a sealing structure for protecting the metal wire 150. In order to connect the filter chip to an external circuit, an opening is formed in the second insulating layer 160 to expose a portion of the metal wire 150, and then a metal solder ball 170 is formed in the opening to electrically connect the metal solder ball 170 and the electrode 112. Wherein the thickness h5 of the second insulating layer 160 in the direction perpendicular to the working surface satisfies 5 μm h5 m 50 μm.
Specifically, the second insulating layer 160 may be made of a photosensitive polymer, and the photosensitive polymer material with a thickness range of 5 μm or more and h5 or more and 50 μm or less is formed by spin coating, spraying, screen printing or the like on the basis of the above processes, and then a required pattern structure is formed by a photolithography process to form the second insulating layer 160 with an opening. For example, the shape of the opening may be circular, which is not limited in the embodiment of the present invention. In addition, the cutting grooves 113 of the filter wafer 110 can be exposed through a photolithography process, so that the subsequent cutting process can be conveniently performed.
Referring to fig. 13, the opening of the second insulating layer 160 is filled with a metal solder ball 170, so that the metal solder ball 170 is electrically connected to the electrode 112 through the metal wire 150. Wherein, the thickness h6 of the metal solder ball 170 along the direction vertical to the working surface satisfies h6 ≥ 30 μm.
The solder balls 170 can be used as solder pads for subsequent connection to the outside, so that the filter chip is electrically connected to the working circuit through the solder balls 170. Specifically, a finished solder ball may be placed on the metal wiring 150 exposed from the opening by using a ball placing technique, or a solder paste may be printed on the metal wiring 150 exposed from the opening by using a steel mesh printing technique, and then a solder ball micro bump is formed by using a high temperature reflow method, which is not limited in the embodiment of the present invention.
Finally, after the metal solder balls 170 are formed, the filter wafer 110 may be diced by using a metal blade or a laser dicing technique, that is, the packaged filter wafer 110 is diced into individual filter chips according to the positions of the dicing grooves 113.
The wafer level packaging method provided by the embodiment of the invention has the advantages of simple process and lower cost, can solve the problem of low yield of the filter chip caused by cover plate warping in the prior art, and has stronger practicability.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A wafer level package structure, comprising:
the working surface of the filter wafer comprises a plurality of functional areas, each functional area is correspondingly provided with a plurality of electrodes, and the plurality of electrodes are symmetrically distributed on the periphery of the functional area;
the cofferdams are arranged corresponding to the functional areas, arranged on the working surface of the filter wafer and surrounding the functional areas, and the vertical projection of the cofferdams on the working surface is partially overlapped with the electrodes;
the cover plates correspond to the cofferdams one by one, and the outer edges of the vertical projections of the cover plates on the working surface are positioned between the inner edges and the outer edges of the vertical projections of the cofferdams on the working surface;
the first insulating layer covers the cover plate and the side wall of the cofferdam perpendicular to the working surface and the surface of the cover plate far away from the working surface, and the vertical projection of the first insulating layer on the working surface is partially overlapped with the electrode;
a plurality of metal wirings in one-to-one correspondence with the electrodes, the metal wirings being disposed on the first insulating layer and electrically connected to the electrodes;
a second insulating layer covering the metal wiring and the first insulating layer, the second insulating layer having a plurality of openings, the openings corresponding to the metal wiring one-to-one and exposing a portion of the metal wiring;
and the metal solder balls fill the openings and are electrically connected with the metal wiring.
2. The package structure of claim 1, wherein a material of the dam comprises a polymer photosensitive adhesive material, and a thickness h1 of the dam in a direction perpendicular to the working surface satisfies 5 μm ≦ h1 ≦ 100 μm.
3. The package structure according to claim 1, wherein a material of the cover plate includes silicon, glass, lithium tantalate, or lithium niobate, and a thickness h2 of the cover plate in a direction perpendicular to the working surface satisfies 30 μm ≦ h2 ≦ 400 μm.
4. The package structure of claim 1, wherein the cover plate is rectangular in shape along a first cross-sectional shape perpendicular to the working surface.
5. The package structure of claim 1, wherein the cover plate is trapezoidal in shape along a first cross-sectional shape perpendicular to the working surface.
6. The package structure according to claim 1, wherein a material of the first insulating layer comprises a photosensitive organic insulating material, and a thickness h3 of the first insulating layer in a direction perpendicular to the working surface satisfies 5 μm ≦ h3 ≦ 50 μm.
7. The package structure of claim 1, wherein a material of the metal wiring includes at least one of titanium, copper, aluminum, nickel, palladium, a titanium alloy, a copper alloy, an aluminum alloy, a nickel alloy, and a palladium alloy, and a thickness h4 of the metal wiring in a direction perpendicular to the working surface satisfies 2 μm h4 m 20 μm.
8. The package structure according to claim 1, wherein a constituent material of the second insulating layer includes a photosensitive polymer, and a thickness h5 of the second insulating layer in a direction perpendicular to the working surface satisfies 5 μm ≦ h5 ≦ 50 μm.
9. The package structure of claim 1, wherein the solder balls are finished solder balls, and a thickness h6 of the solder balls in a direction perpendicular to the working surface satisfies h6 ≥ 30 μm.
10. A wafer level packaging method, comprising:
providing a filter wafer, wherein a working surface of the filter wafer comprises a plurality of functional areas, each functional area is correspondingly provided with a plurality of electrodes, and the plurality of electrodes are symmetrically distributed on the periphery of the functional area;
forming a plurality of cofferdams, wherein one cofferdam is arranged corresponding to one functional area, is arranged on the working surface of the filter wafer and surrounds the functional area, and the vertical projection of the cofferdam on the working surface is partially overlapped with the electrode;
the cover plates correspond to the cofferdams one by one, and the outer edges of the cover plates in the vertical projection of the working surface are positioned between the inner edges and the outer edges of the cofferdams in the vertical projection of the working surface;
forming a first insulating layer, wherein the first insulating layer covers the cover plate and the side wall of the cofferdam perpendicular to the working surface and the surface of the cover plate far away from the working surface, and the vertical projection of the first insulating layer on the working surface is partially overlapped with the electrode;
forming a plurality of metal wirings, wherein the metal wirings correspond to the electrodes one by one, and the metal wirings are arranged on the first insulating layer and are electrically connected with the electrodes;
forming a second insulating layer which covers the metal wiring and the first insulating layer, wherein the second insulating layer is provided with a plurality of openings which correspond to the metal wiring one by one and expose part of the metal wiring;
forming a metal solder ball, wherein the metal solder ball fills the opening and is electrically connected with the metal wiring;
and cutting the filter wafer along the cutting grooves of the filter wafer to obtain a plurality of filter chips.
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