CN110718616A - 光半导体元件 - Google Patents

光半导体元件 Download PDF

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Publication number
CN110718616A
CN110718616A CN201910628136.XA CN201910628136A CN110718616A CN 110718616 A CN110718616 A CN 110718616A CN 201910628136 A CN201910628136 A CN 201910628136A CN 110718616 A CN110718616 A CN 110718616A
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sub
electrode
mount
chip
corners
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CN201910628136.XA
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山根贵好
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Stanley Electric Co Ltd
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Stanley Electric Co Ltd
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Abstract

提供一种光半导体元件，光半导体芯片与子安装件之间的未接合部少，散热效率高且长寿命。光半导体元件具有：平板状的子安装件，其具有搭载面；子安装电极，其设置在所述子安装件的所述搭载面上，作为整体具有矩形形状；以及半导体芯片，其包括元件基板、形成在所述元件基板上的半导体结构层以及经由接合层与所述子安装电极接合的芯片电极，所述芯片电极具有缺少与所述子安装电极的四角对应的角部的形状，所述子安装电极在所述四角具有从所述芯片电极露出的部分即露出面，与所述芯片电极相匹配地接合，所述接合层延伸到所述四角中的所有的角的所述露出面。

Description

光半导体元件
技术领域
本发明涉及一种发光二极管(LED)等光半导体元件。
背景技术
公知的是将光半导体芯片与散热用的子安装件接合并安装的LED等光半导体元件。在该接合时，使用AuSn等导电性的贴片(Die attach)材料，半导体结构层与子安装件经由该贴片材料接合。
例如，专利文献1中公开了LED芯片经由焊盘粘接到子安装件上的LED(权利要求12等)。此外，公开了该焊盘由Au或者Au/Sn、Pb/Sn、Sn、Sn/Ag这样的适当的金属合金构成(第[0017]段等)。
现有技术文献
专利文献1：日本特开2013-033969
发明内容
发明要解决的问题
在上述的光半导体层与子安装件的接合中，具有如下问题：即，有时由于由贴片材料构成的接合层中产生的空隙、贴片材料的不均匀扩展等而引起散热的效率降低。
本发明是鉴于上述问题点而完成的，目的在于提供一种光半导体芯片与子安装件之间的未接合部少、散热效率高且长寿命的光半导体元件。
用于解决问题的手段
本发明的光半导体元件具有：平板状的子安装件，其具有搭载面；子安装电极，其设置在所述子安装件的所述搭载面上，作为整体具有矩形形状；以及半导体芯片，其包括元件基板、形成在所述元件基板上的半导体结构层以及经由接合层与所述子安装电极接合的芯片电极，所述芯片电极具有缺少与所述子安装电极的四角对应的角部的形状，所述子安装电极在所述四角具有从所述芯片电极露出的部分即露出面，与所述芯片电极相匹配地接合，所述接合层延伸到所述四角中的所有的角的所述露出面。
此外，本发明的光半导体元件具有：平板状的子安装件，其具有搭载面；子安装电极，其设置在所述子安装件的所述搭载面上；半导体芯片，其包括元件基板、形成在所述元件基板上的半导体结构层、以及芯片电极，所述芯片电极经由接合层与所述子安装电极接合，且作为整体具有矩形形状，所述子安装电极具有缺少与所述芯片电极的四角对应的角部的形状，所述芯片电极在所述四角具有从所述子安装电极露出的部分即露出面，与所述子安装电极相匹配地接合，所述接合层延伸到所述四角中的所有的角的所述露出面。
附图说明
图1为实施例1所涉及的发光装置的俯视图。
图2A为实施例1所涉及的发光装置的剖视图。
图2B为实施例1所涉及的发光装置的局部放大剖视图。
图3A为示出实施例1所涉及的光半导体元件的制造工序的一例的俯视图。
图3B为示出实施例1所涉及的光半导体元件的制造工序的一例的剖视图。
图4A为示出实施例1所涉及的光半导体元件的制造工序的一例的俯视图。
图4B为示出实施例1所涉及的光半导体元件的制造工序的一例的剖视图。
图5A为示出实施例1所涉及的光半导体元件的制造工序的一例的俯视图。
图5B为示出实施例1所涉及的光半导体元件的制造工序的一例的剖视图。
图6A为示出实施例1所涉及的光半导体元件的变形例的俯视图。
图6B为示出实施例1所涉及的光半导体元件的变形例的剖视图。
图6C为示出实施例1所涉及的光半导体元件的变形例的底视图。
图6D为示出实施例1所涉及的光半导体元件的变形例的剖视图。
图7为实施例2所涉及的发光装置的俯视图。
图8为实施例2所涉及的发光装置的剖视图。
图9为示出实施例2所涉及的光半导体元件的变形例的俯视图。
图10为示出实施例3所涉及的光半导体元件的俯视图。
图11为示出实施例3所涉及的光半导体元件的剖视图。
图12A为示出实施例3所涉及的光半导体元件的制造工序的一例的俯视图。
图12B为示出实施例3所涉及的光半导体元件的制造工序的一例的俯视图。
图13为示出实施例4所涉及的光半导体元件的俯视图。
图14A为示出实施例4所涉及的光半导体元件的俯视图。
图14B为示出实施例4所涉及的光半导体元件的俯视图。
图15为实施例5所涉及的发光装置的俯视图。
图16为实施例5所涉及的发光装置的剖视图。
图17为实施例5所涉及的半导体芯片的剖视图。
图18为实施例5所涉及的半导体结构层的俯视图。
标号说明：
10、30、50 发光装置
11、31、51 光半导体元件
12、52 子安装件
13、33、53 子安装电极
13S、33S、53S 露出面
15、35、55 接合层
17、37、57 芯片电极
18、38 元件基板
19、59 半导体结构层
20、40、60 半导体芯片
21、61A、61B 供电粘接剂
23A、23B 通电垫
24 接合线
25 反光体
26 空腔
具体实施方式
以下对本发明的实施例进行详细说明。另外，在以下的说明以及附图中，对实质上相同或者等效的部分赋予相同的参考标号。此外，在附图的俯视图中，为了明确地表示，而对构成要素的一部分施加了适当的阴影而示出。
【实施例1】
参照图1、图2A以及图2B，对本实施例所涉及的发光装置10的结构进行说明。发光装置10包括本发明的光半导体元件11。图1为示出发光装置10的结构的俯视图。图2A为沿着发光装置10的图1中的2A－2A线的剖视图。在图1中，为了便于说明，对构件的一部分施加了阴影而示出。
首先，对光半导体元件11的结构进行说明。子安装件12为具有搭载面的平板状的基板。子安装件12例如使用氧化铝、AlN陶瓷、SiC等的基板。在本实施例中，对子安装件12为导热性高的AlN陶瓷的情况进行说明。
如图2A所示，子安装电极13为形成在子安装件12的搭载面上的电极图案。如图1所示，子安装电极13在俯视时具有矩形形状。例如，子安装电极13由Ti、Pt、Au、Pd、Cr、Ni、Cu、W、Al等金属构成。
如图2A所示，接合层15为形成在子安装电极13上的导电性的接合材料。例如，作为接合层15，可以使用导电浆料(paste)、焊接材料、烧结性Ag粒子浆料、各向异性导电性浆料等导电性的材料。在本实施例中，例如，接合层15为AuSn。
芯片电极17为设置在接合层15上的电极图案。即，芯片电极17经由接合层15与子安装电极13接合。例如，可以组合Ti、Al、Fe、Ni等金属来形成芯片电极17，除此以外，也可以使用Pt、W、Pd、Cr、Cu等金属来形成芯片电极17。
在图1中，对接合层15以及芯片电极17施加阴影而示出。如图1所示，在俯视时，芯片电极17具有除了子安装电极13的四角以外，与安装电极13匹配的形状，且具有缺少与该四角对应的角部的形状。换而言之，芯片电极17除了缺少四角这一点以外，具有与子安装电极13匹配的平面形状。此外，子安装电极13除了该四角以外与芯片电极17相匹配地接合。
元件基板18为平板状的基板，如图2A所示，形成在芯片电极17上。例如，元件基板18为蓝宝石、SiC、AlN等对于可见光具有透光性的基板。例如，元件基板18可以具有与芯片电极17连接的通孔(未图示)。另外，元件基板18可以是ITO等的具有导电性的基板，也可以是由多个层构成的基板。
半导体结构层19形成在元件基板18上。在元件基板18上按顺序层叠p型半导体层19A、有源层(即，发光层)19B以及n型半导体层19C而构成半导体结构层19。在光半导体元件11中，来自发光层19B的光从n型半导体层10C的上表面射出。即，n型半导体层19C的上表面构成光出射面。
从发光层19B射出的出射光的波长为与半导体结构层19的材料以及组成对应的波长。例如，来自发光层19B的出射光的波长可以是红外区域的波长，也可以是深紫外区域的波长。
如图2A所示，芯片电极17、元件基板18以及半导体结构层19构成半导体芯片20。光半导体元件11具有经由接合层15接合在子安装电极13上的半导体芯片20。在本实施例中，半导体芯片20为具有薄膜(Thin-film)型的粘合结构(或者金属粘接结构(MB结构))的元件。
供电粘接剂21形成在子安装件12的与搭载面相反侧的表面上，是具有导电性的粘接剂。供电粘接剂21例如由AuSn等导电性的材料构成。封装基板22具有可安装LED等元件的安装面。封装基板22例如为AlN或者氧化铝等陶瓷基板。此外，封装基板22可以使用玻璃环氧基板等基板。由此，光半导体元件11经由供电粘接剂21而安装在封装基板21上。
通电垫23A和23B为设置于封装基板22的安装面的电极，为与外部电路连接而接受电流供应的连接电极。通电垫23A经由设置于子安装件12的布线(未图示)而与子安装电极13电连接。因此，通电垫23A经由子安装电极13、接合层15以及芯片电极17，与p型半导体层19A电连接。通电垫23B经由接合线24与n型半导体层19C电连接。
反光体25为设置在封装基板22上的框体。反光体25具有内壁25A。例如，内壁25A具有向远离封装基板22的上表面的方向扩展的倒截断金字塔的侧面的形状。由封装基板22的上表面以及内壁25A形成倒截断金字塔形状的空腔26。即，光半导体元件11被收纳在空腔26内而被封装。例如，反光体25可以使用与封装基板22构成一体的陶瓷。
图2B为由图2A的虚线包围的部分2B的放大图。如上所述，子安装电极13经由接合层15与芯片电极17接合。此外，芯片电极17具有缺少与子安装电极的四角对应的角部的形状。因此，子安装电极13在该四角中具有从芯片电极17露出的部分即露出面13S。
如图2B所示，接合层15延伸到子安装电极13的露出面13S。在本实施例中，接合层15以覆盖露出面13S整体的方式延伸。此外，如图1所示，接合层15延伸到子安装电极13的四角中的所有的角的露出面13S。
参照图3A～图5B，对光半导体元件11的制造方法的一例进行说明。图3A为半导体芯片20的俯视图。图3B为沿着图3A的3B－3B线的剖视图。
如图3A以及图3B所示，半导体芯片20构成为在最上面形成半导体结构层19、在其下层形成元件基板18，在更下层形成芯片电极17。如图3A所示，芯片电极17具有缺少矩形形状的四个角部的形状。
例如，在与元件基板18不同的基板即生长基板上通过MOCVD(Metal OrganicChemical Vapor Deposition：金属有机化学气相沉积)等方法使n型半导体层19C、发光层19B以及p型半导体层19A生长，使该生长的半导体层与元件基板18接合，并去除生长基板，从而形成半导体结构层19。
在元件基板18的与接合有半导体结构层19的面相反侧的面上，经由金属沉积、光刻、溅射、蚀刻等工艺而形成电极图案，从而形成芯片电极17。
图4A为示出配置在子安装件12、子安装电极13以及子安装电极13上的贴片材料(DA材料)15L的俯视图。图4B为沿着图4A的4B－4B线的剖视图。
如上所述，DA材料15L为导电浆料、焊接材料等导电性的材料，在在本实施例中，以AuSn为例进行说明。DA材料15L例如使用分配(Dispensing)而配置在子安装电极13的中央部分。例如，可以将DA材料15L的适当的吐出量设为根据期望的接合层15的厚度以及子安装电极13的面积而计算出的体积。例如，计算DA材料的体积以使接合层15的厚度为约10－20μm。另外，可以根据需要涂覆助焊剂(flux)，而使接合对象的浸润性提高。
配置DA材料15L的位置优选为离子安装电极13的四角最远的位置，且以与该四角的距离相等的位置为中心。此外，优选将DA材料15L配置成具有球状的形状。通过如此配置，从而在DA材料15L扩展时难以卷入空气，难以在接合层15中产生空隙等的未接合部。
之后，在子安装电极13上以芯片电极17与DA材料15L接触的方向载置半导体芯片20。此时，以使子安装电极13与芯片电极17除了子安装电极13的四角以外匹配的方式来载置半导体芯片20。
在配置DA材料15L之后，当对半导体芯片20的相当于DA材料15L的中央的位置施加负荷时，DA材料15L沿着子安装电极13以及芯片电极17浸润扩展。当对DA材料15L施加均等的负荷时，DA材料15L扩展到子安装电极13的四角。由此，使子安装电极13与芯片电极17经由DA材料15L接合。
图5A为使子芯片电极17与安装电极13接合的状态下的俯视图。图5B为沿着图5A的5B－5B线的剖视图。在该接合之后，进行DA材料15L是否扩展到子安装电极13的四角的判定。具体来说，判定DA材料15L是否延伸到子安装电极13从芯片电极17露出的露出面13S。
在该判定时，将DA材料15L延伸到该四角中的所有的角的露出面13S的情况设为合格。在DA材料15L未延伸到该四角的4个露出面13S中的任意1个以上的露出面的情况下，设为不合格。
例如，通过目视确认进行该判定。如本实施例所示，在半导体结构层19以及元件基板18对于可见光具有透光性的情况下，如图5A所示，能够经由半导体结构层19以及元件基板18确认DA材料15L是否延伸到露出面13S。
例如，也可以通过目视确认以外的方法进行该判定。例如，可以将可见光以外的波长区域的光用作检查光，进行DA材料15L是否延伸到露出面13S的判定。在该情况下，半导体结构层19以及元件基板18只要对于该检查光具有透光性即可。之后，利用回焊炉(Reflowfurnace)使合格的产品(合格品)硬化而制作具有接合层15的光半导体元件11。
作为该判定的合格品，可以说DA材料15L在子安装电极13与芯片电极17之间以更均匀的厚度均匀地扩展。因此，合格品抑制了空隙等的产生，且抑制了子安装电极13与芯片电极17之间的未接合部的产生。此外，也可以说该合格品能够确保DA材料15L的平坦性。
参照图6A以及图6B，对光半导体元件11中的接合层15延伸到子安装电极13的露出面13S的方式的其它示例进行说明。图6A为光半导体元件11的俯视图。图6B为沿着图6A的6B－6B线的剖视图。
在图6A中，接合层15覆盖露出面13S的一部分。露出面13S的其它部分从接合层15露出。参照图6B，接合层15延伸到子安装电极13的与芯片电极17之间，进而在露出面13S上朝向子安装电极13的端部延伸，但未到达该端部。
由此，接合层15可以部分地延伸到该四角中的所有的角的露出面13S的各露出面13S。更详细来说，在光半导体元件11中，不管粘接层15延伸到露出面13S全体，还是部分地延伸，只要延伸到四角的全部即可。
因此，可以是在四角中的若干个露出面13S中，粘接层15全体地延伸，在剩余的露出面13S中，部分地延伸。另外，更优选在四角中的所有的角的露出面13S中全体地延伸，或者在四角中的所有的角的露出面13S中部分地延伸。
进而，在部分地延伸的情况下，优选延伸程度、即粘接层15从芯片电极17超出的量对于所有四角均相等。即，优选粘接层15在四角中的所有的角的露出面13S中均等地延伸。
另外，DA材料15L向露出面13S的扩展的容易程度根据用作DA材料15L的材料的制造时的表面张力、粘度等性质而不同。优选也考虑该性质，决定针对在露出面13S延伸的粘接层15所允许的方式。
如以上所说明，本实施例的发光装置10的光半导体元件11具有矩形形状的子安装电极13与半导体芯片20的芯片电极17经由接合层15接合的结构。芯片电极17具有除了子安装电极13的四角以外，与子安装电极13匹配的形状，且具有缺少与该四角对应的角部的形状。
子安装电极13在该四角中具有从芯片电极17露出的部分即露出面13S。接合层15延伸到该四角中的所有的角的露出面13S。因此，子安装电极13与芯片电极17通过接合层15在抑制了空隙的产生、不均匀的扩展、且未接合部少的状态下被接合。因此，在子安装电极13以及芯片电极17中流过的电流的电流密度更均匀。此外，空隙等未接合部妨碍子安装件12的热传导的情况较少，散热效率高。因此，能够提供抑制了发光效率的降低速度的长寿命的光半导体元件11以及使用该光半导体元件11的发光装置10。
此外，通过接合层15延伸到该四角中的所有的角的露出面13S的结构，能够确保接合层15的平坦性，能够将半导体芯片20高精度且平行地安装于子安装件12。因此，如发光装置10所设计的那样，能够取出出射光，能够得到期望的发光输出。由此，根据本实施例，能够提供光半导体芯片与子安装件之间的未接合部少、散热效率高且长寿命的光半导体元件。
[变形例]
图6C为本实施例的变形例即光半导体元件11R的仰视图。图6D为沿着图6C的6D－6D线的剖视图，将子安装件12表示为最底层。
光半导体元件11R的芯片电极17、接合层15以及子安装电极13具有与光半导体元件11不同的结构，而其它方面构成为同样。
光半导体元件11R具有整体为矩形形状的芯片电极17R、以及具有除了芯片电极17R的四角以外与芯片电极17R匹配的形状且缺少与该四角对应的角部的子安装电极13R。并且，接合层15延伸到芯片电极17R从子安装电极13R露出的露出面17S。
在该情况下，子安装件12为对于检查光具有透光性的基板。另一方面，元件基板18也可以对于检查光不具有透光性。
根据该结构，能够从子安装件12侧进行接合层15是否延伸到所有露出面17S的判定。因此，与光半导体元件11同样地，能够抑制空隙等未接合部的产生。
【实施例2】
参照图7以及图8，对本实施例所涉及的发光装置30的结构进行说明。在本实施例的附图中，对实质上与实施例1的情况相同或者等效的部分赋予相同的参考标号，省略说明。
发光装置30包括本发明的光半导体元件31。图7为示出发光装置30的结构的俯视图。图8为沿着发光装置30的图7中的8－8线的剖视图。首先，对光半导体元件31的结构进行说明。
与实施例1的情况同样地，子安装件12为具有搭载面的平板状的基板，与光半导体元件31的外部电路连接。如图8所示，子安装电极33为形成在子安装件12的搭载面上的电极图案，例如，由Ti、Pt、Au、Pd、Cr、Ni、Cu、W、Al等金属构成。子安装电极33具有2个子安装电极片33A1和33A2。
如图7所示，子安装电极片33A1和33A2分别具有矩形形状，彼此分离地配置。子安装电极33的外缘33E由将子安装电极片各自的外周中的相当于该配置的子安装电极片33A1和33A2全体的外周的部分连结起来的直线来定义，具有矩形形状。即，子安装电极33作为整体具有矩形形状。
接合层35为形成在子安装电极33上的导电性的接合材料。作为接合层35，例如，可以使用导电浆料、焊接材料等与实施例1的接合层15同样的导电性的材料。在本实施例中，对作为接合层35使用了AuSn的示例进行说明。接合层35分别形成在子安装电极片33A1上以及子安装电极片33A2上。
芯片电极37为设置在接合层35上的电极图案。芯片电极37经由接合层35与子安装电极33接合。芯片电极37具有2个芯片电极片37B1和37B2。芯片电极片37B1和37B2具有除了子安装电极33的四角以外、即除了子安装电极33的外缘33E的四角以外分别与对应的子安装电极片33A1和33A2匹配的形状以及配置，缺少与子安装电极33的四角对应的角部。2个子安装电极片33A1及33A2与2个芯片电极片37B1及37B2b彼此相匹配地接合。
2个子安装电极片33A1及33A2在与子安装电极33的四角、即外缘33E的四角对应的4个角部中具有露出面33S。如图7所示，接合层35延伸到该所有的4个露出面33S。例如，如图8所示，接合层35以覆盖子安装电极片33A2所具有的2个露出面33S的整体的方式延伸。
半导体结构层19设置在芯片电极37上。即，芯片电极37为形成在半导体结构层19上的电极图案。半导体结构层19按照p型半导体层19A、有源层(即，发光层)19B以及n型半导体层19C的顺序在芯片电极37上层叠p型半导体层19A、有源层(即，发光层)19B以及n型半导体层19C而构成。如上所述，从发光层19B射出与半导体结构层19的材料以及组成对应的波长的出射光。
元件基板38设置在半导体结构层19上。元件基板38为半导体结构层19的生长基板。元件基板38为蓝宝石、SiC、AlN等的对于可见光具有透光性的基板。在本实施例中，示出了将AlN单晶基板使用作元件基板38的示例。如图8所示，芯片电极37、半导体结构层19以及元件基板38构成半导体芯片40。
与实施例1的情况同样地，光半导体元件31经由供电粘接剂21安装在封装基板22上。通电垫23设置于封装基板22的安装面，为与外部电路连接的连接电极。与实施例1的情况同样地，反光体25设置在封装基板22上，光半导体元件31被收纳在空腔26内而被封装。
另外，在本实施例中，示出了光半导体元件31是使半导体结构层19在元件基板38上生长而形成的半导体芯片40反转安装的倒装芯片型LED元件的示例。
如上所述，芯片电极37分为芯片电极片37B1和37B2。因此，能够将芯片电极片37B1和37B2中的一方与p型半导体层19A电连接，将另一方与n型半导体层19C电连接。
例如，通过将通电垫23设置成具有与芯片电极片37B1以及与芯片电极片37B1接合的子安装电极片33A1电连接的连接电极、以及与芯片电极片37B2以及与芯片电极片37B2接合的子安装电极片33A2电连接的连接电极(未图示)这2系统的连接电极，从而能够在倒装芯片型的光半导体元件中通电。
由此，根据本实施例，即使在子安装电极33以及芯片电极37分别具有2个电极片的情况下，也能够采用在子安装电极33的外缘33E的四角中具有芯片电极37的露出面33S的结构。
并且，通过采用接合层35延伸到露出面33S的结构，从而能够提供空隙的产生较少的光半导体元件31。因此，能够提供电流密度均匀、散热效率良好且长寿命的光半导体元件以及使用该光半导体元件的发光装置。
进而，能够提供能够确保安装半导体芯片40时的相对于子安装件12的平行度，且能够得到所设计的那样的配光特性以及发光输出的光半导体元件以及使用该光半导体元件的发光装置。
图9为本实施例的光半导体元件31的变形例即光半导体元件31V1的俯视图。如图9所示，子安装电极33具有2个子安装电极片33A1和33A2。
芯片电极37具有2个芯片电极片37B1和37B2，该2个芯片电极片37B1和37B2具有除了该2个子安装电极片的四角以外，与对应的子安装电极片33A1和33A2匹配的形状以及配置，缺少与2个子安装电极片各自的四角对应的角部。2个子安装电极片33A1和33A2在各自的四角中具有露出面33S，接合层35延伸到该各四角中的所有的角的露出面33S。
在光半导体元件31V1中，针对子安装电极片33A1与芯片电极37B1之间的接合层35、以及子安装电极片33A2与芯片电极37B2之间的接合层35，分别能够采用可靠地抑制了未接合部的产生的结构。
【实施例3】
参照图10～图12B，对实施例3的发光装置进行说明。在本实施例中，与实施例2同样地，光半导体元件41安装在封装基板22上。以下，对光半导体元件41的结构进行说明。图10为光半导体元件41的俯视图。图11为沿着图10的11－11线的剖视图。
如图10所示，子安装电极33具有第1至第n(n≥2)子安装电极片33A1～33An(以下，也简称为“子安装电极片”)。子安装电极片33A1～33An分别具有条纹形状(长条形形状)，彼此分离地配置。更详细来说，子安装电极片分别以相互平行地排列的方式配置。
如图10所示，子安装电极33的外缘33E由将子安装电极片各自的外周中的相当于该配置的子安装电极片33A1～33An全体的外周的部分连结起来的直线来定义，具有矩形形状。即，子安装电极33作为整体具有矩形形状。
接合层35为在子安装电极33上形成的导电性的接合材料。作为接合层35，可以使用导电浆料、焊接材料等导电性的材料。在本实施例中，对接合层35为AuSn的示例进行说明。
沿着各子安装电极片33A1～33An形成接合层35。此外，如图11所示，接合层35延伸到子安装电极33An的两端部。
芯片电极37为设置在接合层35上的电极图案。芯片电极37经由接合层35与子安装电极33接合。芯片电极37由第1至第n芯片电极片37B1～37Bn(以下，也简称为“芯片电极片”)构成。为了明确地表示，在图10中，对芯片电极片以及接合层35施加阴影而示出。
如图10所示，芯片电极片37B1～37Bn分别具有除了子安装电极33的外缘33E的四角以外，与对应的子安装电极片匹配的形状以及配置，缺少与第1以及第n子安装电极片的两端部对应的端部。
除了该四角以外，各子安装电极片与各芯片电极片相互匹配且经由接合层35被接合。第1以及第n子安装电极片在各自的两端部中具有从芯片电极露出的部分即露出面33S，接合层35延伸到所有露出面33S。
半导体结构层19以及元件基板38构成为与实施例2的情况同样。芯片电极37、半导体结构层19以及元件基板38构成半导体芯片42。
参照图12A以及图12B，对光半导体元件41的制造方法的一例进行说明。图12A为示出配置在子安装件12、子安装电极33以及子安装电极33上的贴片材料(DA材料)35L的俯视图。是与形成光半导体元件31的接合层35的DA材料15L同样的材料，优选为具有导电性且制造时具有流动性的材料，例如，使用AuSn。
如图12A所示，DA材料35L配置于子安装电极33的子安装电极片33A1～33An各自的中央部。例如，以与具有条纹形状的子安装电极片各自的两端部的距离相等的位置为中心来配置DA材料35L。通过如此配置，从而DA材料35L在扩展时难以卷入空气，难以在接合层35产生空隙等未接合部。
图12B为半导体芯片42的俯视图。如图12B所示，芯片电极37形成为具有芯片电极片37B1～37Bn的电极图案。如上所述将各芯片电极片形成为在与子安装电极33接合时，与子安装电极33匹配的形状以及配置。为了便于说明，图12B中示出了相当于子安装电极33的外缘33E的形状以及位置。
在配置有DA材料35L的子安装电极33上，以使芯片电极37与DA材料35L接触的方向载置半导体芯片42。此时，优选以除了子安装电极片各自的两端部以外，各子安装电极片33A1～33An与对应的各芯片电极片37B1～37Bn相匹配地接合的方式，将半导体芯片42对齐来载置。
在载置了半导体芯片42之后，对相当于子安装电极33的外缘33E的中心的位置施加负荷。当如此施加负荷时，DA材料35L沿着各子安装电极片以及各芯片电极片浸润扩展。
在对半导体芯片42施加负荷之后，进行DA材料35L是否延伸到所有露出面33S的判定。例如，能够通过目视确认进行该判定。此外，例如，可以通过使用了对于元件基板38以及半导体结构层19具有透光性的波长区域的检查光的检查装置进行该判定。
在该判定中，将DA材料35L延伸到子安装电极片33A1以及33An的所有露出面33S的情况设为合格。在DA材料35L未延伸到该所有露出面33S中的任意.1个以上的露出面33S的情况下，设为不合格。
但是，也可以设置更详细的判定基准。例如，也可以是将在所有露出面33S的各露出面中，DA材料35L在全体中延伸的情况设为合格，将在该所有露出面33S中的任意1个以上的露出面33S中，DA材料35L仅延伸到该露出面33S的一部分的情况设为不合格。进而，也可以通过DA材料35L在露出面33S延伸的程度(突出量)在所有露出面33S之间是否均等来进行该判定。
之后，通过回焊炉对合格品进行加热，使DA材料35L硬化来作为接合层35，而完成光半导体元件31。作为该判定的合格品，DA材料35L在子安装电极33与芯片电极37之间按照更均匀的厚度无偏差地扩展，抑制了空隙等的子安装电极33与芯片电极37的未接合部的产生。此外，可以说该合格品能够确保DA材料35L的平坦性。
如以上所说明，根据本实施例，即使在子安装电极33以及芯片电极37分别具有多个电极片的情况下，也能够采用在子安装电极33的四角中具有芯片电极37和露出面33S的结构。
更详细来说，能够采用如下的结构：设置第1～第n芯片电极片，该第1～第n芯片电极片除了具有为条纹形状的子安装电极片33A1～33An的子安装电极33的外缘33E的四角以外，分别具有与对应的子安装电极片匹配的形状以及配置，缺少与第1以及第n子安装电极片的两端部对应的端部。
并且，通过采用使接合层35延伸到第1以及第n子安装电极片的两端部中的露出面33S的结构，从而能够提供抑制了空隙等未接合部的产生的光半导体元件41。因此，能够提供电流密度均匀、散热效率良好且长寿命的光半导体元件以及使用该光半导体元件的发光装置。
进而，能够确保安装半导体芯片40时的相对于子安装件12的平行度，能够提供能够得到所设计的那样的配光特性以及发光输出的光半导体元件以及使用该光半导体元件的发光装置。
【实施例4】
参照图13～图14B，对实施例4的发光装置进行说明。在本实施例中，与实施例2以及实施例3同样地，光半导体元件43安装在封装基板22上。光半导体元件43除了芯片电极片37B1～37Bn的结构以外，与实施例3的光半导体元件41同样地构成。以下，对光半导体元件43的结构进行说明。
图13为光半导体元件43的俯视图。与实施例3同样地，子安装电极33具有分别具有条纹形状(长条形形状)，且彼此分离地配置的子安装电极片33A1～33An。沿着各子安装电极片33A1～33An形成接合层35。芯片电极37经由接合层35与子安装电极33接合，具有芯片电极片37B1～37Bn。
如图13所示，芯片电极片37B1～37Bn分别具有除了子安装电极33A1～33An各自的两端部以外，与对应的子安装电极片匹配的形状以及配置，缺少与对应的子安装电极片的两端部对应的端部。即，对于第1以及第n芯片电极片37以外的芯片电极片，也分别缺少与对应的子安装电极片的两端部对应的端部。
除了该两端部以外，各子安装电极片33A1～33An与各芯片电极片37B1～37Bn彼此匹配，并经由接合层35被接合。各子安装电极片具有在两端部中从芯片电极露出的部分即露出面33S，接合层35延伸到所有的露出面33S。
由此，可以采用各芯片电极片具有缺少与子安装电极片各自的两端部对应的端部，且各子安装电极片在两端部中具有露出面33S的结构。因此，能够提供在各子安装电极片与对应的各芯片电极片之间的接合层35中抑制了空隙等未接合部的产生的光半导体元件43。
在光半导体元件43中，不管粘接层35在露出面33S的全体中延伸，还是部分地延伸，只要在子安装电极33的四角的全体中延伸即可。此外，对于具有条纹形状的所有子安装电极片各自的两端部的露出面33S也是，不管是在露出面33S的全体中延伸，还是部分地延伸，只要粘接层35在具有条纹形状的所有子安装电极片各自的两端部的露出面33S延伸即可。
因此，也可以是在所有的子安装电极片各自的两端部中的若干个露出面33S中粘接层35在全体中延伸，在剩余的露出面33S中部分地延伸。另外，更优选在所有露出面33S中在全体中延伸、或者在所有露出面33S中部分地延伸。
参照图14A以及图14B，对光半导体元件43的制造时的DA材料35L是否延伸到所有露出面33S的判定进行说明。图14A为示出将芯片电极37经由DA材料35L接合在子安装电极33上的状态的一例的俯视图。
在图14A中，在子安装电极片33A1～33An的所有的两端部中，DA材料35L延伸到从芯片电极37B1～37Bn露出的部分即露出面33S。即，在子安装电极33的所有的四角中DA材料35L延伸到露出面33S。因此，在该情况下，在制造时的判定中作为原则而成为合格。
但是，在图14A中，在各子安装电极片的两端部中的一侧的端部(在图14A中，由虚线包围的部分L)中，DA材料35L在露出面33S的全体中延伸。在子安装电极片各自的另一侧的端部(在图14A中，由虚线包围的部分R)，DA材料35L延伸到露出面33S的一部分区域，在其它的区域中露出面33S从DA材料35L露出。
由此，在DA材料35L在露出面33S中延伸的程度存在偏差的情况下，即，在DA材料35L从芯片电极37的突出量不均匀的情况下，也可以考虑与该延伸量均匀的情况相比，使芯片电极37向子安装电极的条纹形状的长边方向倾斜而与子安装电极33接合。因此，可以考虑为DA材料35L的扩展不均匀，可能产生空隙等。在该情况下，可以设定判定为不合格这样的判定基准。
图14B为示出使芯片电极37经由DA材料35L接合在子安装电极33上的状态的其它示例的俯视图。在图14B中，在子安装电极片33A1～33An的所有的两端部中，DA材料35L延伸到露出面33S。因此，与图14A的情况同样地，在制造时的判定中作为原则成为合格。
但是，更详细来说，在子安装电极片33A1～33An－1的两端部中，DA材料35L在露出面33S的全体中延伸。另一方面，在第n子安装电极片33An的两端部中，DA材料35L延伸到露出面33S的一部分区域，在其它的区域中，露出面33S从DA材料35L露出。
在该情况下，DA材料35L在露出面33S延伸的程度不均等，可以说芯片电极37向与该条纹形状的长边垂直的方向倾斜而与子安装件12以及子安装电极33接合。在该情况下，可以设定判定为不合格这样的判定基准。
【实施例5】
参照图15～图18，对实施例5所涉及的发光装置50的结构进行说明。发光装置50包括本发明的光半导体元件51。图15为示出发光装置50的结构的俯视图。图16为沿着图15的16－16线的剖视图。
子安装件52具有搭载面，在该搭载面上设置有通孔52A和52B以及布线53C和53D。在通孔52A和52B内，例如实施金属电镀或者充填金属，在与搭载面相反侧的面之间取得导通。布线53C和53D经由通孔52A和52B与外部电路连接。
如图16所示，子安装电极53为形成在子安装件52的搭载面上的电极图案，例如由Ti、Pt、Au、Pd等金属构成。子安装电极53包括子安装电极片53A以及作为子安装件侧相反电极的子安装电极片53B。
子安装电极片53A由第1至第n(n≥2)的子安装电极片构成。在本实施例中，对n＝6的情况进行说明。如图16所示，子安装电极53A由第1～第6子安装电极片53A1～53A6构成。
如图15所示，子安装电极片53A1～53A6分别具有条纹形状(长条形形状)，且彼此分离地配置。更详细来说，子安装电极片53A1～53A6的条纹形状的长边彼此相互平行地配置，构成n行的排列。
子安装电极片53B具有条纹形状，在与子安装电极片53A1～53A6的长边垂直的方向上，与子安装电极片53A分离地配置。
如图15所示，子安装电极53A的外缘53A由将各子安装电极片的外周中的相当于该配置的子安装电极片53A1～53A6全体的外周的部分连结起来的直线所定义，具有矩形形状。即，子安装电极53A作为整体具有矩形形状。
接合层55包括接合层55A以及接合层55B。沿着各子安装电极片53A1～53A6形成接合层55A。如图16所示，接合层55A延伸到各子安装电极片53A的两端部。沿着子安装电极片53B形成接合层55B，接合层55B延伸到子安装电极片53B的两端部。
与上述的实施例同样地，作为接合层55，可以使用导电浆料、焊接材料等导电性的材料，在本实施例中，对接合层55为AuSn的示例进行说明。
芯片电极57为设置在接合层55上的电极图案，经由接合层55与子安装电极53接合。例如，可以组合Ti、Al、Au、Ni、Cr、Ni、Cu等金属而形成芯片电极57，也可以使用Pt、W、Pd等金属而形成芯片电极57。
芯片电极57包括芯片电极片57A以及作为芯片侧相反电极的芯片电极片57B。芯片电极片57A设置在接合层55A上，具有第1至第n(n≥2)芯片电极片。在本实施例中，对n＝6的情况进行说明。
如图15所示，芯片电极57A具有第1～第6芯片电极片57A1～57A6，该第1～第6芯片电极片57A1～57A6具有除了各子安装电极片53A1～53A6的两端以外，分别与对应的子安装电极片53A匹配的形状以及配置，缺少与各子安装电极片53A的两端部对应的端部。
芯片电极片57B设置在接合层55B上。例如，芯片电极片57B具有除了子安装电极片53B的两端以外，与子安装电极片53B匹配的形状以及配置，具有缺少与子安装电极片53B的两端部对应的端部的形状。
并且，除了该子安装电极片53A各自的两端部以外，各子安装电极片53A与各芯片电极片57A相互匹配，并经由接合层55A接合。此外，除了子安装电极片53B的两端部以外，子安装电极片53B与芯片电极片57B相互匹配，并且经由接合层55B接合。
各子安装电极片53A以及子安装电极53B在其条纹形状的两端部中具有从各芯片电极片露出的露出面53S。在本实施例中，接合层55A延伸到子安装电极片53A的所有的露出面53S，接合层55B延伸到子安装电极片53B的2个露出面53S。即，接合层55延伸到所有露出面53。
半导体结构层59设置在芯片电极57上。即，芯片电极57为形成在半导体结构层59上的电极图案。按照p型(第1导电型)半导体层59A、有源层(即，发光层)59B以及n型(第2导电型)半导体层59C的顺序在芯片电极57上层叠p型(第1导电型)半导体层59A、有源层(即，发光层)59B以及n型(第2导电型)半导体层59C而构成半导体结构层59。
从发光层59B射出的出射光的波长为与半导体结构层59的材料以及组成对应的波长。在本实施例中，对发光层59B射出具有深紫外区域的波长的深紫外光的情况进行说明。
元件基板38设置在半导体结构层59上，为蓝宝石、SiC、AlN等对于可见光具有透光性的基板。在本实施例中，对元件基板38使用AlN单晶基板的示例进行说明。
如图16所示，元件基板38、半导体结构层59以及芯片电极57构成半导体芯片60。光半导体元件51是将使半导体结构层59在元件基板38上生长而形成的半导体芯片60反转安装的倒装芯片型的光半导体元件。在光半导体元件51中，来自发光层59B的光从元件基板38的上表面射出。即，元件基板38的上表面构成光出射面。
光半导体元件51经由供电粘接剂61A和61B安装在封装基板22上。通电垫23A和23B设置于封装基板22的安装面，是与外部电路连接的连接电极。在封装基板22上设置有反光体25，光半导体元件51被收纳在空腔26内而被封装。
图17为对图16中的半导体芯片60进行放大并进行上下反转之后的图。在元件基板38上按照n型半导体层59C、有源层59B以及p型半导体层59A的顺序形成n型半导体层59C、有源层59B以及p型半导体层59A。
在n型半导体层59C上的一部分区域形成有n电极层59CL。芯片电极片57B形成在n电极层59CL上。即，芯片电极片57B经由n电极层59CL与n型半导体层59C电连接。
在p型半导体层59A上的一部分区域形成有p电极层59AL。芯片电极片57A形成在p电极层59AL上。即，芯片电极片57A经由p电极层59AL与p型半导体层59A电连接。即，芯片电极片57A和57B为半导体芯片60中的焊盘电极。
图18为示出半导体结构层59的p电极层59AL以及n电极层59CL的俯视图。为了便于说明，在图18中通过虚线示出芯片电极57A以及芯片电极57B的形状以及配置。如图15所示，芯片电极57A包括芯片电极片57A1～57A6。
如图18所示，p电极层59AL在与设置有芯片电极57B的一侧的相反侧的端部具有与芯片电极57A垂直的部分。该垂直的部分将p电极层59AL的沿着芯片电极57A而形成的部分的该相反侧的端部连结起来。因此，p电极层59AL具有将该垂直的部分作为基部，将沿着芯片电极57A形成的部分作为梳齿部的梳齿形状。
此外，n电极层59CL具有从沿着芯片电极57B形成的部分起与芯片电极57A平行地伸展到各芯片电极57A的间隙的部分。因此，n电极层59CL具有将沿芯片电极57B形成的部分作为基部，将伸展到该各芯片电极57A的间隙的部分作为梳齿部的梳齿形状。
由此，p电极层59AL与n电极层59CL采用梳齿结构，能够得到更均匀的电流密度。因此，光半导体元件51具有接合层55延伸到所有的露出面53S的结构，从而能够抑制由空隙等未接合部损害基于该梳齿结构的均匀的电流密度的情况。
如以上所说明，根据本实施例，使用具有梳齿结构的电极层的半导体结构层59，与该梳齿结构对应地设置子安装电极53以及芯片电极57，能够构成在各子安装电极片53A的两端部中，接合层55延伸到露出面53S的光半导体元件51。即，可以采用通过空隙等未接合部少的接合层55将与该梳齿结构对应的芯片电极与子安装电极接合的结构。因此，能够得到更均匀的电流密度，能够提供更长寿命的光半导体元件。此外，能够确保接合层55的平坦性，能够得到如所设计的那样的配光特性以及发光输出。
另外，在上述的实施例中，对芯片电极的缺少规定位置的结构进行了说明，但为了防止未被芯片电极覆盖的部分与导电性的接合层接触而产生短路，也可以设置绝缘性的保护膜。
另外，上述的实施例所示的结构仅为例示，能够根据用途等进行选择、组合以及变更。例如，关于本发明的光半导体元件中使用的子安装电极以及芯片电极的形状、芯片电极缺少的部位的位置等条件，可以根据所使用的半导体芯片种类等适当地进行选择。
如以上所说明，根据本发明，能够提供设置于光半导体芯片侧的电极与设置于子安装件侧的电极之间的未接合部少，散热效率高且长寿命的光半导体元件。此外，能够提供设置于光半导体芯片侧的电极与设置于子安装件侧的电极之间的接合层的平坦性高，能够得到所设计的那样的配光特性以及发光输出的光半导体元件。

Claims (12)

1.一种光半导体元件，其具有：
平板状的子安装件，其具有搭载面；
子安装电极，其设置在所述子安装件的所述搭载面上，作为整体具有矩形形状；以及
半导体芯片，其包括元件基板、形成在所述元件基板上的半导体结构层以及经由接合层与所述子安装电极接合的芯片电极，
所述芯片电极具有缺少与所述子安装电极的四角对应的角部的形状，
所述子安装电极在所述四角具有从所述芯片电极露出的部分即露出面，与所述芯片电极相匹配地接合，
所述接合层延伸到所述四角中的所有角的所述露出面。
2.根据权利要求1所述的光半导体元件，其中，
所述子安装电极具有2个子安装电极片，该2个子安装电极片分别具有矩形形状，且彼此分离地配置，
所述芯片电极具有2个芯片电极片，所述2个芯片电极片具有除了所述子安装电极的所述四角以外，分别与对应的所述子安装电极片匹配的形状以及配置，缺少与所述子安装电极的所述四角对应的角部，
除了所述四角以外，所述2个子安装电极片与所述2个芯片电极片相互匹配地接合。
3.根据权利要求2所述的光半导体元件，其中，
所述2个芯片电极片分别缺少与所述2个子安装电极片各自的四角对应的角部，
所述2个子安装电极片分别在所述各自的四角具有所述露出面，
所述接合层延伸到所述各自的四角中的所有角的所述露出面。
4.根据权利要求1所述的光半导体元件，其中，
所述子安装电极包括第1子安装电极片至第n子安装电极片，所述第1子安装电极片至第n子安装电极片分别具有条纹形状且彼此分离地配置，其中n≥2，
所述芯片电极具有第1芯片电极片至第n芯片电极片，所述第1芯片电极片至第n芯片电极片具有除了所述子安装电极的四角以外，分别与对应的所述子安装电极片匹配的形状以及配置，缺少与所述第1子安装电极片以及第n子安装电极片的两端部对应的端部，
除了所述四角以外，各所述子安装电极片与各所述芯片电极片相互匹配地接合。
5.根据权利要求1所述的光半导体元件，其中，
所述子安装电极包括第1子安装电极片至第n子安装电极片，所述第1子安装电极片至第n子安装电极片分别具有条纹形状且彼此分离地配置，其中n≥2，
所述芯片电极具有第1芯片电极片至第n芯片电极片，所述第1芯片电极片至第n芯片电极片具有除了所述子安装电极片各自的端部以外，分别与对应的所述子安装电极片匹配的形状以及配置，缺少与所述子安装电极片各自的两端部对应的端部，
各所述子安装电极片在所述各自的两端部具有从各所述芯片电极片露出的部分即露出面，
所述接合层延伸到所述子安装电极片各自的所述露出面。
6.根据权利要求4或5所述的光半导体元件，其中，
所述第1子安装电极片至第n子安装电极片的所述条纹形状的长边彼此相互平行地配置，而构成n行的排列，
所述半导体芯片具有与所述第1芯片电极片至第n芯片电极片分离地设置的芯片侧相反电极，
所述子安装件具有子安装件侧相反电极，所述子安装件侧相反电极在所述搭载面上与所述子安装电极分离地设置，经由所述接合层与所述芯片侧相反电极接合。
7.根据权利要求6所述的光半导体元件，其中，
所述半导体结构层包括第1导电型半导体层、有源层以及第2导电型半导体层，
所述第1芯片电极片至第n芯片电极片与所述第1导电型半导体层电连接，
所述第1导电型半导体层具有形成为梳齿状的第1电极层，所述第1电极层由具有与所述第1芯片电极片至第n芯片电极片分别对应的形状以及配置的梳齿部以及将所述梳齿部的单侧的端部连结起来的基部构成，
所述第2导电型半导体层具有形成为梳齿状的第2电极层，所述第2电极层由与所述芯片侧相反电极电连接的基部、以及伸展到所述第1芯片电极片至第n芯片电极片的间隙的梳齿部构成。
8.根据权利要求1至7中的任一项所述的光半导体元件，其中，
所述接合层以覆盖各所述露出面的全体的方式延伸。
9.根据权利要求1至8中的任一项所述的光半导体元件，其中，
所述元件基板对于规定波长的光具有透光性。
10.根据权利要求1至9中的任一项所述的光半导体元件，其中，
所述元件基板对于可见光区域的波长的光具有透光性。
11.一种光半导体元件，其具有：
平板状的子安装件，其具有搭载面；
子安装电极，其设置在所述子安装件的所述搭载面上；
半导体芯片，其包括元件基板、形成在所述元件基板上的半导体结构层、以及芯片电极，所述芯片电极经由接合层与所述子安装电极接合，且作为整体具有矩形形状，
所述子安装电极具有缺少与所述芯片电极的四角对应的角部的形状，
所述芯片电极在所述四角具有从所述子安装电极露出的部分即露出面，与所述子安装电极相匹配地接合，
所述接合层延伸到所述四角中的所有角的所述露出面。
12.根据权利要求11所述的光半导体元件，其中，
所述子安装件对于规定波长的光具有透光性。
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