CN110634753B - Method for welding chip with radiator and PCB assembly - Google Patents
Method for welding chip with radiator and PCB assembly Download PDFInfo
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- CN110634753B CN110634753B CN201910908475.3A CN201910908475A CN110634753B CN 110634753 B CN110634753 B CN 110634753B CN 201910908475 A CN201910908475 A CN 201910908475A CN 110634753 B CN110634753 B CN 110634753B
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- 238000003466 welding Methods 0.000 title claims abstract description 49
- 238000000034 method Methods 0.000 title claims abstract description 41
- 229910000679 solder Inorganic materials 0.000 claims abstract description 149
- 229910000831 Steel Inorganic materials 0.000 claims abstract description 55
- 239000010959 steel Substances 0.000 claims abstract description 55
- 238000005476 soldering Methods 0.000 claims abstract description 46
- 239000002184 metal Substances 0.000 claims abstract description 32
- 238000003825 pressing Methods 0.000 claims abstract description 14
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 13
- 238000000576 coating method Methods 0.000 claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 claims abstract description 10
- 238000007747 plating Methods 0.000 claims description 20
- 238000009826 distribution Methods 0.000 claims description 12
- 229910003460 diamond Inorganic materials 0.000 claims description 10
- 239000010432 diamond Substances 0.000 claims description 10
- 230000001680 brushing effect Effects 0.000 claims description 5
- 238000001465 metallisation Methods 0.000 claims description 5
- 230000017525 heat dissipation Effects 0.000 description 9
- 238000009434 installation Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 230000004907 flux Effects 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- IYZWUWBAFUBNCH-UHFFFAOYSA-N 2,6-dichlorobiphenyl Chemical compound ClC1=CC=CC(Cl)=C1C1=CC=CC=C1 IYZWUWBAFUBNCH-UHFFFAOYSA-N 0.000 description 1
- NMWSKOLWZZWHPL-UHFFFAOYSA-N 3-chlorobiphenyl Chemical compound ClC1=CC=CC(C=2C=CC=CC=2)=C1 NMWSKOLWZZWHPL-UHFFFAOYSA-N 0.000 description 1
- 101001082832 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) Pyruvate carboxylase 2 Proteins 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The embodiment of the application provides a method for welding a heat radiator on a chip and a PCB assembly, which can fix the heat radiator on the chip based on a steel mesh printing mode and do not limit the height of devices around the chip. The method for welding the chip with the radiator comprises the following steps: manufacturing a tin paste layer on the welding surfaces of the radiators on the basis of the first steel mesh; and pressing the radiators onto the back metal coatings of the chips through the solder paste layer, and performing reflow soldering, wherein the radiators correspond to the chips one by one, and the chips are connected in series to supply power to a circuit board.
Description
Technical Field
The embodiment of the application relates to the technical field of chips, in particular to a method for welding a heat radiator on a chip and a PCB assembly.
Background
In order to solve the heat dissipation problem of the chip, a back metal plating layer is generally formed on the back of the chip through a back Metallization (BSM) process, and a solder paste is applied to the back metal plating layer of the chip to solder a heat sink, so as to achieve heat dissipation of the chip. However, this method of soldering a heat sink is only suitable for single chip soldering on a Printed Circuit Board (PCB), and when there are a plurality of chips on the PCB, it is required that there are devices higher than the chips within a certain range around the chips if the solder paste is directly applied, because if there are devices higher than the chips, the solder paste is not applied to the metal plating layer of the chips or the solder paste is not applied to the high devices. The current method is that if devices higher than the height of a chip are arranged around the chip, the chips need to be manually brushed with solder paste one by one for welding, especially on a large-computation force server, dozens of chips are arranged on each PCB, if the chips are manually brushed with solder paste one by one for welding, the welding efficiency of a radiator on the surfaces of the chips is limited, and the installation difficulty and the installation cost of the radiator are increased.
Disclosure of Invention
The embodiment of the application provides a method for welding a heat radiator on a chip and a PCB assembly, which can improve the welding efficiency of the heat radiator on the surface of the chip and do not limit the height of a heat radiator of a device around the chip.
In a first aspect, a method for soldering a heat sink to a chip is provided, which includes
Manufacturing a tin paste layer on the welding surfaces of the radiators on the basis of the first steel mesh;
and pressing the radiators onto the back metal coatings of the chips through the solder paste layer, and performing reflow soldering, wherein the radiators correspond to the chips one by one, and the chips are connected in series to supply power to a circuit board.
The above manner of respectively manufacturing the solder paste layers on the soldering surfaces of the plurality of radiators based on the first steel mesh can make the solder paste layers manufactured on the soldering surfaces of the plurality of radiators have characteristics of smoothness, uniformity and the like, so that the soldering quality of the radiators can be improved.
Alternatively, the circuit board may be referred to as a force computation board. For example, the circuit board is a PCB board.
Alternatively, a chip of the plurality of chips may be referred to as a compute processor chip or a computational chip, such as a Central Processing Unit (CPU) chip, a Graphics Processing Unit (GPU) chip, or the like.
In some possible implementations, the fabricating a solder paste layer on the bonding surfaces of the plurality of heat sinks based on the first steel mesh includes:
fixing the radiators on a platform;
fixing the first steel mesh above the welding surfaces of the radiators, wherein the welding surfaces of the radiators are opposite to the windows of the first steel mesh;
brushing solder paste on the windowing area of the first steel mesh to manufacture solder paste layers on the welding surfaces of the radiators;
the first steel mesh is removed.
It should be noted that, after the first steel net is fixed above the bonding surfaces of the plurality of heat sinks, the fixing can be flexibly released, that is, after the solder paste is applied to the windowing area of the first steel net, the first steel net can be flexibly removed.
In some possible implementations, the heat sinks are fixed as a whole structure, and the distribution of the heat sinks is determined by the distribution of the chips.
Optionally, the plurality of heat sinks may be secured as a unitary structure by at least one of: screw fixation mode, buckle fixation mode, glue material laminating fixation mode, steel mesh fixation mode.
In some possible implementations, the pressing the plurality of heat spreaders onto the back metallization of the plurality of chips through the solder paste layer includes:
and pressing the plurality of radiators as a whole onto the back metal plating layers of the plurality of chips through the tin paste layer.
It should be noted that the plurality of heat sinks are fixed to form an integral structure, so that the plurality of heat sinks can be pressed onto the back metal coatings of the plurality of chips through the solder paste layer as a whole, and the welding efficiency of the heat sinks on the surfaces of the chips is further improved.
In some possible implementations, the plurality of heat sinks are respectively fixed on the platform.
In some possible implementations, the pressing the plurality of heat spreaders onto the back metallization of the plurality of chips through the solder paste layer includes:
and pressing the radiators to the back metal coatings of the chips through the solder paste layers respectively.
The plurality of heat sinks are respectively pressed onto the back metal plating layers of the plurality of chips through the solder paste layers, so that the welding quality of each heat sink on the surface of each chip can be ensured.
In some possible implementations, the heat sink is shrunk with a boss structure near its lower surface, the boss structure comprising the soldering surface of the heat sink.
It should be noted that the boss structure can facilitate the arrangement of the soldering surface on the heat sink, so as to solder the heat sink to the plurality of chips.
It should be understood that the heat sink may also have some design for facilitating heat dissipation in order to improve heat dissipation efficiency, which is not limited in the present application.
In some possible implementations, the surface area of the bonding surface of the heat spreader is less than or equal to the surface area of the back metal plating of the corresponding chip of the heat spreader.
The surface area of the bonding surface of the heat sink is smaller than or equal to the surface area of the back metal plating layer of the chip corresponding to the heat sink, so that the influence of the arrangement of the heat sink on other devices around the chip corresponding to the heat sink can be avoided.
In some possible implementations, the solder paste layer occupies a partial area of the soldering surface of the heat spreader.
The solder paste layer occupies a partial area of the soldering surface of the heat sink, so that the solder paste residue can be reduced while the soldering quality of the heat sink is ensured, and the negative effect of the residual solder paste on the chip after soldering is reduced.
In some possible implementations, the solder paste layer occupies 40% to 60% of the area of the soldering surface of the heat spreader.
For example, the solder paste layer occupies 43% of the area of the bonding surface of the heat spreader.
In some possible implementations, the solder paste layer of each of the plurality of heat spreaders includes a plurality of solder paste regions that are separated from each other.
The solder paste layer comprises a plurality of solder paste areas separated from each other, so that solder paste residues can be reduced while the soldering quality of the radiator is ensured.
In some possible implementations, a spacing between adjacent ones of the plurality of solder paste regions is less than a first threshold.
In some possible implementations, a spacing between adjacent ones of the plurality of solder paste regions ranges from 0.1mm to 0.6 mm.
For example, the spacing between adjacent ones of the plurality of solder paste regions is 0.4 mm.
In some possible implementations, the areas of the plurality of solder paste regions are the same, and the plurality of solder paste regions are distributed in an array.
In some possible implementations, the plurality of solder paste areas are one of square, rectangular, and diamond in shape.
In some possible implementations, the plurality of solder paste regions includes a first solder paste region and a second solder paste region, the second solder paste region surrounding the first solder paste region.
In some possible implementations, the first solder paste area is one of square, rectangular, and diamond in shape, and the second solder paste area is a square in shape.
In some possible implementations, the first steel mesh includes a plurality of fenestrations that are separated from one another.
It should be noted that the first steel mesh includes a plurality of windows separated from each other, so that the solder paste layer printed on the soldering surface of the heat sink can include a plurality of solder paste areas separated from each other, that is, the plurality of windows and the plurality of solder paste areas correspond to each other one to one.
In some possible implementations, the spacing between adjacent ones of the plurality of windows is a second threshold.
In some possible implementations, a spacing between adjacent ones of the plurality of windows ranges from 0.1mm to 0.6 mm.
For example, the spacing between adjacent ones of the plurality of windows is 0.4 mm.
In some possible implementations, the areas of the plurality of windows are the same, and the plurality of windows are distributed in an array.
In some possible implementations, the number of windows of the plurality of windows ranges from 4 to 16.
For example, the plurality of windows has a window number in the range of 6.
In some possible implementations, the plurality of fenestrations is one of square, rectangular, and diamond in shape.
In some possible implementations, the plurality of fenestrations includes a first fenestration and a second fenestration, the second fenestration surrounding the first fenestration.
In some possible implementations, the first fenestration is one of square, rectangular, and diamond in shape, and the second fenestration is a zigzag in shape.
In some possible implementations, the first steel mesh has a thickness in a range of 0.08mm to 0.16 mm.
For example, the thickness of the first steel net is 0.12 mm.
In some possible implementations, the plurality of chips have the same size and/or structure, and the plurality of chips are distributed in an array on the circuit board.
For example, each of the plurality of chips has a size of 8 × 8mm and a thickness of 0.6 mm.
In some possible implementations, a chip of the plurality of chips is an Application Specific Integrated Circuit (ASIC) chip or a non-ASIC chip.
In a second aspect, there is provided a PCB board assembly comprising
The heat radiators correspond to the chips one by one, and the chips are connected in series to supply power to a PCB;
wherein the plurality of heat sinks are respectively soldered onto the plurality of chips by the method of the first aspect or any possible implementation manner of the first aspect.
In some possible implementations, the plurality of chips have the same size and/or structure, and the plurality of chips are distributed in an array on the circuit board.
In some possible implementations, the chips of the plurality of chips are application specific integrated circuit chips or non-application specific integrated circuit chips.
In the embodiment of the application, the plurality of radiators can be welded on the back metal coatings of the plurality of chips based on a steel mesh printing mode, the welding efficiency of the radiators on the surfaces of the chips can be improved, and the height of devices around the chips is not limited.
Drawings
Fig. 1 is a schematic structural diagram of a heat sink soldered on a chip according to the present application.
Fig. 2 is a schematic flow chart of a method of die bonding a heat spreader in accordance with an embodiment of the present application.
Fig. 3 is a schematic distribution diagram of a chip and a heat spreader according to an embodiment of the present application.
Fig. 4 is a schematic diagram of another distribution of chips and heat spreaders according to an embodiment of the present application.
Fig. 5 is a schematic structural view of a heat sink soldered on a chip according to an embodiment of the present application.
Fig. 6 is a schematic structural view of another heat sink according to an embodiment of the present application soldered on a chip.
Fig. 7 is a schematic view of a solder paste layer according to an embodiment of the present application.
Fig. 8 is a schematic view of another solder paste layer according to an embodiment of the present application.
Fig. 9 is a schematic view of yet another solder paste layer according to an embodiment of the present application.
Fig. 10 is a schematic view of yet another solder paste layer according to an embodiment of the present application.
Fig. 11 is a schematic structural view of a PCB board assembly according to an embodiment of the present application.
Fig. 12 is a schematic diagram of a PCB board assembly according to an embodiment of the present application.
Detailed Description
The technical solution in the present application will be described below with reference to the accompanying drawings.
With the application of high power chips (e.g., ASIC chips), the problem of chip heating is receiving more and more attention. For high power ASIC chips, a leaky chip (die) is often used in combination with a backside BSM packaging process. As shown in fig. 1, the ASIC chip 1 is disposed on the PCB 2, and the heat sink 3 is solder-pasted to be soldered to the back metal plating of the ASIC chip 1. To a certain extent around the ASIC chips 1, there cannot be components that are higher than the ASIC chips 1, which might otherwise damage the components around these ASIC chips 1, for example by scratching or breaking the components around these ASIC chips 1. Therefore, welding of the radiator on the surface of the chip is limited, and the installation difficulty and the installation cost of the radiator are increased.
In view of the above problems, the present application provides a new method for bonding a heat sink to a chip, which can bond a plurality of heat sinks to a back metal plating layer of a plurality of chips without limiting the height of devices around the chips.
The method 200 for die bonding a heat sink and the PCB assembly 300 according to the embodiment of the present application are described in detail below with reference to fig. 2 to 12. It should be noted that, for convenience of description, the same reference numerals are used to designate the same components in the embodiments of the present application, and detailed description of the same components is omitted in different embodiments for the sake of brevity.
Fig. 2 is a schematic flow chart diagram of a method 200 of die bonding a heat spreader in an embodiment of the present application.
S210, manufacturing a solder paste layer on the welding surfaces of the radiators based on the first steel mesh;
and S220, pressing the radiators to the back metal coatings of the chips through the solder paste layer, and performing reflow soldering, wherein the radiators correspond to the chips one by one, and the chips are connected in series to supply power to a circuit board.
It should be appreciated that the method 200 of die bonding a heat spreader may be performed by a bonding apparatus. Specifically, the welding equipment is used for manufacturing a tin paste layer on the welding surfaces of a plurality of radiators on the basis of a first steel mesh; and the welding equipment presses the radiators to the back metal coatings of the chips through the tin paste layer and performs reflow welding.
It should be noted that, the above-mentioned tin paste layer is made on the welding surfaces of a plurality of radiators based on the first steel mesh, the tin paste can be brushed on the welding surfaces of a plurality of radiators simultaneously, and the tin paste layer made on the welding surfaces of a plurality of radiators has the characteristics of smoothness, uniformity and the like, so as to improve the welding quality of the radiators.
Furthermore, as the solder paste can be brushed on the welding surfaces of the radiators at the same time, the efficiency of brushing the solder paste can be improved, and the welding efficiency of the radiators on the surfaces of the chips can be improved.
Optionally, a chip of the plurality of chips is an ASIC chip or a non-application specific integrated circuit chip.
In the embodiment of the present application, a chip of the plurality of chips may be referred to as a computation processor chip or a computation chip, for example, a CPU chip, a GPU chip, or the like.
Optionally, in this embodiment of the present application, the plurality of chips are fixed on the circuit board, and the plurality of chips are connected in series to supply power to the circuit board.
Alternatively, the circuit board may be referred to as a force computation board. For example, the circuit board is a PCB board.
That is to say, in the embodiment of the present application, a plurality of computing processor chips (computation power chips) with identical structures are often densely arranged on one PCB (computation power board), and in these computing processor chips, at least two chips are often connected in series.
Optionally, other chips or some other devices, such as a capacitor, may also be disposed on this PCB, which is not limited in this embodiment.
Alternatively, the method 200 for die bonding a heat spreader may specifically include the following steps 1a-1f, it being understood that steps 1a-1f are a refinement of steps S210 and S220 described above.
1a, fixing the radiators as an integral structure on a platform;
1b, fixing the first steel mesh above the welding surfaces of the radiators, wherein the welding surfaces of the radiators are opposite to the windows of the first steel mesh;
1c, brushing solder paste on the windowing area of the first steel mesh to manufacture a solder paste layer on the welding surfaces of the radiators;
1d, removing the first steel mesh;
1e, pressing the radiators as a whole onto the back metal coatings of the chips through the solder paste layer to obtain a component to be welded;
and 1f, performing reflow soldering on the component to be soldered.
It should be noted that the soldering surfaces of the plurality of radiators are right opposite to the windows of the first steel mesh, so that the tin paste can be accurately brushed to the soldering surfaces of the plurality of radiators through the windows of the first steel mesh.
Optionally, in the embodiment of the present application, the plurality of chips may have the same size and/or structure, and the plurality of chips are distributed in an array on the circuit board.
Optionally, in a case where the heat sinks are fixed as an integral structure, the distribution of the heat sinks is determined by the distribution of the chips. In other words, the distribution of the heat sinks is consistent with that of the chips, so that the heat sinks are pressed onto the back metal coatings of the chips through the solder paste layers.
For example, as shown in fig. 3, 18 chips are fixed on the circuit board in an array (top view), the 18 chips correspond to 18 heat sinks, the 18 heat sinks are also in an array (top view), the 18 heat sinks are distributed in a manner consistent with the 18 chips, and the 18 heat sinks are connected to each other to form an integral structure, so that the 18 heat sinks are pressed onto the back metal plating layers of the 18 chips through the solder paste layers.
For another example, as shown in fig. 4, 12 chips (top view) are fixed on the circuit board, the 12 chips correspond to 12 heat sinks respectively, the distribution manner of the 12 heat sinks (top view) is consistent with the distribution manner of the 12 chips, and the 12 heat sinks are connected with each other to form an integral structure, so that the whole 12 heat sinks are pressed onto the back metal plating layers of the 12 chips through the solder paste layers.
It should be understood that fig. 3 and 4 are only schematic, and the number and distribution of the chips and heat sinks are not limiting to the present application.
Optionally, the plurality of heat sinks may be secured as a unitary structure by at least one of: screw fixation, buckle fixation, glue material joint fixation, steel mesh fixation, etc.
It should be noted that, after the first steel net is fixed above the bonding surfaces of the plurality of heat sinks, the fixing can be flexibly released, that is, after the solder paste is applied to the windowing area of the first steel net, the first steel net can be flexibly removed.
Optionally, the method 200 for die bonding a heat sink may specifically include the following steps 2a-2f, and it should be understood that the steps 2a-2f are a refinement of the steps S210 and S220.
2a, fixing the plurality of heat sinks on a platform respectively, for example, the plurality of heat sinks can be fixed on a platform respectively through second steel nets which can contain the heat sinks in the same way as the chip array;
2b, fixing the first steel mesh above the welding surfaces of the radiators, wherein the welding surfaces of the radiators are opposite to the windows of the first steel mesh;
2c, brushing solder paste on the windowing area of the first steel mesh to manufacture a solder paste layer on the welding surfaces of the radiators;
2d, removing the first steel mesh;
2e, respectively pressing the radiators onto the back metal coatings of the chips through the solder paste layers to obtain components to be welded;
and 2f, carrying out reflow soldering on the component to be soldered.
It should be noted that the soldering surfaces of the plurality of radiators are right opposite to the windows of the first steel mesh, so that the tin paste can be accurately brushed to the soldering surfaces of the plurality of radiators through the windows of the first steel mesh.
The window-opening mode of the second steel mesh may be the same as or different from the window-opening mode of the first steel mesh, and the present application does not limit this.
In the above steps 2a to 2f, the plurality of heat spreaders may be respectively pressed onto the back metal plating layers of the plurality of chips through the solder paste layer, so that the soldering quality of each heat spreader on the chip surface may be ensured.
It should be noted that the above steps 2a to 2f are different from the above steps 1a to 1f in that the plurality of heat sinks are respectively fixed on a platform, that is, each heat sink of the plurality of heat sinks is fixed on a platform as an independent unit, and each heat sink of the plurality of heat sinks is pressed onto the back metal plating layer of the plurality of chips one by one through the corresponding solder paste layer.
Optionally, in the embodiment of the present application, each of the plurality of chips has a size of 8 × 8mm, and a thickness of 0.6 mm.
Optionally, in the embodiment of the present application, the heat sink is shrunk and formed with a boss structure near the lower surface thereof, and the boss structure includes the welding surface of the heat sink.
For example, as shown in fig. 5, the chip 20 is disposed on the upper surface of the circuit board 10, and the heat sink 30 is soldered to the back metal plating layer of the chip 20. As shown in fig. 5, the heat sink 30 is shrunk with a boss structure 31 near its lower surface.
It should be noted that the bump structure 31 can facilitate providing a bonding surface on the heat sink 30, for example, as shown in fig. 5, a bonding surface can be provided on the lower surface of the bump structure 31, so as to bond the heat sink 30 on the plurality of chips 20.
Alternatively, in order to improve the heat dissipation efficiency, the heat sink 30 may also have some designs for facilitating heat dissipation, for example, as shown in fig. 5, the heat sink 30 includes a plurality of fin structures 32 to increase the heat dissipation area of the heat sink 30.
Optionally, to facilitate the installation of the heat sink 30 or to support some devices above the heat sink 30, as shown in fig. 6, the heat sink 30 includes a plurality of fins 32 to increase the heat dissipation area of the heat sink 30, and the heat sink 30 further includes a bracket 33 to facilitate the installation of the heat sink 30 or to support some devices above the heat sink 30.
Optionally, in this embodiment of the present application, a surface area of the bonding surface of the heat spreader is smaller than or equal to a surface area of the back metal plating layer of the chip corresponding to the heat spreader. For example, as shown in fig. 5 or fig. 6, the surface area of the bonding surface of the heat spreader 30 is equal to the surface area of the back metal plating of the chip 20 corresponding to the heat spreader 30.
The surface area of the bonding surface of the heat sink is smaller than or equal to the surface area of the back metal plating layer of the chip corresponding to the heat sink, so that the influence of the arrangement of the heat sink on other devices around the chip corresponding to the heat sink can be avoided.
Optionally, in the embodiment of the present application, for any one of the heat sinks, the solder paste layer may occupy part or all of the bonding surface of the heat sink.
Specifically, the solder paste layer can occupy part or all of the bonding surface of the heat sink through the control or design of the windowing of the first steel mesh.
In the case where the solder paste layer occupies the entire area of the soldering surface of the heat sink, that is, the solder paste layer is entirely applied to the soldering surface of the heat sink, and after reflow soldering, the soldering surface of the heat sink and the back surface metal plating surface of the chip are completely bonded to each other, whereby the heat dissipation efficiency can be improved. Under the condition that the solder paste layer occupies a partial area of the welding surface of the radiator, the welding quality of the radiator is ensured, and meanwhile, the residual solder paste can be reduced, so that the negative influence of the residual solder paste after welding on a chip is reduced.
Alternatively, in the case where the solder paste layer occupies a partial area of the soldering surface of the heat spreader, for example, the solder paste layer may occupy 40% to 60% of the area of the soldering surface of the heat spreader.
For example, the solder paste layer occupies 43% of the area of the bonding surface of the heat spreader.
Alternatively, in the embodiment of the present application, for any one of the heat sinks, the solder paste layer may be an entire solder paste region, or may include a plurality of solder paste regions separated from each other.
The solder paste layer comprises a plurality of solder paste areas which are separated from each other, so that the volatilization of soldering flux in the solder paste in a high-temperature environment is facilitated during soldering, and the solder paste residue can be reduced while the soldering quality of the radiator is ensured.
Optionally, a spacing between adjacent ones of the plurality of solder paste regions is less than a first threshold.
It should be noted that, the interval between adjacent solder paste areas in the plurality of solder paste areas is smaller than the first threshold, which is beneficial to volatilization of the soldering flux in the solder paste in a high-temperature environment during soldering, reduces bubbles generated in the soldering process, and improves the soldering strength.
Optionally, the spacing between adjacent ones of the plurality of solder paste regions ranges from 0.1mm to 0.6 mm.
For example, the spacing between adjacent ones of the plurality of solder paste regions is 0.4 mm.
Optionally, the areas of the plurality of solder paste regions may be the same or different, and the plurality of solder paste regions are distributed in an array.
For example, the plurality of solder paste areas may have a shape including one of a square, a rectangle, and a diamond.
For example, as shown in fig. 7, the solder paste layer includes 6 rectangular solder paste regions, the 6 solder paste regions have the same area, and the 6 solder paste regions are distributed in an array.
For another example, as shown in fig. 8, the solder paste layer includes 13 diamond-shaped solder paste regions, the 13 solder paste regions have the same area, and the 13 solder paste regions are distributed in an array.
Optionally, the plurality of solder paste areas includes a first solder paste area and a second solder paste area, the second solder paste area surrounding the first solder paste area.
For example, the first solder paste area is one of a square, a rectangle and a diamond, and the second solder paste area is a square.
For example, as shown in fig. 9, the first solder paste area a has a rectangular shape, the second solder paste area B has a rectangular shape, and the second solder paste area B surrounds the first solder paste area a.
The second solder paste region may be provided in a plurality outside the first solder paste region. For example, as shown in fig. 10, the first solder paste area a has a rectangular shape, the second solder paste area B and the third solder paste area C have a rectangular shape, the second solder paste area B surrounds the first solder paste area a, and the third solder paste area C surrounds the second solder paste area B.
Optionally, in an embodiment of the present application, the first steel mesh includes a plurality of windows separated from each other.
In the embodiment of the present application, the correspondence between the plurality of windows of the first steel net and the welding surfaces of the plurality of heat sinks may include one or more of the following manners.
In the first mode, the windows of the first steel mesh correspond to the welding surfaces of the radiators one by one.
In a second mode, the welding surfaces of the plurality of windows of the first steel mesh and the plurality of radiators satisfy a many-to-one correspondence relationship.
In the first embodiment, the solder paste layer formed on the soldering surface of the heat spreader is an integral body; in the second aspect, the solder paste layer formed on the bonding surface of the heat spreader may include a plurality of solder paste regions separated from each other.
Optionally, a spacing between adjacent ones of the plurality of windows is less than a second threshold.
Optionally, the interval between adjacent windows in the plurality of windows ranges from 0.1mm to 0.6 mm.
For example, the spacing between adjacent ones of the plurality of windows is 0.4 mm.
Optionally, the areas of the multiple windows may be the same or different, and the multiple windows are distributed in an array.
Optionally, the number of the plurality of windows ranges from 4 to 16.
For example, the plurality of windows has a window number in the range of 6.
Optionally, the plurality of fenestrations comprises at least one of a square, a rectangle, and a diamond shape.
It should be noted that, in the case that the areas of the plurality of windows are the same and the plurality of windows are distributed in an array, the arrangement of the plurality of windows may refer to the arrangement of the plurality of solder paste regions in fig. 7 or fig. 8, and for brevity, no further description is provided here.
Optionally, the plurality of fenestrations includes a first fenestration and a second fenestration, the second fenestration surrounding the first fenestration.
Optionally, the first window has a shape of one of a square, a rectangle, and a diamond, and the second window has a shape of a square.
It should be noted that, in the case that the plurality of windows include a first window and a second window, and the second window surrounds the first window, the setting of the plurality of windows may refer to the setting of the plurality of solder paste regions in fig. 9, and for brevity, no further description is given here.
It should be noted that a plurality of second windows may be provided outside the first window. Specifically, reference may be made to the arrangement of the plurality of solder paste regions in fig. 10, and for brevity, no further description is provided here.
Optionally, in the embodiment of the present application, the thickness of the first steel net ranges from 0.08mm to 0.16 mm.
For example, the thickness of the first steel net is 0.12 mm.
The solder paste used in the embodiment of the application can be conventional solder paste or lead-free solder paste.
The heat spreader described in the embodiment of the present application may also be some other components, such as a supporting member, and the method 200 for soldering the heat spreader to the chip may be referred to for the soldering manner between these components and the chip, which is not described herein again for brevity.
It should be noted that, in the embodiment of the present application, the reflow soldering in step S220 may be performed in a soldering furnace by using a thermal reflow method in a vacuum environment.
In this embodiment of the application, after the step S220 is performed, steps such as cleaning, plastic packaging, and the like may also be performed, which is not limited in this application.
The embodiment of the present application further provides a PCB assembly 300, as shown in fig. 11, the PCB assembly 300 includes a plurality of heat sinks 30, a plurality of chips 20 and a PCB 10, the plurality of heat sinks 30 correspond to the plurality of chips 20 one by one, and the plurality of chips 20 are connected in series to supply power to a circuit board 10; the plurality of heat sinks 30 are respectively soldered on the plurality of chips 20 by the above method 200 for die-soldering heat sinks, and the specific structure of the PCB assembly 300 can be as shown in fig. 12.
It should be noted that fig. 12 is a front view of the PCB assembly 300, and fig. 12 is only a schematic view of the PCB assembly 300, and the number of the heat sinks 30 and the chips 20 is not limited.
Optionally, the plurality of chips 20 have the same size and/or structure, and the plurality of chips 20 are distributed in an array on the circuit board 10.
Optionally, the chips in the plurality of chips 20 are application specific integrated circuit chips or non-application specific integrated circuit chips.
It should be understood that the specific examples in the embodiments of the present application are for the purpose of promoting a better understanding of the embodiments of the present application and are not intended to limit the scope of the embodiments of the present application.
It is to be understood that the terminology used in the embodiments of the present application and the appended claims is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the present application. For example, as used in the examples of this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
Those of ordinary skill in the art will appreciate that the elements of the examples described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described above generally in terms of their functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
A person skilled in the art realizes that the preferred embodiments of the present application have been described in detail above with reference to the accompanying drawings, but the present application is not limited to the details of the above embodiments, and that within the scope of the technical idea of the present application, many simple modifications may be made to the technical solution of the present application, and that these simple modifications all belong to the protection scope of the present application.
It should be noted that, in the foregoing embodiments, various features described in the above embodiments may be combined in any suitable manner, and in order to avoid unnecessary repetition, various possible combinations are not described in the present application.
In addition, any combination of the various embodiments of the present application is also possible, and the same shall be considered as what is applied to the present application as long as it does not depart from the idea of the present application.
While the invention has been described with reference to specific embodiments, the scope of the invention is not limited thereto, and those skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the invention. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (20)
1. A method of die bonding a heat sink, comprising:
manufacturing tin paste layers on the welding surfaces of the radiators on the basis of the first steel mesh, wherein the tin paste layers account for 40% -60% of the area of the welding surfaces of the radiators;
pressing the radiators onto back metal coatings of the chips through the solder paste layer, and performing reflow soldering, wherein the radiators correspond to the chips one by one, and the chips are connected in series to supply power to a circuit board;
the surface area of the welding surface of the radiator is smaller than or equal to the surface area of the back metal plating layer of the chip corresponding to the radiator.
2. The method of claim 1, wherein the fabricating a layer of solder paste on the bonding surfaces of the plurality of heat sinks based on the first steel mesh comprises:
fixing the radiators on a platform;
fixing the first steel mesh above the welding surfaces of the radiators, wherein the welding surfaces of the radiators are opposite to the windows of the first steel mesh;
brushing solder paste on the windowing area of the first steel mesh to manufacture a solder paste layer on the welding surfaces of the radiators;
removing the first steel mesh.
3. The method of claim 2, wherein the heat sinks are fixed as a unitary structure, and the distribution of the heat sinks is determined by the distribution of the chips.
4. The method of claim 3, wherein said pressing the plurality of heat spreaders through the solder paste layer onto the back metallization of the plurality of chips comprises:
and pressing the radiators as a whole onto the back metal plating layers of the chips through the tin paste layer.
5. The method of claim 2, wherein each of the plurality of heat sinks is secured to the platform.
6. The method of claim 5, wherein said pressing the plurality of heat spreaders through the solder paste layer onto the back metallization of the plurality of chips comprises:
and pressing the radiators to the back metal coatings of the chips through the solder paste layers respectively.
7. A method according to any of claims 1 to 6, wherein the heat sink is shrunk with a boss structure near its lower surface, the boss structure comprising a soldering surface of the heat sink.
8. The method of any of claims 1-6, wherein the solder paste layer of each of the plurality of heat spreaders comprises a plurality of solder paste regions, and a spacing between adjacent ones of the plurality of solder paste regions ranges from 0.1mm to 0.6 mm.
9. The method of claim 8, wherein the plurality of solder paste areas are one of square, rectangular, and diamond in shape.
10. The method of claim 8, wherein the plurality of solder paste areas includes a first solder paste area and a second solder paste area, the second solder paste area surrounding the first solder paste area.
11. The method of claim 10, wherein the first solder paste area is one of square, rectangular, and diamond in shape, and the second solder paste area is a chevron in shape.
12. The method of any one of claims 1 to 6, wherein the first steel mesh comprises a plurality of fenestrations that are separated from one another.
13. The method of claim 12, wherein a spacing between adjacent ones of the plurality of fenestrations is in a range of 0.1mm to 0.6 mm.
14. The method of claim 12, wherein the plurality of windows have the same area and are distributed in an array.
15. The method of claim 12, wherein the plurality of windows has a number of windows in a range of 4 to 16.
16. The method according to any one of claims 1 to 6, wherein the thickness of the first steel mesh is in the range of 0.08mm to 0.16 mm.
17. The method of any one of claims 1 to 6, wherein the plurality of chips have the same size and/or structure and are distributed in an array on the circuit board.
18. The method of any of claims 1 to 6, wherein a chip of the plurality of chips is an application specific integrated circuit chip or a non-application specific integrated circuit chip.
19. A PCB board assembly, comprising:
the heat radiator comprises a plurality of heat radiators and a plurality of chips, wherein the heat radiators correspond to the chips one by one, and the chips are connected in series to supply power to a Printed Circuit Board (PCB);
wherein the plurality of heat sinks are soldered to the plurality of chips by the method of any one of claims 1 to 16.
20. The PCB assembly of claim 19, wherein the plurality of chips have the same size and/or configuration, and the plurality of chips are distributed in an array on the circuit board.
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| CN201910908475.3A CN110634753B (en) | 2019-09-25 | 2019-09-25 | Method for welding chip with radiator and PCB assembly |
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| CN201910908475.3A CN110634753B (en) | 2019-09-25 | 2019-09-25 | Method for welding chip with radiator and PCB assembly |
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| CN110634753B true CN110634753B (en) | 2021-07-23 |
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| CN101576238A (en) * | 2008-09-02 | 2009-11-11 | 陈立有 | Method and equipment for welding LED lamp bead |
| CN102157389A (en) * | 2011-01-18 | 2011-08-17 | 武汉正维电子技术有限公司 | Method for assembling radio-frequency power field effect transistor |
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| US5291064A (en) * | 1991-04-16 | 1994-03-01 | Nec Corporation | Package structure for semiconductor device having a flexible wiring circuit member spaced from the package casing |
| US5396403A (en) * | 1993-07-06 | 1995-03-07 | Hewlett-Packard Company | Heat sink assembly with thermally-conductive plate for a plurality of integrated circuits on a substrate |
| JP3186350B2 (en) * | 1993-07-09 | 2001-07-11 | 松下電器産業株式会社 | Solder bump forming method and bumped electronic component |
| US5416046A (en) * | 1994-01-18 | 1995-05-16 | Wang; Ping-Lung | Method for making semiconductor heat-cooling device having a supporting mesh |
| JPH08162575A (en) * | 1994-12-07 | 1996-06-21 | Hitachi Ltd | Semiconductor device and its manufacture |
| JPH0945827A (en) * | 1995-08-02 | 1997-02-14 | Hitachi Ltd | Semiconductor device |
| US5988487A (en) * | 1997-05-27 | 1999-11-23 | Fujitsu Limited | Captured-cell solder printing and reflow methods |
| JP2001168402A (en) * | 1999-12-03 | 2001-06-22 | Aisin Seiki Co Ltd | Method for soldering thermoelectric semiconductor chip with electrode and thermoelectric semiconductor module |
| US20110079814A1 (en) * | 2009-10-01 | 2011-04-07 | Yi-Chang Chen | Light emitted diode substrate and method for producing the same |
| CN201741694U (en) * | 2010-01-07 | 2011-02-09 | 林礼裕 | Ceramic radiator |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101576238A (en) * | 2008-09-02 | 2009-11-11 | 陈立有 | Method and equipment for welding LED lamp bead |
| CN102157389A (en) * | 2011-01-18 | 2011-08-17 | 武汉正维电子技术有限公司 | Method for assembling radio-frequency power field effect transistor |
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