CN110504312A - A kind of transversal I GBT with short-circuit self-shield ability - Google Patents
A kind of transversal I GBT with short-circuit self-shield ability Download PDFInfo
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- CN110504312A CN110504312A CN201910806766.1A CN201910806766A CN110504312A CN 110504312 A CN110504312 A CN 110504312A CN 201910806766 A CN201910806766 A CN 201910806766A CN 110504312 A CN110504312 A CN 110504312A
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- 229910052737 gold Inorganic materials 0.000 claims description 2
- 238000011982 device technology Methods 0.000 abstract description 2
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- 238000004891 communication Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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Abstract
The invention belongs to power semiconductor device technology fields, are related to a kind of transversal I GBT with short-circuit self-shield ability.A kind of transversal I GBT structure with short-circuit self-shield ability proposed by the present invention, by integrating a PMOS structure and NMOS structure on the basis of conventional IGBT structure, cooperate the use of diode and resistance simultaneously, a short-circuit self-protection circuit be may be constructed to protect IGBT device, when short circuit occurs for IGBT, the protection circuit to form a low impedance path between IGBT gate electrode and emitter so that under pressure drop future on gate electrode, so that short circuit current declines, device is avoided to fail because short circuit occurs, and the short-circuit protection mode is simple and efficient, integrated level is very high, it is small in size, it is at low cost.
Description
Technical field
The invention belongs to power semiconductor device technology fields, are related to a kind of transverse direction with short-circuit self-shield ability
IGBT。
Technical background
Insulated gate bipolar transistor (IGBT) is as power electronic devices of new generation because it combines field effect transistor
The advantages of managing (MOSFET) and bipolar crystal type transistor (BJT), both there is MOSFET to be easy to, and driving, input impedance is low, switchs
Fireballing advantage, and have the advantages that BJT on state current density is big, conduction voltage drop is low, loss is small, stability is good.Thus send out
Exhibition is one of the core electron component in modern power electronic circuit, is widely used in traffic, communication, household electrical appliance and boat
Empty space flight every field.The utilization of IGBT significantly improves the performance of power electronic system.
Transversal I GBT is because the feature that can be integrated widely is paid close attention to, for traditional transversal I GBT device (such as Fig. 1 institute
Show), generally protect IGBT that short circuit occurs using the protection circuit that dedicated component is constituted.With units test IGBT collector
Voltage V between emitterce, the V in IGBT short circuitceVoltage steeply rises, and when being more than setting value, component can be turned off
IGBT plays a protective role.IGBT short-circuit protection circuit is generally protected using dedicated component, however its core technology by
Offshore company grasps, therefore protects circuit cost very high, while volume is big, is unable to satisfy inexpensive small size products application, and
And this detection process period length, low-response, problem are more.
Summary of the invention
The present invention proposes a kind of with short-circuit self-insurance to overcome the shortcomings of existing transversal I GBT short-circuit protection method
The transversal I GBT structure of shield ability is cooperated simultaneously by introducing PMOS structure and NMOS structure on the basis of traditional IGBT
The use of diode and resistance may be constructed a short-circuit self-protection circuit to protect IGBT device.
Technical scheme is as follows:
A kind of transversal I GBT structure with short-circuit self-shield ability, (it is along AB as shown in Figure 2 for structure cell schematic diagram
The sectional view of line CD line and EF line is as shown in Fig. 3, Fig. 4 and Fig. 5), comprising: the back collector being cascading from bottom to up
Metal 1, P+ type collecting zone 2, N-type field stop layer 3, N-type drift region 4；It is characterized by: above the drift region N- 4 and edge
Z-direction is provided with groove structure, N-type field stop layer, and the groove structure includes gate dielectric layer 51, gate electrode 61, separate gate electricity
Pole 62, separation gate dielectric layer 52, spacer medium layer 53；Above the drift region N- 4 and groove side is provided with N-type charge and deposits
Reservoir 15；P-type base area 7 is provided with above the N-type charge storage layer 15 and along groove side；Above the p-type base area 7
And mutually side by side and the independent contact zone P+ 9, N+ emitter region 9 along Z-direction and along the setting of groove side；In the drift region N- 4
Top and p-type doped layer 18, n type buried layer 17, p type buried layer 16 are provided with along Z-direction and along the groove other side；It is mixed in the p-type
Diamicton is internally provided with N-type separation layer 19；P-type trap 20 is internally provided in the N-type separation layer 19；In the p-type trap
Z-direction is provided with the contact zone P+ 23, N+ source region 22, the drain region N+ 21 inside 20；P is internally provided in the N-type field stop layer 8
+ collecting zone 11；Collector electrode metal 14 is provided with above the P+ collecting zone 11；Above the gate electrode 61, gate dielectric layer
Dielectric layer 12 and dielectric layer 27 are provided with above 51 tops, spacer medium layer 53；Above the N+ source region 22, on the drain region N+ 21
Side is provided with dielectric layer 26；Gate dielectric layer is provided with above the N+ source region 22, above the drain region N+ 21, above p-type trap 20
24；Gate electrode 25 is provided with above the gate dielectric layer 24；It is provided with above the contact zone P+ 23, above N+ source region 22
Contact metal 28；Contact metal 29 is provided with above the drain region N+ 21；Contact is provided with above the p-type doped layer 18
Metal 30；It is provided with above the contact zone P+ 10, above N+ emitter region 9, above separate gate electrodes 62, above dielectric layer 12
Emitter metal 13；The gate electrode 61 is shorted with contact metal 29；It is gone here and there between the contact metal 30 and emitter metal 13
It is associated with diode 32, resistance 33,32 anode of diode and contact metal 30 are shorted, and cathode and resistance 33 are shorted, the electricity
It hinders 33 one end and 32 cathode of diode is shorted, the other end and emitter metal 13 are shorted；The gate electrode 25 and 32 sun of diode
It is extremely short to connect；The contact metal 28 is shorted with 32 cathode of diode.
Further, a kind of transversal I GBT structure with short-circuit self-shield ability, structure cell schematic diagram such as Fig. 6 institute
Show (it is along the sectional view of AB line CD line and EF line as shown in Fig. 7, Fig. 8 and Fig. 9), it is characterized in that N+ separation layer is substituted for insulation
Dielectric layer 19.
Further, a kind of transversal I GBT structure with short-circuit self-shield ability, structure cell schematic diagram such as Figure 10
Shown (it is along the sectional view of AB line CD line and EF line as shown in Figure 11, Figure 12 and Figure 13), it is characterized in that diode 32 is integrated
To device surface, diode 32 is made of P-type semiconductor 201, N-type semiconductor 202, anode metal 35, cathodic metal 36, medium
Layer 34 is to isolating diode and device.
Further, a kind of transversal I GBT structure with short-circuit self-shield ability, structure cell schematic diagram such as Figure 14
Shown (it is as shown in Figure 15, Figure 16 and Figure 17 along the sectional view of AB line CD line and EF line), it is characterized in that by separate gate electrodes 62
Production l-shaped semi-surrounding lives gate electrode 61.
Transversal I GBT device semiconductor material in the further present invention uses Si, SiC, GaAs or GaN, and groove is filled out
Material is filled using polycrystalline Si, SiC, GaAs or GaN, and different materials group can also be used using identical material in each section
It closes.
Further, the device architecture is applicable not only to IGBT device, and the p-type collecting zone 11 at the device back side is changed to N+
Layer, the structure are equally applicable to MOSFET element.
The working principle of the invention
When emitter 13 connects low potential, collector 14 connects high potential, and gate electrode 61 connects the high potential greater than its threshold voltage
When, device is in forward conduction state, and electric current flows away from the MOS channel of IGBT, when collector voltage continues to increase, by p-type
The PMOS that buried layer 16, n type buried layer 17, p-type doped layer 18 and separate gate electrodes 62 are constituted is opened, and is provided additionally for the flowing of electric current
Access, when current flowing resistance 32, can generate a pressure drop on resistance 32, when device works in stable state and setting
Suitable 32 resistance value of resistance makes the pressure drop on resistance 32 small to 20 table of P trap insufficient for 26 lower section of polycrystalline gate electrode
Face transoid, the NMOS that N+ source region 22, p-type trap 20, N+ type drain region 21, gate electrode 26 are constituted at this time are in not on-state, so
And when short circuit occurs for device, with the increase of collector voltage, the electric current for flowing through PMOS structure also be increased dramatically, and lead to resistance
Pressure drop on 32 increases, when on resistance 32 pressure drop arrive greatly so that 26 lower section of polycrystalline gate electrode 20 surface transoid of P trap when, integrate
NOMS open, so that a low impedance path is formed between gate electrode 61 and emitter, the pressure drop on gate electrode 61 can be with
Lower so that shorted devices current reduction to protect device will not because occur short circuit and damage, the short-circuit protection method
It is simple and efficient, the trouble free service of device can be effectively ensured.
Beneficial effects of the present invention are shown:
It is proposed by the present invention a kind of with short-circuit self-shield energy for the deficiency of existing transversal I GBT short-circuit protection method
The transversal I GBT structure of power is cooperated simultaneously by integrating a PMOS structure and NMOS structure on the basis of conventional IGBT structure
The use of diode and resistance, may be constructed a short-circuit self-protection circuit to protect IGBT device, when short circuit occurs for IGBT,
The protection circuit to form a low impedance path between IGBT gate electrode and emitter so that the pressure drop on gate electrode will
Under coming, so that short circuit current declines, avoids device and fail because short circuit occurs, and the short-circuit protection mode is simply high
Effect, integrated level is very high, small in size, at low cost.
Detailed description of the invention
Fig. 1 is the half cellular structural schematic diagram of traditional transversal I GBT, wherein 1 is underlayer electrode, and 2 be P type substrate, and 3 be to bury
Layer dielectric layer, 4 be the drift region N-, and 5 be gate dielectric layer, and 6 be gate electrode, and 7 be p-type base area, and 8 be N-type field stop layer, and 9 be N+ hair
Area is penetrated, 10 be the contact zone P+, and 11 be P+ collecting zone, and 12 be dielectric layer, and 13 be emitter metal.
Fig. 2 is a kind of transversal I GBT structure cellular signal with short-circuit self-shield ability that the embodiment of the present invention 1 proposes
Figure.
Fig. 3 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 1 along AB line
Sectional view.
Fig. 4 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 1 along CD line
Sectional view.
Fig. 5 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 1 along EF line
Sectional view.
Fig. 6 is a kind of transversal I GBT structure cellular signal with short-circuit self-shield ability that the embodiment of the present invention 2 proposes
Figure.
Fig. 7 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 2 along AB line
Sectional view.
Fig. 8 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 2 along CD line
Sectional view.
Fig. 9 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 2 along EF line
Sectional view.
Figure 10 is a kind of transversal I GBT structure cellular signal with short-circuit self-shield ability that the embodiment of the present invention 3 proposes
Figure.
Figure 11 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 3 along AB line
Sectional view.
Figure 12 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 3 along CD line
Sectional view.
Figure 13 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 3 along EF line
Sectional view.
Figure 14 is a kind of transversal I GBT structure cellular signal with short-circuit self-shield ability that the embodiment of the present invention 4 proposes
Figure.
Figure 15 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 4 along AB line
Sectional view.
Figure 16 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 4 along CD line
Sectional view.
Figure 17 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 4 along EF line
Sectional view.
Figure 18 is a kind of transversal I GBT structure cellular signal with short-circuit self-shield ability that the embodiment of the present invention 5 proposes
Figure.
Figure 19 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 5 along AB line
Sectional view.
Figure 20 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 5 along CD line
Sectional view.
Figure 21 is a kind of transversal I GBT structure with short-circuit self-shield ability of the proposition of the embodiment of the present invention 5 along EF line
Sectional view.
Fig. 2 is into Figure 21, wherein 1 is underlayer electrode, and 2 be P type substrate, and 3 buried layer dielectric layers, 4 be the drift region N-, and 51 are
Gate dielectric layer, 52 be separation gate dielectric layer, and 53 be spacer medium layer, and 54 be dielectric layer, and 61 be gate electrode, and 62 be separate gate electricity
Pole, 7 be p-type base area, and 8 be N-type field stop layer, and 9 be N+ emitter region, and 10 be the contact zone P+, and 11 be P+ collecting zone, and 12 be medium
Layer, 13 be emitter metal, and 14 be collector electrode metal, and 15 be N-type electric charge storage region, and 16 be p type buried layer, and 17 be n type buried layer, 18
It is p-type doped layer, 19 be N+ separation layer, and 191 spacer medium layers, 20 be p-type trap, and 21 be the drain region N+, and 22 be N+ source region, and 23 are
The contact zone P+, 24 be gate dielectric layer, and 25 be gate electrode, and 26 be dielectric layer, and 27 be dielectric layer, and 28 be contact metal, and 29 be contact
Metal, 30 be contact metal, and 31 gate electrode metals, 32 be diode, and 33 be resistance, and 34 be dielectric layer, and 35 be anode metal, 36
It is cathodic metal, 37 be spacer medium layer, and 38 be DOPOS doped polycrystalline silicon, and 39 be contact metal, and 40 be contact metal, and 201 be p-type half
Conductor, 202 be N-type semiconductor.
Specific embodiment
Below in conjunction with attached drawing, the principle of the present invention and characteristic are described further, illustrated embodiment is served only for explaining
The present invention is not intended to limit the scope of the present invention.
Embodiment 1
A kind of transversal I GBT structure with short-circuit self-shield ability, (it is along AB as shown in Figure 2 for structure cell schematic diagram
The sectional view of line CD line and EF line is as shown in Fig. 3, Fig. 4 and Fig. 5), comprising: the back collector being cascading from bottom to up
Metal 1, P+ type collecting zone 2, N-type field stop layer 3, N-type drift region 4；It is characterized by: above the drift region N- 4 and edge
Z-direction is provided with groove structure, N-type field stop layer, and the groove structure includes gate dielectric layer 51, gate electrode 61, separate gate electricity
Pole 62, separation gate dielectric layer 52, spacer medium layer 53；Above the drift region N- 4 and groove side is provided with N-type charge and deposits
Reservoir 15；P-type base area 7 is provided with above the N-type charge storage layer 15 and along groove side；Above the p-type base area 7
And mutually side by side and the independent contact zone P+ 9, N+ emitter region 9 along Z-direction and along the setting of groove side；In the drift region N- 4
Top and p-type doped layer 18, n type buried layer 17, p type buried layer 16 are provided with along Z-direction and along the groove other side；It is mixed in the p-type
Diamicton is internally provided with N-type separation layer 19；P-type trap 20 is internally provided in the N-type separation layer 19；In the p-type trap
Z-direction is provided with the contact zone P+ 23, N+ source region 22, the drain region N+ 21 inside 20；P is internally provided in the N-type field stop layer 8
+ collecting zone 11；Collector electrode metal 14 is provided with above the P+ collecting zone 11；Above the gate electrode 61, gate dielectric layer
Dielectric layer 12 and dielectric layer 27 are provided with above 51 tops, spacer medium layer 53；Above the N+ source region 22, on the drain region N+ 21
Side is provided with dielectric layer 26；Gate dielectric layer is provided with above the N+ source region 22, above the drain region N+ 21, above p-type trap 20
24；Gate electrode 25 is provided with above the gate dielectric layer 24；It is provided with above the contact zone P+ 23, above N+ source region 22
Contact metal 28；Contact metal 29 is provided with above the drain region N+ 21；Contact is provided with above the p-type doped layer 18
Metal 30；It is provided with above the contact zone P+ 10, above N+ emitter region 9, above separate gate electrodes 62, above dielectric layer 12
Emitter metal 13；The gate electrode 61 is shorted with contact metal 29；It is gone here and there between the contact metal 30 and emitter metal 13
It is associated with diode 32, resistance 33,32 anode of diode and contact metal 30 are shorted, and cathode and resistance 33 are shorted, the electricity
It hinders 33 one end and 32 cathode of diode is shorted, the other end and emitter metal 13 are shorted；The gate electrode 25 and 32 sun of diode
It is extremely short to connect；The contact metal 28 is shorted with 32 cathode of diode；The gate electrode 61 passes through gate dielectric layer 51 and the contact zone P+
10, N+ emitter region 9, p-type base area 7, N-type charge storage layer 15, the drift region N- 4 connect, and gate electrode 61 passes through spacer medium layer 53
It is connect with separate gate electrodes 62, the gate electrode 61 is shorted with gate electrode metal 31；The separate gate electrodes are situated between by separate gate
Matter layer 52 is connect with p-type doped layer 18, n type buried layer 17, p type buried layer 16；The diode 32 can be PN junction diode, Xiao Te
Based diode, SiC diode；The contact metal 30 can be metal ohmic contact and be also possible to Schottky contact metal.
Embodiment 2
A kind of transversal I GBT structure with short-circuit self-shield ability, (it is along AB as shown in Figure 6 for structure cell schematic diagram
The sectional view of line CD line and EF line is as shown in Fig. 7, Fig. 8 and Fig. 9), comprising: the back collector being cascading from bottom to up
Metal 1, P+ type collecting zone 2, N-type field stop layer 3, N-type drift region 4；It is characterized by: above the drift region N- 4 and edge
Z-direction is provided with groove structure, N-type field stop layer, and the groove structure includes gate dielectric layer 51, gate electrode 61, separate gate electricity
Pole 62, separation gate dielectric layer 52, spacer medium layer 53；Above the drift region N- 4 and groove side is provided with N-type charge and deposits
Reservoir 15；P-type base area 7 is provided with above the N-type charge storage layer 15 and along groove side；Above the p-type base area 7
And mutually side by side and the independent contact zone P+ 9, N+ emitter region 9 along Z-direction and along the setting of groove side；In the drift region N- 4
Top and p-type doped layer 18, n type buried layer 17, p type buried layer 16 are provided with along Z-direction and along the groove other side；It is mixed in the p-type
Diamicton is internally provided with spacer medium layer 191；P-type trap 20 is internally provided in the spacer medium layer 191；In the p-type
Z-direction is provided with the contact zone P+ 23, N+ source region 22, the drain region N+ 21 inside trap 20；It is set inside the N-type field stop layer 8
It is equipped with P+ collecting zone 11；Collector electrode metal 14 is provided with above the P+ collecting zone 11；Above the gate electrode 61, grid Jie
Dielectric layer 12 and dielectric layer 27 are provided with above 51 top of matter layer, spacer medium layer 53；Above the N+ source region 22, the drain region N+
21 tops are provided with dielectric layer 26；Grid Jie is provided with above the N+ source region 22, above the drain region N+ 21, above p-type trap 20
Matter layer 24；Gate electrode 25 is provided with above the gate dielectric layer 24；It is set above the contact zone P+ 23, above N+ source region 22
It is equipped with contact metal 28；Contact metal 29 is provided with above the drain region N+ 21；It is provided with above the p-type doped layer 18
Contact metal 30；It is set above the contact zone P+ 10, above N+ emitter region 9, above separate gate electrodes 62, above dielectric layer 12
It is equipped with emitter metal 13；The gate electrode 61 is shorted with contact metal 29；The contact metal 30 and emitter metal 13 it
Between be in series with diode 32, resistance 33,32 anode of diode and contact metal 30 are shorted, and cathode and resistance 33 are shorted, institute
It states 33 one end of resistance and 32 cathode of diode is shorted, the other end and emitter metal 13 are shorted；The gate electrode 25 and diode
32 anodes are shorted；The contact metal 28 is shorted with 32 cathode of diode；The gate electrode 61 is connect by gate dielectric layer 51 and P+
Area 10, N+ emitter region 9, p-type base area 7, N-type charge storage layer 15, the connection of the drift region N- 4 are touched, gate electrode 61 passes through spacer medium
Layer 53 is connect with separate gate electrodes 62, and the gate electrode 61 is shorted with gate electrode metal 31；The separate gate electrodes pass through separation
Gate dielectric layer 52 is connect with p-type doped layer 18, n type buried layer 17, p type buried layer 16；The diode 32 can be PN junction diode,
Schottky diode, SiC diode；The contact metal 30 can be metal ohmic contact and be also possible to Schottky contacts gold
Belong to.
Embodiment 3
A kind of transversal I GBT structure with short-circuit self-shield ability, structure cell schematic diagram (its edge as shown in Figure 10
The sectional view of AB line CD line and EF line is as shown in Figure 11, Figure 12 and Figure 13), it is characterized in that: on the basis of embodiment 1 by two poles
Pipe 31 is integrated into device surface, and diode 31 is by P-type semiconductor 201, N-type semiconductor 202, anode metal 35, cathodic metal 36
It constitutes, dielectric layer 34 is to isolating diode and device.
Diode 31 is integrated into the complexity being integrated into and simplify external circuit that device surface improves device.
Embodiment 4
A kind of transversal I GBT structure with short-circuit self-shield ability, structure cell schematic diagram (its edge as shown in figure 14
The sectional view of AB line CD line and EF line is as shown in Figure 15, Figure 16 and Figure 17), it is characterized in that: will separation on the basis of embodiment 2
Gate electrode 62 is made L-type semi-surrounding and lives gate electrode 61.
L-type is made in separate gate electrodes 62 and reduces Miller capacitance, improves devices switch speed.
Embodiment 5
A kind of transversal I GBT structure with short-circuit self-shield ability, structure cell schematic diagram (its edge as shown in figure 18
The sectional view of AB line CD line and EF line is as shown in Figure 19, Figure 20 and Figure 21), it is characterized in that: by resistance on the basis of embodiment 3
32 are integrated into device surface, and resistance 32 is made of DOPOS doped polycrystalline silicon 38, contact metal 39, contact metal 40, dielectric layer 37 to
Isolation resistance and device.
Resistance 32 is integrated into the complexity being integrated into and simplify external circuit that device surface improves device.
Claims (7)
1. a kind of transversal I GBT with short-circuit self-shield ability, structure cell include: to be cascading from bottom to up
Back collector electrode metal (1), P+ type collecting zone (2), N-type field stop layer (3), N-type drift region (4)；With three-dimensional cartesian coordinate system
Be defined to the three-dimensional of device: definition device transverse direction is x-axis direction, device vertical direction is y-axis direction, device
Longitudinal direction, that is, third dimension direction is z-axis direction；It is characterized by: along the z-axis direction, at the drift region N- (4) the upper layer both ends
It is respectively arranged with groove structure and N-type field stop layer (8), the groove structure includes gate dielectric layer (51), gate electrode (61), divides
From gate electrode (62), separation gate dielectric layer (52), spacer medium layer (53)；In the drift region N- (4) top and groove side
It is provided with N-type charge storage layer (15)；P-type base area is provided with above the N-type charge storage layer (15) and along groove side
(7)；In p-type base area (7) top and it is set side by side with the contact zone P+ (9) and N+ emitter region in the z-direction and along groove side
(9)；In the drift region N- (4) top and it is provided with p-type doped layer (18), n type buried layer in the z-direction and along the groove other side
(17), p type buried layer (16)；N-type separation layer (19) are internally provided in the p-type doped layer；In the N-type separation layer (19)
Portion is provided with p-type trap (20)；Z-direction is provided with the contact zone P+ (23), N+ source region in p-type trap (20) inside
(22), the drain region N+ (21)；P+ collecting zone (11) are internally provided in the N-type field stop layer (8)；In the P+ collecting zone (11)
Top is provided with collector electrode metal (14)；Above the gate electrode (61), gate dielectric layer (51) top, spacer medium layer (53)
Top is provided with dielectric layer (12) and dielectric layer (27)；Jie is provided with above the N+ source region (22), above the drain region N+ (21)
Matter layer (26)；Gate dielectric layer is provided with above the N+ source region (22), above the drain region N+ (21), above p-type trap (20)
(24)；Gate electrode (25) are provided with above the gate dielectric layer (24)；Above the contact zone P+ (23), N+ source region (22)
Top is provided with contact metal (28)；Contact metal (29) is provided with above the drain region N+ (21)；In the p-type doped layer
(18) top is provided with contact metal (30)；Above the contact zone P+ (10), N+ emitter region (9) top, separate gate electrodes
(62) top, dielectric layer (12) top are provided with emitter metal (13)；The gate electrode (61) and contact metal (29) are shorted；
Diode (32), resistance (33), the diode (32) are in series between the contact metal (30) and emitter metal (13)
Anode and contact metal (30) are shorted, and cathode and resistance (33) are shorted, and described resistance (33) one end and diode (32) cathode are short
It connects, the other end and emitter metal (13) are shorted；The gate electrode (25) and diode (32) anode are shorted；The contact metal
(28) it is shorted with diode (32) cathode；The gate electrode (61) is emitted by gate dielectric layer (51) and the contact zone P+ (10), N+
Area (9), p-type base area (7), N-type charge storage layer (15), the drift region N- (4) connection, gate electrode (61) pass through spacer medium layer
(53) it is connect with separate gate electrodes (62), the gate electrode (61) and gate electrode metal (31) are shorted；The separate gate electrodes are logical
Separation gate dielectric layer (52) is crossed to connect with p-type doped layer (18), n type buried layer (17), p type buried layer (16)；The diode (32)
For one of PN junction diode, Schottky diode, SiC diode；The contact metal (30) be metal ohmic contact or
Person's Schottky contact metal.
2. a kind of transversal I GBT with short-circuit self-shield ability, structure cell include: to be cascading from bottom to up
Back collector electrode metal (1), P+ type collecting zone (2), N-type field stop layer (3), N-type drift region (4)；With three-dimensional cartesian coordinate system
Be defined to the three-dimensional of device: definition device transverse direction is x-axis direction, device vertical direction is y-axis direction, device
Longitudinal direction, that is, third dimension direction is z-axis direction；It is characterized by: along the z-axis direction, at the drift region N- (4) the upper layer both ends
It is respectively arranged with groove structure and N-type field stop layer (8), the groove structure includes gate dielectric layer (51), gate electrode (61), divides
From gate electrode (62), separation gate dielectric layer (52), spacer medium layer (53)；In the drift region N- (4) top and groove side
It is provided with N-type charge storage layer (15)；P-type base area is provided with above the N-type charge storage layer (15) and along groove side
(7)；Above the p-type base area (7) and along Z-direction and along the setting of groove side mutually side by side and the independent contact zone P+ (9),
N+ emitter region (9)；P-type doped layer (18), N are provided with above the drift region N- (4) and along Z-direction and along the groove other side
Type buried layer (17), p type buried layer (16)；Spacer medium layer (191) are internally provided in the p-type doped layer；It is situated between in the isolation
Matter layer (191) is internally provided with p-type trap (20)；Z-direction is provided with the contact zone P+ in p-type trap (20) inside
(23), N+ source region (22), the drain region N+ (21)；P+ collecting zone (11) are internally provided in the N-type field stop layer (8)；In the P
Collector electrode metal (14) are provided with above+collecting zone (11)；Above the gate electrode (61), above gate dielectric layer (51), every
Dielectric layer (53) top is provided with dielectric layer (12) and dielectric layer (27)；Above the N+ source region (22), the drain region N+ (21)
Top is provided with dielectric layer (26)；It is arranged above the N+ source region (22), above the drain region N+ (21), above p-type trap (20)
There are gate dielectric layer (24)；Gate electrode (25) are provided with above the gate dielectric layer (24)；Above the contact zone P+ (23),
Contact metal (28) is provided with above N+ source region (22)；Contact metal (29) is provided with above the drain region N+ (21)；Institute
It states and is provided with contact metal (30) above p-type doped layer (18)；Above the contact zone P+ (10) top, N+ emitter region (9),
Emitter metal (13) are provided with above separate gate electrodes (62), above dielectric layer (12)；The gate electrode (61) with contact gold
Belong to (29) to be shorted；Diode (32), resistance (33) are in series between the contact metal (30) and emitter metal (13), it is described
Diode (32) anode and contact metal (30) are shorted, and cathode and resistance (33) are shorted, described resistance (33) one end and diode
(32) cathode is shorted, and the other end and emitter metal (13) are shorted；The gate electrode (25) and diode (32) anode are shorted；Institute
It states contact metal (28) and diode (32) cathode is shorted；The gate electrode (61) passes through gate dielectric layer (51) and the contact zone P+
(10), N+ emitter region (9), p-type base area (7), N-type charge storage layer (15), the drift region N- (4) connection, gate electrode (61) pass through
Spacer medium layer (53) is connect with separate gate electrodes (62), and the gate electrode (61) and gate electrode metal (31) are shorted；Described point
It is connect by separation gate dielectric layer (52) with p-type doped layer (18), n type buried layer (17), p type buried layer (16) from gate electrode；It is described
Diode (32) is one of PN junction diode, Schottky diode, SiC diode；The contact metal (30) is ohm
Contact metal or Schottky contact metal.
3. a kind of transversal I GBT with short-circuit protection ability according to claim 1, it is characterised in that by diode
(31) it is integrated into device surface, diode (31) is by P-type semiconductor (201), N-type semiconductor (202), anode metal (35), yin
Pole metal (36) is constituted, and dielectric layer (34) is to isolating diode and device.
4. a kind of transversal I GBT with short-circuit protection ability according to claim 2, it is characterised in that by separate gate electricity
Pole (62) is made L-type semi-surrounding and lives gate electrode (61).
5. a kind of transversal I GBT with short-circuit protection ability according to claim 3, feature collects by resistance (32)
At device surface is arrived, resistance (32) is made of DOPOS doped polycrystalline silicon (38), contact metal (39), contact metal (40), dielectric layer
(37) to isolation resistance and device.
6. a kind of transversal I GBT with short-circuit protection ability according to claim 1, it is characterised in that in the present invention
Transversal I GBT device semiconductor material uses Si, SiC, GaAs or GaN, and trench fill material uses polycrystalline Si, SiC, GaAs
Or GaN, and different materials combination can also be used in each section using identical material.
7. a kind of transversal I GBT with short-circuit protection ability according to claim 1, it is characterised in that the device junction
Structure is applicable not only to IGBT device, the p-type collecting zone (11) at the device back side is changed to N+ layers, the structure is equally applicable to
MOSFET element.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112687681A (en) * | 2020-12-29 | 2021-04-20 | 电子科技大学 | LIGBT device with integrated NMOS tube |
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| US5381026A (en) * | 1990-09-17 | 1995-01-10 | Kabushiki Kaisha Toshiba | Insulated-gate thyristor |
| US20120241761A1 (en) * | 2011-03-25 | 2012-09-27 | Kabushiki Kaisha Toshiba | Semiconductor device and method for manufacturing same |
| CN107731898A (en) * | 2017-10-20 | 2018-02-23 | 电子科技大学 | A kind of CSTBT devices and its manufacture method |
| CN107799582A (en) * | 2017-10-20 | 2018-03-13 | 电子科技大学 | A kind of trench gate electric charge memory type insulated gate bipolar transistor and its manufacture method |
| CN109888007A (en) * | 2019-04-19 | 2019-06-14 | 电子科技大学 | SOI LIGBT device with diode clamp carrier accumulation layer |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US5381026A (en) * | 1990-09-17 | 1995-01-10 | Kabushiki Kaisha Toshiba | Insulated-gate thyristor |
| US20120241761A1 (en) * | 2011-03-25 | 2012-09-27 | Kabushiki Kaisha Toshiba | Semiconductor device and method for manufacturing same |
| CN107731898A (en) * | 2017-10-20 | 2018-02-23 | 电子科技大学 | A kind of CSTBT devices and its manufacture method |
| CN107799582A (en) * | 2017-10-20 | 2018-03-13 | 电子科技大学 | A kind of trench gate electric charge memory type insulated gate bipolar transistor and its manufacture method |
| CN109888007A (en) * | 2019-04-19 | 2019-06-14 | 电子科技大学 | SOI LIGBT device with diode clamp carrier accumulation layer |
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| CN112687681A (en) * | 2020-12-29 | 2021-04-20 | 电子科技大学 | LIGBT device with integrated NMOS tube |
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