CN110474536A - A kind of power circuit of high-low pressure conversion - Google Patents
A kind of power circuit of high-low pressure conversion Download PDFInfo
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- CN110474536A CN110474536A CN201910627051.XA CN201910627051A CN110474536A CN 110474536 A CN110474536 A CN 110474536A CN 201910627051 A CN201910627051 A CN 201910627051A CN 110474536 A CN110474536 A CN 110474536A
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- 239000004065 semiconductor Substances 0.000 claims abstract description 64
- 230000005611 electricity Effects 0.000 claims description 10
- 238000004364 calculation method Methods 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
Abstract
The present invention relates to a kind of power circuits of high-low pressure conversion, including first to third metal-oxide-semiconductor, first to the 7th triode, first to the 9th resistance, first and the drain electrode of third metal-oxide-semiconductor meet VIN, the source electrode of third metal-oxide-semiconductor exports VDD, when VIN rises from 0V, the grid of first and second metal-oxide-semiconductors is connected as VIN is increased, the grid of third metal-oxide-semiconductor is pulled up so that third metal-oxide-semiconductor is connected, in VIN > Vgs2+Vgs3, VDD is begun to ramp up, after VDD rises to certain voltage with VIN, due to second and the 4th the branch of triode generate a feedback current and hold the grid of the second metal-oxide-semiconductor, so that the gate terminal voltage of third metal-oxide-semiconductor no longer rises, finally VDD is stablized in this voltage.The resistance value ratio of the 5th to the 7th resistance is adjusted to realize the voltage output of zero-temperature coefficient in the temperature characterisitic of VDD, can be facilitated by deformation low-tension supply VDD being designed as various voltage values.And tap can be extracted in the resistance string of the 8th and the 9th resistance to obtain required bias voltage.
Description
Technical field
The present invention relates to switching power circuit technical field more particularly to a kind of electricity for needing to carry out high pressure and being converted into low pressure
Source circuit.
Background technique
For integrated circuit, supply pin is passed through frequently with high voltage supply, however integrated circuit content but largely uses
Low-voltage device, this just needs to design low-tension supply in IC interior, so that being necessarily required to a high pressure turns opening for low pressure
Powered-down source.
The mentality of designing that existing high pressure turns low tension switch power supply is usually to pass through a Bandgap(bandgap voltage reference
Source) module obtains the bandgap voltage reference of 1.2V, the then voltage regulator circuit by the bandgap voltage reference of 1.2V Jing Guo negative-feedback again
To obtain a low-tension supply.It is classical by PTAT circuit generate bandgap voltage reference Vbg circuit structure as shown in Figure 1,
The negative-feedback voltage regulator circuit that is adapted to it as shown in Fig. 2, using Fig. 1 and 2 circuit combined structure, not only available low tension
Source, but also tap can be extracted from the resistance string of Fig. 2, obtain various reference voltages.However this kind of circuit combined structure is no doubt
It is quite classical and practical, but be difficult to ensure by the temperature characterisitic of its low-tension supply obtained, in addition, the electricity of low-tension supply
The also inconvenient adjustment of pressure value.
Summary of the invention
It is alternative existing the purpose of the present invention is to provide a kind of power circuit of high-low pressure that structure is simple and novel conversion
Low-tension supply realize circuit structure, obtain temperature independent low-tension supply, and have good temperature characterisitic, it can be achieved that connecing
The voltage output of nearly zero-temperature coefficient, and it is able to satisfy the low-tension supply demand of multiple voltage.
To achieve the goals above, the technical solution adopted by the present invention is a kind of power circuit of high-low pressure conversion, including
First to third metal-oxide-semiconductor, the first to the 7th triode, the first to the 7th resistance, first and the drain electrode of third metal-oxide-semiconductor connect high-voltage electricity
Source VIN, the source electrode of the first metal-oxide-semiconductor connect the drain electrode of the second metal-oxide-semiconductor, and the source electrode of the second metal-oxide-semiconductor connects the grid of third metal-oxide-semiconductor, and first
High voltage power supply VIN is terminated by the one of first resistor with after second resistance series connection, by the 7th triode of termination of second resistance
Emitter, the grid of the first metal-oxide-semiconductor connect between the first and second resistance, and the grid of the second metal-oxide-semiconductor connects the base of the 7th triode
Pole, 3rd resistor connect the emitter and base stage of the 7th triode, and the 4th resistance is connected on source electrode and the seven or three pole of the second metal-oxide-semiconductor
Between the collector of pipe, the collector of the source electrode of third metal-oxide-semiconductor and the 7th triode is connected, and the source electrode output of third metal-oxide-semiconductor is low
Voltage source VDD, the collector of the 5th triode are connected between the source electrode of third metal-oxide-semiconductor and the collector of the 7th triode, the
The emitter of five triodes connects the base stage of the 6th triode, and the base stage of the 5th triode connects the collector of the 6th triode, and the 5th
Resistance connects between the collector and base stage of the 5th triode, and emitter the 6th resistance of series connection of the 6th triode is followed by the one or three pole
The base stage of the collector of pipe, the first and second triodes joins altogether, and the collector of the second triode connects the grid of the second metal-oxide-semiconductor, the
The collector of one triode connects its base stage, and the emitter of the first triode connects the collector of third transistor, third transistor
Base stage connect the emitter of the second triode, the emitter of third transistor is connected and is grounded after the 7th resistance, the 4th triode
Base stage connects the emitter of the first triode, and the collector of the 4th triode connects the emitter of the second triode, the 4th triode
Emitter ground connection.
As an improvement of the present invention, the number ratio of first triode and the second triode is 1:n, n a second
Triode is connected in parallel, and the number ratio of third transistor and the 4th triode is n:1, and n third transistor is connected in parallel.
As an improvement of the present invention, described first N-channel high-voltage MOS pipe is all made of to third metal-oxide-semiconductor, described
One to the 6th triode uses NPN type triode, and the 7th triode uses PNP type triode.
As an improvement of the present invention, the voltage computing formula of low-tension supply is exported are as follows:
VDD=4Vbe+VT
Wherein, Vbe is the BE junction voltage of triode, VTFor thermal voltage, ln (n) is a constant, and n is the second triode or the three or three
The number of pole pipe, n take 4 or 8.
It as an improvement of the present invention, further include the 8th and the 9th resistance, by the 8th after the series connection of the 8th and the 9th resistance
Between the emitter of the 5th triode of an end Jie and the base stage of the 6th triode of resistance, and by a termination of the 9th resistance
Ground, and tap is extracted between the 8th resistance and the 9th resistance, to obtain bias voltage.
As an improvement of the present invention, the 5th to the 7th resistance uses same type of resistance.
As an improvement of the present invention, the voltage value range of the high voltage power supply is in 20 ~ 40V.
As an improvement of the present invention, the Standard resistance range of the 3rd resistor is 100K ~ 200K.
Compared with the existing technology, circuit configuration smart structural design of the invention is reasonable, it is easy to accomplish, by using first
Low-tension supply VDD is constructed to third metal-oxide-semiconductor follows the high voltage power supply VIN of input to carry out boost operations, and passes through the two or three pole
The branch of pipe and the 4th triode generates a feedback current and holds the grid of the second metal-oxide-semiconductor, so that the gate terminal of third metal-oxide-semiconductor
Voltage no longer rises and stablizes VDD in certain voltage, and by 3rd resistor and the design of the current limliting of the 7th triode, so that
The feedback being made of the second metal-oxide-semiconductor, third metal-oxide-semiconductor, the 5th resistance, the 6th resistance, the first to the 6th triode and the 7th resistance
Loop is easily realized, and is conducive to the stabilization of entire circuit.The low-tension supply VDD of circuit final output can be by subzero temperature characteristic
The V of Vbe and positive temperature characteristicsTCombination obtains, and can be facilitated by deformation low-tension supply VDD being designed as various voltage values, and should
Kind circuit structure can have while realizing that high pressure turns low pressure function by adjusting the resistance value ratio of the 5th to the 7th resistance
Effect guarantees that low-tension supply has good temperature characterisitic.In addition, the electricity being made of the 8th resistance and the 9th resistance in circuit
Tap is extracted between resistance string, to obtain bias voltage.
Detailed description of the invention
Fig. 1 is the classical circuit structure that bandgap voltage reference Vbg is generated by PTAT circuit commonly used in the prior art.
Fig. 2 is negative-feedback voltage regulator circuit compatible with Fig. 1 circuit in the prior art.
Fig. 3 is that the high pressure of the preferred embodiment of the present invention turns the circuit construction of electric power of low pressure.
Fig. 4 is the simulation waveform that the high pressure based on the preferred embodiment of the present invention turns low-voltage power circuit framework.
Specific embodiment
In order to deepen the understanding of the present invention and recognize, the invention will be further described below in conjunction with the accompanying drawings and introduces.
As shown in figure 3, for a kind of power circuit of high-low pressure conversion shown by the preferred embodiment of the present invention, including first
To third metal-oxide-semiconductor, the first to the 7th triode, the first to the 9th resistance, first and the drain electrode of third metal-oxide-semiconductor connect high voltage power supply
VIN, the source electrode of the first metal-oxide-semiconductor N1 connect the drain electrode of the second metal-oxide-semiconductor N2, and the source electrode of the second metal-oxide-semiconductor N2 connects the grid of third metal-oxide-semiconductor N3
Pole terminates high voltage power supply VIN for the one of first resistor R1 after the series connection of the first and second resistance, by a termination of second resistance R2 the
The grid of the emitter of seven triode Q7, the first metal-oxide-semiconductor N1 connects between the first and second resistance, the grid of the second metal-oxide-semiconductor N2
The base stage of the 7th triode Q7 is connect, and concatenates a capacitor C1, another termination of capacitor C1 on the grid of the second metal-oxide-semiconductor N2
Ground, 3rd resistor R3 connect the emitter and base stage of the 7th triode Q7, the 4th resistance R4 be connected on the second metal-oxide-semiconductor N2 source electrode and
Between the collector of 7th triode Q7, the source electrode of third metal-oxide-semiconductor N3 and the collector of the 7th triode Q7 are connected, the 3rd MOS
The source electrode of pipe N3 exports low-tension supply VDD, and the collector of the 5th triode Q5 is connected to the source electrode and the seven or three of third metal-oxide-semiconductor N3
Between the collector of pole pipe Q7, the emitter of the 5th triode Q5 connects the base stage of the 6th triode Q6, the base of the 5th triode Q5
Pole connects the collector of the 6th triode Q6, and the 5th resistance R5 connects between the collector and base stage of the 5th triode Q5, the six or three pole
The emitter of pipe Q6 the 6th resistance R6 that connects is followed by the collector of the one or three pole pole pipe Q1, the base stage of the first and second three pole pole pipes
Connection, the collector of the two or three pole pole pipe Q2 connect the grid of the second metal-oxide-semiconductor N2 altogether, and the collector of the one or three pole pole pipe Q1 connects its base
The emitter of pole, the one or three pole pole pipe Q1 connects the collector of third transistor Q3, and the base stage of third transistor Q3 connects the two or three pole
The emitter of pole pipe Q2, the emitter of third transistor Q3 are connected and are grounded after the 7th resistance R7, and the base stage of the 4th triode Q4 connects
The emitter of one or three pole pole pipe Q1, the collector of the 4th triode Q4 connect the emitter of the two or three pole pole pipe Q2, the four or three pole
The emitter of pipe Q4 is grounded.By the transmitting of the 5th triode Q5 of an end Jie of the 8th resistance R8 after the series connection of 8th and the 9th resistance
Between pole and the base stage of the 6th triode Q6, and one end of the 9th resistance R9 is grounded, and in the 8th resistance R8 and the 9th resistance
Tap is extracted between R9, to obtain bias voltage.
Wherein, the number ratio of the one or the three pole pole pipe Q1 and the two or three pole pole pipe Q2 is 1:n, n the two or three pole pole pipes
Q2 is connected in parallel, and the number ratio of third transistor Q3 and the 4th triode Q4 are n:1, and n third transistor Q3 is connected in parallel.And
And described first is all made of N-channel high-voltage MOS pipe to third metal-oxide-semiconductor, the described first to the 6th triode uses three pole of NPN type
Pipe, the 7th triode Q7 use PNP type triode.
The voltage value of the high voltage power supply VIN is determined by the application of chip IC, is usually to take 20 ~ 40V, can also be more
It is high.Described first depends on the working range of high voltage power supply to the pressure voltage of third metal-oxide-semiconductor.
The circuit operation principle of this preferred embodiment is:
VIN from 0V rise when, the grid (end gate) of the first metal-oxide-semiconductor N1 and the second metal-oxide-semiconductor N2 as VIN is increased and is connected,
The grid of third metal-oxide-semiconductor N3 is pulled up so that third metal-oxide-semiconductor N3 is connected, and in VIN > Vgs2+Vgs3, VDD is begun to ramp up, In
When VDD is very low, lower half portion circuit is in high-impedance state due to not opening.VIN continuation up increases, and VDD is also therewith after of continuing rising
Height, after VDD is increased to certain voltage, lower half portion circuit is opened, due to the two or three pole pole pipe Q2 and the 4th triode Q4
Branch generate a feedback current and hold the grid (end gate) of the second metal-oxide-semiconductor N2 so that the gate terminal electricity of third metal-oxide-semiconductor N3
Pressure no longer rises, and third metal-oxide-semiconductor N3 will make VDD continue to rise without more current, finally stablizes VDD in this voltage.
In the circuit structure of this preferred embodiment, the first resistor R1 generally takes 1M, second resistance R2 generally to take
200K, and the 4th resistance R4 generally takes tens K, the Standard resistance range of 3rd resistor R3 is 100K ~ 200K, and third metal-oxide-semiconductor N3 is main
Very big electric current cannot be provided for the device of VDD power supply, the second metal-oxide-semiconductor N2 and the 7th triode Q7,3rd resistor R3 is used for
The supply current of limiting capacitance C1, and the current maxima of 3rd resistor R3 is that Vbe/R3 is fixed on by the 7th triode Q7,
Therefore, when the feedback branch that is made of the two or three pole pole pipe Q2 and the 4th triode Q4 generates feedback current as long as be easy to by
Grid (gate) the end voltage of second metal-oxide-semiconductor N2 is held.
Here it is assumed that flowing through by the 5th resistance R5, the 6th triode Q6, the 6th resistance R6, the one or three pole pole pipe Q1, third
The electric current for the branch that triode Q3 and the 7th resistance R7 is constituted is that I1 then will be by such as inferior when circuit works in stable state
Formula is set up:
Vbe1+Vbe4=Vbe2+Vbe3+I1*R7
Wherein, Vbe1-Vbe4 is respectively the BE junction voltage of first to fourth triode Q4, due to the one or a three pole pole pipe Q1 and
N the two or three pole pole pipe Q2 in parallel works under unequal current density, their base-emitter voltage difference value can table
It is shown as:
Vbe1-Vbe2=ΔVbe= VT*ln(n)
Wherein, VTFor thermal voltage, ln (n) is a constant, and n is the number of the two or three pole pole pipe Q2, and n generally selects 4 or 8.
The base emitter voltage between a 4th triode Q4 and n third transistor Q3 in parallel can similarly be obtained
Difference are as follows:
Vbe4-Vbe3ΔVbe= VT*ln(n)
Wherein, VTFor thermal voltage, ln (n) is a constant, and n is the number of third transistor Q3, and n generally selects 4 or 8.
It can further obtain:
I1*R7=(Vbe1-Vbe2)+(Vbe4-Vbe3)=2*ΔVbe=2*VT*ln(n)
So electric current I1 can be further represented as
I1=VT
It can thus be concluded that the calculation formula of low-tension supply VDD is as follows:
VDD=I1*(R5+R6+R7)+Vbe5+Vbe6+Vbe1+Vbe4
Wherein, Vbe1 is the BE junction voltage of the one or three pole pole pipe Q1, and Vbe4 is the BE junction voltage of the 4th triode Q4, Vbe5 the
The BE junction voltage of five triode Q5, Vbe6 are the BE junction voltage of the 6th triode Q6, it is generally the case that the BE knot of a triode
Voltage (the positively biased pressure drop of i.e. one pn-junction) difference is little, and therefore, the calculation formula of low-tension supply VDD can be further simplified are as follows:
VDD=4Vbe+VT
Wherein, Vbe is the BE junction voltage of triode.By above-mentioned expression formula it is found that design when can by adjust the 5th resistance R5,
Resistance value ratio between 6th resistance R6 and the 7th resistance R7 obtains the specific voltage of VDD.5th to the 7th resistance R7
Using the resistance of same type, to ensure the consistency of production, in addition, since Vbe has negative temperature characteristic, VTWith positive temperature
Characteristic is spent, therefore can be by adjusting above three resistance ratio, so that low-tension supply VDD obtains preferable temperature characterisitic.Thus
As it can be seen that the resistance value ratio of the 5th to the 7th resistance is adjusted to realize the electricity of zero-temperature coefficient in the temperature characterisitic of low-tension supply VDD
Pressure output, by deformation (mainly by formula deformation, such as 3.3V device, VDD=2Vbe+k*VT etc.) can facilitate by
Low-tension supply VDD is designed as various voltage values, such as 5V or 3.3V.
Fig. 4 gives simulation waveform (the used simulation parameter tool of the power circuit framework based on this preferred embodiment
Body are as follows: R1=1M, R2=200K, R3=100K, R4=50K, R5=40K, R6=70K, R7=3K.Active device MOS is for adjusting electric current energy
Power, triode use 5x5.), when VIN is higher than 8.1V, low-tension supply VDD is just stable at 5.6V.
The power circuit that high pressure proposed by the invention turns low pressure is that the high pressure of IC interior turns the switch electricity of low pressure
Source module provides new approaches, so that low-tension supply VDD needed for IC interior can be by the Vbe and positive Wen Te of subzero temperature characteristic
The V of propertyTCombination obtains, and can be facilitated by calculation formula deformation low-tension supply VDD being designed as various voltage values, and this kind of electricity
Line structure, can be by adjusting the resistance value ratio of the 5th to the 7th resistance R7 come effectively while realizing that high pressure turns low pressure function
Guarantee that low-tension supply has good temperature characterisitic.
The technical means disclosed in the embodiments of the present invention is not limited only to technological means disclosed in above embodiment, further includes
Technical solution consisting of any combination of the above technical features.It should be pointed out that for those skilled in the art
For, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as
Protection scope of the present invention.
Claims (8)
1. a kind of power circuit of high-low pressure conversion, it is characterised in that: including first to third metal-oxide-semiconductor, the first to the 7th 3 pole
Pipe, the first to the 7th resistance, first and the drain electrode of third metal-oxide-semiconductor meet high voltage power supply VIN, the source electrode of the first metal-oxide-semiconductor meets the 2nd MOS
The drain electrode of pipe, the source electrode of the second metal-oxide-semiconductor connects the grid of third metal-oxide-semiconductor, by the one of first resistor after the series connection of the first and second resistance
Terminated high voltage power supply VIN, by the emitter of the 7th triode of termination of second resistance, the grid of the first metal-oxide-semiconductor is connect first
Between second resistance, the grid of the second metal-oxide-semiconductor connects the base stage of the 7th triode, and 3rd resistor connects the emitter of the 7th triode
And base stage, the 4th resistance are connected between the source electrode of the second metal-oxide-semiconductor and the collector of the 7th triode, the source electrode of third metal-oxide-semiconductor
It is connected with the collector of the 7th triode, the source electrode of third metal-oxide-semiconductor exports low-tension supply VDD, and the collector of the 5th triode connects
It connects between the source electrode of third metal-oxide-semiconductor and the collector of the 7th triode, the emitter of the 5th triode connects the 6th triode
Base stage, the base stage of the 5th triode connect the collector of the 6th triode, and the 5th resistance connects the collector and base stage of the 5th triode
Between, emitter the 6th resistance of series connection of the 6th triode is followed by the collector of the first triode, the first and second triodes
Base stage joins altogether, and the collector of the second triode connects the grid of the second metal-oxide-semiconductor, and the collector of the first triode connects its base stage, the
The emitter of one triode connects the collector of third transistor, and the base stage of third transistor connects the emitter of the second triode, the
The emitters of three triodes is connected and is grounded after the 7th resistance, and the base stage of the 4th triode connects the emitter of the first triode, and the 4th
The collector of triode connects the emitter of the second triode, the emitter ground connection of the 4th triode.
2. a kind of power circuit of high-low pressure conversion as described in claim 1, which is characterized in that first triode and the
The number ratio of two triodes is 1:n, and n the second triodes are connected in parallel, and the number ratio of third transistor and the 4th triode is
N:1, n third transistors are connected in parallel.
3. a kind of power circuit of high-low pressure conversion as claimed in claim 2, which is characterized in that the described first to the 3rd MOS
Pipe is all made of N-channel high-voltage MOS pipe, and the described first to the 6th triode uses NPN type triode, and the 7th triode uses
PNP type triode.
4. a kind of power circuit of high-low pressure conversion as claimed in claim 3, which is characterized in that output low-tension supply VDD's
Voltage computing formula are as follows:
VDD=4Vbe+VT
Wherein, Vbe is the BE junction voltage of triode, VTFor thermal voltage, ln (n) is a constant, and n is the second triode or the three or three
The number of pole pipe, n take 4 or 8.
5. a kind of power circuit of high-low pressure conversion according to any one of claims 1-4, which is characterized in that further include the 8th
With the 9th resistance, by the emitter and the six or three of the 5th triode of an end Jie of the 8th resistance after the series connection of the 8th and the 9th resistance
Between the base stage of pole pipe, and one end of the 9th resistance is grounded, and tap is extracted between the 8th resistance and the 9th resistance, to obtain
Take bias voltage.
6. a kind of power circuit of high-low pressure conversion according to any one of claims 1-4, which is characterized in that the high-voltage electricity
The voltage value range in source is in 20 ~ 40V.
7. a kind of power circuit of high-low pressure conversion according to any one of claims 1-4, which is characterized in that the third electricity
The Standard resistance range of resistance is 100K ~ 200K.
8. a kind of power circuit of high-low pressure conversion according to any one of claims 1-4, which is characterized in that the described 5th to
7th resistance uses same type of resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910627051.XA CN110474536B (en) | 2019-07-12 | High-low voltage conversion power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910627051.XA CN110474536B (en) | 2019-07-12 | High-low voltage conversion power supply circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110474536A true CN110474536A (en) | 2019-11-19 |
| CN110474536B CN110474536B (en) | 2024-04-30 |
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