CN202433799U - Band-gap reference voltage source - Google Patents

Abstract

The utility model discloses a band-gap reference voltage source. The band-gap reference voltage source comprises a start circuit, a core band-gap reference circuit and a high-order compensation circuit, wherein the core band-gap reference circuit comprises PMOS (p-channel metal oxide semiconductor) tubes M1, M2 and M3, NPN (negative-positive-negative) triodes Q1 and Q2, and resistor units R1, RB1, RB2 and RA; and the high-order compensation circuit comprises PMOS tubes M4, M5, M6, M7, M8, M9, M10 and M11, NPN triodes Q3, Q4, Q5, Q6, Q7 and Q8, and resistor units R2 and R3. The band-gap reference voltage source uses the high-order compensation circuit, so that the temperature coefficient is greatly reduced; a resistance ratio is adopted in a circuit, so that the circuit is not affected by the absolute value of the resistance and the influence of the resistance temperature coefficient on an output quantity is reduced; and the band-gap reference voltage source has a very high power supply rejection ratio and can ensure that the circuit can resist the interference of a power supply.

Description

A kind of bandgap voltage reference

Technical field

The utility model belongs to electronic technology field, is specifically related to the design of a kind of reference voltage source (Voltage Reference).

Background technology

The circuit unit that reference voltage source Chang Zuowei is basic; Be applied in power converter, simulation and digital quantizer, power amplifier; Its objective is and produce one not with the constant voltage of temperature and change in voltage; Its temperature coefficient (TC, Temperature Coefficient) and PSRR (PSRR, Power Supply Rejection Ratio) have determined the quality of system performance to a great extent.

Traditional reference voltage source is as shown in Figure 1: the V of a negative temperature coefficient _EB3Voltage adds the Δ V of a positive temperature coefficient (PTC) _BEVoltage, thus both summations produce a voltage very low with temperature, and the formula of its bandgap voltage reference is:

Wherein, V _BEBe the base-emitter voltage of one of them triode, R ₂, R ₁Be divider resistance, K is Boltzmann Changshu, and q is the electric weight of unit charge, and T is an absolute temperature.

The shortcoming of traditional bandgap voltage reference is; Traditional band gap reference is because the temperature characterisitic of the base collector of triode is non-linear; Therefore traditional first-order linear standard of compensation voltage source can not reach good effect, and the temperature coefficient of voltage-reference is bigger.

The utility model content

The purpose of the utility model is in order to solve the bigger problem of existing first-order linear standard of compensation voltage source temperature coefficient, to have proposed a kind of bandgap voltage reference.

The technical scheme of the utility model is: a kind of bandgap voltage reference, comprise start-up circuit, core band-gap reference circuit and high-order compensation circuit, wherein,

The core band-gap reference circuit comprises: PMOS pipe M1, M2, M3, NPN triode Q1, Q2, and resistance unit R1, RB1, RB2, RA;

The high-order compensation circuit comprises: PMOS pipe M4, M5, M6, M7, M8, M9, M10, M11, NPN triode Q3, Q4, Q5, Q6, Q7, Q8, and resistance unit R2, R3;

Concrete annexation is following: the source electrode of PMOS pipe M1, M2 connects external power source; The grid of PMOS pipe M1 and drain electrode all be connected to PMOS pipe M2 pipe grid and triode Q1 collector and be connected to the grid of high-order compensation circuit PMOS pipe M9; The drain electrode of M2 pipe is connected to the grid of M3 pipe and is connected to the collector of triode Q2, and the output terminal of start-up circuit, and the drain electrode of M3 pipe is connected to the base stage of triode Q1, Q2 as the output terminal of core band-gap reference circuit; And be connected to the input end of start-up circuit; The emitter of Q1 is connected to an end and resistance unit RA one end of resistance unit RB1, and the emitter of Q2 is connected to the other end of resistance unit RA, and the other end of RB1 is connected to RB2 one end; And the PMOS of high-order compensation circuit manages the drain electrode of M7, M11 pipe, the other end earthing potential of RB2;

The source electrode of PMOS pipe M4, M5, M6, M7, M8, M9, M10, M11 connects external power source; The drain electrode of PMOS pipe M4 is connected to collector and the base stage of triode Q3; And be connected to the base stage of triode Q4, the drain electrode of PMOS pipe M5 and the collector that grid has been connected to triode Q6 simultaneously, the base stage of triode Q6 is connected with drain electrode with the grid of PMOS pipe M6; And be connected with the grid of PMOS pipe M7, M8; The emitter of triode Q6 is connected with the emitter of triode Q4, and the collector of triode Q3 links to each other with base stage with the collector of Q5, the grounded collector current potential of triode Q5; The collector of triode Q4 links to each other with the end of resistance unit R2, the other end earthing potential of resistance unit R2; The drain electrode of PMOS pipe M8 links to each other with drain electrode with the grid of PMOS pipe M10; And be connected to the collector of triode Q8; The drain electrode of PMOS pipe M9 pipe is connected with base stage with the collector of triode Q7, and is connected the grounded emitter current potential of triode Q7 with the base stage of triode Q8; One section of the emitter of triode Q8 and resistance unit R3 links to each other the other end ground connection of resistance unit R3.

Further, said start-up circuit comprises: PMOS pipe MS1, MS2, and NMOS manages MS; Wherein, the source electrode of PMOS pipe MS1 connects external power source, and the grid of MS1 connects the grid of NMOS pipe MS2 as the input end of start-up circuit; The drain electrode of MS1 has been connected to the drain electrode of MS2; And be connected to the grid of MS pipe, the drain electrode of MS pipe is as the output terminal of start-up circuit, and MS manages the source grounding current potential with the MS2 pipe.

The beneficial effect of the utility model: the bandgap voltage reference of the utility model has adopted the high-order compensation circuit to reduce temperature coefficient greatly; And in circuit, utilized the resistance ratio; Thereby do not receive the influence of resistance absolute value, reduced the influence of temperature-coefficient of electrical resistance to output quantity.The bandgap voltage reference of the utility model has very high PSRR, can guarantee that circuit can resist the interference of power supply.Compare with traditional bandgap voltage reference, the bandgap voltage reference of the utility model can produce that temperature coefficient is lower, the higher reference source of precision.In addition, the utility model power supply voltage range all has extremely low quiescent dissipation when 2V increases to 5V.

Description of drawings

Fig. 1 is traditional reference voltage source structural representation.

Fig. 2 is the bandgap voltage reference structural representation of the utility model.

Fig. 3 is the bandgap voltage reference circuit diagram of the utility model.

Fig. 4 is the temperature characteristics figure of the bandgap voltage reference output voltage of the utility model.

Fig. 5 is the PSRR AC characteristic curve map of the bandgap voltage reference of the utility model.

Embodiment

Below in conjunction with accompanying drawing and concrete embodiment the utility model is done further to set forth.

As shown in Figure 2; The bandgap voltage reference of the utility model comprises start-up circuit; Core band-gap reference circuit and high-order compensation circuit, the core band-gap reference circuit is used to produce the benchmark output voltage, and the high-order compensation circuit segments has compensated the benchmark output voltage that is produced by the core band-gap reference circuit.

The physical circuit synoptic diagram is as shown in Figure 3, wherein,

The core band-gap reference circuit comprises: PMOS pipe M1, M2, M3, NPN triode Q1, Q2, and resistance unit R1, RB1, RB2, RA;

The high-order compensation circuit comprises: PMOS pipe M4, M5, M6, M7, M8, M9, M10, M11, NPN triode Q3, Q4, Q5, Q6, Q7, Q8, and resistance unit R2, R3;

Concrete annexation is following: the source electrode of PMOS pipe M1, M2 meets external power source VIN; The grid of PMOS pipe M1 and drain electrode all be connected to PMOS pipe M2 pipe grid and triode Q1 collector and be connected to the grid of high-order compensation circuit PMOS pipe M9; The drain electrode of M2 pipe is connected to the grid of M3 pipe and is connected to the collector of triode Q2; And the output terminal of start-up circuit, the drain electrode of M3 pipe is as the output terminal V of core band-gap reference circuit _RefBe connected to the base stage of triode Q1, Q2; And be connected to the input end of start-up circuit; The emitter of Q1 is connected to an end and resistance unit RA one end of resistance unit RB1, and the emitter of Q2 is connected to the other end of resistance unit RA, and the other end of RB1 is connected to RB2 one end; And the PMOS of high-order compensation circuit manages the drain electrode of M7, M11 pipe, the other end earthing potential VSS of RB2;

The source electrode of PMOS pipe M4, M5, M6, M7, M8, M9, M10, M11 meets external power source VIN; The drain electrode of PMOS pipe M4 is connected to collector and the base stage of triode Q3; And be connected to the base stage of triode Q4, the drain electrode of PMOS pipe M5 and the collector that grid has been connected to triode Q6 simultaneously, the base stage of triode Q6 is connected with drain electrode with the grid of PMOS pipe M6; And be connected with the grid of PMOS pipe M7, M8; The emitter of triode Q6 is connected with the emitter of triode Q4, and the collector of triode Q3 links to each other with base stage with the collector of Q5, the grounded collector current potential VSS of triode Q5; The collector of triode Q4 links to each other with the end of resistance unit R2, the other end earthing potential VSS of resistance unit R2; The drain electrode of PMOS pipe M8 links to each other with drain electrode with the grid of PMOS pipe M10; And be connected to the collector of triode Q8; The drain electrode of PMOS pipe M9 pipe is connected with base stage with the collector of triode Q7, and is connected the grounded emitter current potential of triode Q7 with the base stage of triode Q8; One section of the emitter of triode Q8 and resistance unit R3 links to each other the other end earthing potential VSS of resistance unit R3.

Here; The high-order compensation circuit is made up of low temp compensating circuit and high temperature compensating circuit; Wherein, the low temp compensating circuit comprises PMOS pipe M4, M5, M6, M7, NPN triode Q3, Q4, Q5 and resistance unit R2; The high temperature compensating circuit comprises PMOS pipe M8, M9, M10, M11, NPN triode Q7, Q8 and resistance unit R3.

Start-up circuit makes and core band-gap reference circuit operate as normal produces the benchmark output voltage.Start-up circuit only plays a role when voltage-reference powers on, and after reference voltage source started completion, start-up circuit quit work, and has avoided start-up circuit to the core band-gap reference circuit of back and the influence of high-order compensation circuit.

Start-up circuit can adopt a kind of mode as shown in Figure 3, specifically comprises: PMOS pipe MS1, MS2, and NMOS manages MS; Wherein, the source electrode of PMOS pipe MS1 meets external power source VIN, and the grid of MS1 connects the grid of NMOS pipe MS2 as the input end of start-up circuit; The drain electrode of MS1 has been connected to the drain electrode of MS2; And be connected to the grid of MS pipe, the drain electrode of MS pipe is as the output terminal of start-up circuit, and MS manages the source grounding current potential VSS with the MS2 pipe.Those of ordinary skill in the art can find out, also can adopt the start-up circuit of other structure.

The whole principle of facing the reference voltage source of the utility model down describes:

As shown in Figure 3, the voltage VRA on the resistance unit RA be a voltage that is directly proportional with absolute temperature (Proporational To Absolute Temperature, PTAT), V wherein _RA=V _TLnN, V _T=kT/q, K are Boltzmann Changshu, and q is the quantity of electric charge of unit charge, and N is NPN triode Q2 and the ratio of the emitter junction area of Q1.The electric current that flows through resistance unit RA is a PTAT electric current, and this electric current can be described as I _PTAT=[V _TLnN]/R _ATherefore, the bandgap voltage reference V of this conventional Jie's compensation _Ref-order1:

$V_{\mathrm{ref}-\mathrm{<figure-callout\; id="1"\; label="order"\; filenames="HDA0000138032110000022.png"\; state="\{\{state\}\}">order</figure-callout>}1}=V_{\mathrm{be}1}+2\frac{{\mathrm{<figure-callout\; id="1"\; label="R\; B"\; filenames="HDA0000138032110000022.png"\; state="\{\{state\}\}">R</figure-callout>}}_B+R_{B2}}{R_A}{V}_T\ln N$

Here, V _Be1Be the base-emitter voltage of NPN pipe Q1, R _B1, R _B2, R _AThe resistance of representing resistance unit RB1, RB2, RA respectively.

Form a feedback loop by NPN pipe Q1 shown in Figure 3, PMOS pipe M1 and M2; NPN pipe Q2 and PMOS pipe M3 form a regenerative feedback loop.Because the loop gain of feedback loop is greater than positive feedback, whole loop is a feedback loop, thereby guarantees stable output.Simultaneously, the size of PMOS pipe M3 and M1, M2 are identical.The electric current of M3 pipe equates that with the M1 that flows through, M2 pipe the electric current on M1, the M2 pipe is provided with by resistance unit R1.Therefore the voltage of node A, B will equate, thereby can eliminate Early effect.Can improve the line regulation and the PSRR of this reference voltage source like this.

The principle analysis of high-order compensation circuit is following: as shown in Figure 3, and according to Kirchhoff's law, I ₁Electric current can be expressed as The drain current of M6 can be described as

Wherein, β is the current gain of NPN pipe Q6 common emitter, and this electric current is positive temperature coefficient.Electric current I _M6It is a temperature-compensated current (CTAT).Therefore the drain current of PMOS pipe M7 and M8 is: $I_{M7}=m_1{I}_{M6}=\frac{m_1{V}_{\mathrm{Be}5}}{\mathrm{\&beta;}{R}_2},$ $I_{M8}=m_2{I}_{M6}=\frac{m_2{V}_{\mathrm{Be}5}}{{\mathrm{\&beta;\; R}}_2},$ Wherein, m ₁And m ₂Be respectively the image current gain of M7 and M6 and M8 and M6, V _Be5Be the base stage of NPN pipe Q5 and the voltage of emitter, R ₂The resistance of expression resistance unit R2.

According to the principle of Widlar current source, the electric current that flows through NPN pipe Q8 can be described as:

I _Q8R ₃+ V _TLn (I _Q8R _A)=V _TLn [V _TLn (m ₃N)], wherein, m ₃It is the image current gain of M9 and M1.Because I _Q8R _A=1 has guaranteed the correct of this design, and one of which Jie Taylor expansion is:

Obviously, I _Q8Have positive temperature coefficient (PTC), and I _M8Has negative temperature coefficient.I _M8=I _Q8The time temperature spot be T _α, T _αCan draw the electric current decision.Can find out that transistors all in the ifs circuit all are operated in the amplification region, as temperature T＜T _αThe time, I _M8＞I _Q8As T＞T _αThe time, I _M8＜I _Q8Therefore, the electric current that flows through PMOS pipe M10 is zero under lower temperature range; The electric current that under higher temperature, flows through the M10 pipe is a positive temperature coefficient (PTC).

${\mathrm{<figure-callout\; id="10"\; label="I\; M"\; filenames="HDA0000138032110000022.png"\; state="\{\{state\}\}">I</figure-callout>}}_M=\left\{\begin{array}{cc}0,& T<T_{\mathrm{\&alpha;}}\\ \frac{V_T\{1+\ln [V_T\ln \left(m_{3}N\right)\left]\right\}}{R_3+V_T{R}_A}-\frac{m_2{V}_{\mathrm{be}5}}{\mathrm{\&beta;}{R}_2},& T>T_{\mathrm{\&alpha;}}\end{array}\right.$

The high-order compensation electric current is M7 and M11 tube current sum:

$I_{\mathrm{comp}}=\left\{\begin{array}{cc}\frac{m_1{V}_{\mathrm{be}5}}{{\mathrm{\&beta;R}}_2},& T<T_{\mathrm{\&alpha;}}\\ \frac{m_4{V}_T\{1+\ln [V_T\ln \left(m_{3}N\right)\left]\right\}}{R_3+V_T{R}_A}-\frac{(m_2{m}_4-m_1)V_{\mathrm{be}5}}{{\mathrm{\&beta;R}}_2},& T>T_{\mathrm{\&alpha;}}\end{array}\right.$

Wherein, m ₄Be the current gain of M11 and M10 pipe, the high-order compensation electric current is injected into the VCOM node and accomplishes curvature compensation.

The bucking voltage of band-gap reference can be described as:

$V_{\mathrm{ref}-\mathrm{comp}}=\left\{\begin{array}{cc}{k}_1\frac{V_{\mathrm{be}5}}{\mathrm{\&beta;}},& T<T_{\mathrm{\&alpha;}}\\ k_2\frac{V_T\{1+\ln [V_T\ln \left(m_{3}N\right)\left]\right\}}{1+V_T{R}_A/R_3}-k_3\frac{V_{\mathrm{be}5}}{\mathrm{\&beta;}},& T>T_{\mathrm{\&alpha;}}\end{array}\right.$

Wherein, k ₁, k ₂And k ₃Be temperature independent constant, ${\mathrm{<figure-callout\; id="1"\; label="k"\; filenames="HDA0000138032110000022.png"\; state="\{\{state\}\}">k</figure-callout>}}_1=\frac{m_1{R}_{B2}}{R_2},$ $k_2=\frac{m_4{R}_{B2}}{R_3},$ $k_3=\frac{(m_2{m}_4-m_1)R_{B2}}{R_2}$ The output voltage of this benchmark is V _Ref=V _Ref-order1+ V _Ref-comp

Voltage is along with the rising of temperature is index decreased, and its temperature coefficient also rises with temperature and descends rapidly, and therefore at high temperature this temperature coefficient becomes a constant thereupon.At low temperatures, Jie's compensation band gap reference voltage increases with temperature.Therefore

can improve the curvature of bandgap voltage reference at low temperatures, and at high temperature to the almost not influence of the curvature of bandgap voltage reference.At high temperature, higher voltage of positive temperature coefficient (PTC) is added on the output bandgap voltage reference, the elimination V that this voltage can be further _BeNon-linearity in Jie's compensation band gap reference voltage.

Here, through simulating, verifying the characteristic of bandgap voltage reference of the utility model.As shown in Figure 4, hspice emulation shows: temperature range is from-40 ℃ to 80 ℃, and its temperature coefficient only has 5.4ppm/ ℃, and input voltage is from 2V to 5V, and its bandgap voltage reference variation range only has 0.1mV.As shown in Figure 5, PSRR is in input voltage 3V, room temperature and do not have under the situation of plug-in capacitor up to 87dB; Under the 100HZ situation 80dB is arranged; Under the 1KHZ situation 60dB is arranged.The maximum power dissipation of this reference voltage source only has 0.04mW.

Those of ordinary skill in the art will appreciate that embodiment described here is in order to help the principle of reader understanding's the utility model, should to be understood that the protection domain of the utility model is not limited to such special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combinations that do not break away from the utility model essence according to disclosed these teachings of the utility model, and these distortion and combination are still in the protection domain of the utility model.

Claims (2)

1. a bandgap voltage reference is characterized in that, comprises start-up circuit, core band-gap reference circuit and high-order compensation circuit, wherein,

The core band-gap reference circuit comprises: PMOS pipe M1, M2, M3, NPN triode Q1, Q2, and resistance unit R1, RB1, RB2, RA;

The high-order compensation circuit comprises: PMOS pipe M4, M5, M6, M7, M8, M9, M10, M11, NPN triode Q3, Q4, Q5, Q6, Q7, Q8, and resistance unit R2, R3;

Concrete annexation is following: the source electrode of PMOS pipe M1, M2 connects external power source; The grid of PMOS pipe M1 and drain electrode all be connected to PMOS pipe M2 pipe grid and triode Q1 collector and be connected to the grid of high-order compensation circuit PMOS pipe M9; The drain electrode of M2 pipe is connected to the grid of M3 pipe and is connected to the collector of triode Q2, and the output terminal of start-up circuit, and the drain electrode of M3 pipe is connected to the base stage of triode Q1, Q2 as the output terminal of core band-gap reference circuit; And be connected to the input end of start-up circuit; The emitter of Q1 is connected to an end and resistance unit RA one end of resistance unit RB1, and the emitter of Q2 is connected to the other end of resistance unit RA, and the other end of RB1 is connected to RB2 one end; And the PMOS of high-order compensation circuit manages the drain electrode of M7, M11 pipe, the other end earthing potential of RB2;

The source electrode of PMOS pipe M4, M5, M6, M7, M8, M9, M10, M11 connects external power source; The drain electrode of PMOS pipe M4 is connected to collector and the base stage of triode Q3; And be connected to the base stage of triode Q4, the drain electrode of PMOS pipe M5 and the collector that grid has been connected to triode Q6 simultaneously, the base stage of triode Q6 is connected with drain electrode with the grid of PMOS pipe M6; And be connected with the grid of PMOS pipe M7, M8; The emitter of triode Q6 is connected with the emitter of triode Q4, and the collector of triode Q3 links to each other with base stage with the collector of Q5, the grounded collector current potential of triode Q5; The collector of triode Q4 links to each other with the end of resistance unit R2, the other end earthing potential of resistance unit R2; The drain electrode of PMOS pipe M8 links to each other with drain electrode with the grid of PMOS pipe M10; And be connected to the collector of triode Q8; The drain electrode of PMOS pipe M9 pipe is connected with base stage with the collector of triode Q7, and is connected the grounded emitter current potential of triode Q7 with the base stage of triode Q8; One section of the emitter of triode Q8 and resistance unit R3 links to each other the other end ground connection of resistance unit R3.

2. bandgap voltage reference according to claim 1 is characterized in that, described start-up circuit comprises: PMOS pipe MS1, MS2; NMOS manages MS, and wherein, the source electrode of PMOS pipe MS1 connects external power source; The grid of MS1 connects the grid that NMOS manages MS2 as the input end of start-up circuit, and the drain electrode of MS1 has been connected to the drain electrode of MS2, and has been connected to the grid of MS pipe; The drain electrode of MS pipe is as the output terminal of start-up circuit, and MS manages the source grounding current potential with the MS2 pipe.

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