CN110867826A - Low temperature floats under-voltage locking circuit - Google Patents
Low temperature floats under-voltage locking circuit Download PDFInfo
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- CN110867826A CN110867826A CN201911019145.5A CN201911019145A CN110867826A CN 110867826 A CN110867826 A CN 110867826A CN 201911019145 A CN201911019145 A CN 201911019145A CN 110867826 A CN110867826 A CN 110867826A
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- 238000005070 sampling Methods 0.000 claims abstract description 36
- 230000005669 field effect Effects 0.000 claims description 45
- 238000007493 shaping process Methods 0.000 claims description 3
- 230000003321 amplification Effects 0.000 claims description 2
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000004088 simulation Methods 0.000 description 2
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/24—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to undervoltage or no-voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H1/00—Details of emergency protective circuit arrangements
- H02H1/0007—Details of emergency protective circuit arrangements concerning the detecting means
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Abstract
The invention belongs to the technical field of analog integrated circuits, and discloses a low-temperature drift undervoltage locking circuit, which comprises: the sampling circuit is used for sampling the power supply voltage and outputting a sampling voltage signal; the band-gap reference circuit generates a band-gap reference voltage and receives the sampling voltage signal; the current mirror circuit mirrors the currents of the two branches of the band-gap reference circuit and compares the sampling voltage signal with the band-gap reference voltage to output a comparison signal; and the output buffer circuit receives, amplifies and shapes the comparison signal. The low-temperature-drift undervoltage locking circuit provided by the invention has the advantages of simple structure, small occupied area, low power consumption and small temperature drift.
Description
Technical Field
The invention relates to the technical field of analog integrated circuits, in particular to a low-temperature-drift undervoltage locking circuit.
Background
The undervoltage protection circuit is important for the power management chip and the driving chip. When the voltage of the power supply drops below the minimum voltage value required by the system to work normally, the functions of some circuits are damaged, some analog circuit modules cannot work normally, and the digital logic circuit may output unpredictable states. Usually, an under-voltage locking circuit is adopted to monitor the power supply voltage, when the power supply voltage is lower than the minimum voltage required by the normal work of the system, the under-voltage locking circuit outputs a control signal to turn off the system, meanwhile, a certain hysteresis quantity needs to be set in order to avoid the repeated opening and closing of the circuit caused by the tiny fluctuation of the power supply voltage, and the circuit is restarted after the power supply voltage exceeds the minimum threshold voltage within a certain range. A conventional under-voltage lockout circuit is shown in fig. 1 and is composed of a sampling circuit, a reference voltage circuit, and a comparison circuit. The circuit needs a reference voltage source to provide the reference voltage, and when the power voltage is too low, the internal reference voltage generating circuit may not work normally, and it is difficult to provide the required reference voltage. Moreover, the undervoltage protection circuit based on the voltage comparator structure has larger area and power consumption and larger temperature drift.
Disclosure of Invention
The invention provides a low-temperature-drift undervoltage locking circuit, which solves the technical problems of unstable working performance, large required area, high power consumption and large temperature drift of an undervoltage locking circuit in the prior art.
In order to solve the above technical problem, the present invention provides a low temperature drift under-voltage locking circuit, which comprises:
the sampling circuit is used for sampling the power supply voltage and outputting a sampling voltage signal;
the band-gap reference circuit is used for generating a band-gap reference voltage signal and receiving the sampling voltage signal;
and the current mirror circuit is used for carrying out mirror image processing on the currents of the two branches of the band-gap reference circuit, comparing the sampling voltage signal with the band-gap reference voltage signal, outputting a comparison signal according to a comparison result, and outputting a buffer circuit for amplifying and shaping the comparison signal.
Further, the sampling circuit includes: a first resistor R1, a second resistor R2, a third resistor R3 and a third transistor Q3;
the power supply voltage input end VDD is grounded through the first resistor R1, the second resistor R2 and the third resistor R3 which are sequentially connected in series, a power supply voltage sampling point A is arranged between the second resistor R2 and the third resistor R3, and the power supply voltage sampling point A is used for generating the sampling voltage signal;
the collector of the third transistor Q3 is connected to the power supply voltage sampling point a, the base of the third transistor Q3 is connected to the collector, and the emitter of the third transistor Q3 is grounded.
Further, the bandgap reference circuit includes: a first transistor Q1, a second transistor Q2, a fourth resistor R4 and a fifth resistor R5;
the base of the first transistor Q1 is connected to the base of the third transistor Q3, the emitter of the first transistor Q1 is grounded, the base of the first transistor Q1 is connected to the base of the second transistor Q2 through the fourth resistor R4, the emitter of the second transistor Q2 is grounded through the fifth resistor R5, and the collector of the first transistor Q1 and the collector of the second transistor Q2 are respectively connected to the current mirror circuit.
Further, the current mirror circuit includes: a first field effect transistor M1 and a second field effect transistor M2;
the source electrode of the first field effect transistor M1 and the source electrode of the second field effect transistor M2 are respectively connected with a power supply voltage input end VDD, the gate electrode of the first field effect transistor M1 is connected with the gate electrode of the second field effect transistor M2, the gate electrode of the first field effect transistor M1 is connected with the drain electrode of the first field effect transistor M1, the gate electrode of the first field effect transistor M1 is connected with the collector electrode of the first transistor Q1, and the drain electrode of the second field effect transistor M2 is connected with the collector electrode of the second transistor Q2.
Further, the output buffer circuit includes: an amplifier Av and an inverter INV;
the input end of the amplifier Av is connected with the drain electrode of the second field effect transistor M2, the output end of the amplifier Av is connected with the input end of the inverter INV, and the output end of the inverter INV is the output end UVLO of the under-voltage locking circuit.
Further, the low temperature drift under-voltage locking circuit further comprises: a feedback circuit;
the output end of the amplifier Av is provided with a feedback end C;
the feedback circuit includes: a third field effect transistor M3;
the grid electrode of the third field effect transistor M3 is connected with the feedback end C to receive a feedback signal, the source electrode of the third field effect transistor M3 is connected with the power supply voltage input end VDD, and the drain electrode of the third field effect transistor M3 is connected between the first resistor R1 and the second resistor R2.
Further, the first transistor Q1, the second transistor Q2, and the third transistor Q3 are NPN transistors.
One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:
the low-temperature-drift undervoltage locking circuit provided in the embodiment of the application adopts the band-gap reference circuit to provide reference voltage and realizes a comparison function, and compared with the existing undervoltage locking circuit based on the comparison circuit and the reference circuit, the undervoltage locking circuit has a simplified structure and a smaller occupied area, the power consumption of the circuit is effectively reduced, and meanwhile, the undervoltage locking circuit also has a smaller temperature drift characteristic.
Drawings
FIG. 1 is a schematic diagram of a conventional under-voltage lockout circuit;
FIG. 2 is a schematic diagram of a low-temperature-drift under-voltage locking circuit according to an embodiment of the present invention;
FIG. 3 is a functional simulation diagram of the low temperature drift under-voltage locking circuit according to the embodiment of the present invention;
fig. 4 is a simulation result diagram of the low temperature drift under-voltage locking circuit according to the embodiment of the present invention.
Detailed Description
The embodiment of the application provides a low-temperature-drift under-voltage locking circuit, and solves the technical problems that in the prior art, the working performance of the under-voltage locking circuit is unstable, the required area is large, the power consumption is high, and the temperature drift is large.
In order to better understand the technical solutions, the technical solutions will be described in detail below with reference to the drawings and the specific embodiments of the specification, and it should be understood that the embodiments and specific features of the embodiments of the present invention are detailed descriptions of the technical solutions of the present application, and are not limitations of the technical solutions of the present application, and the technical features of the embodiments and examples of the present application may be combined with each other without conflict.
Referring to fig. 2, a low temperature drift under-voltage locking circuit includes:
the sampling circuit is used for sampling the power supply voltage and outputting a sampling voltage signal;
the band-gap reference circuit generates a band-gap reference voltage signal and receives the sampling voltage signal;
the current mirror circuit is used for carrying out mirror image processing on the currents of the two branches of the band-gap reference circuit, comparing the sampling voltage signal with the band-gap reference voltage signal and outputting a comparison signal according to a comparison result;
and the output buffer circuit is used for carrying out amplification and shaping processing on the comparison signal.
The following will describe in detail a specific circuit configuration.
The sampling circuit includes: a first resistor R1, a second resistor R2, a third resistor R3 and a third transistor Q3;
the power supply voltage input end VDD is grounded through the first resistor R1, the second resistor R2 and the third resistor R3 which are sequentially connected in series, a power supply voltage sampling point A is arranged between the second resistor R2 and the third resistor R3, and the power supply voltage sampling point A is used for generating the sampling voltage signal;
the collector of the third transistor Q3 is connected to the power supply voltage sampling point a, the base of the third transistor Q3 is connected to the collector, and the emitter of the third transistor Q3 is grounded.
The bandgap reference circuit includes: a first transistor Q1, a second transistor Q2, a fourth resistor R4 and a fifth resistor R5;
the base of the first transistor Q1 is connected to the base of the third transistor Q3, the emitter of the first transistor Q1 is grounded, the base of the first transistor Q1 is connected to the base of the second transistor Q2 through the fourth resistor R4, and the emitter of the second transistor Q2 is grounded through the fifth resistor R5.
The current mirror circuit includes: a first field effect transistor M1 and a second field effect transistor M2;
the source electrode of the first field effect transistor M1 and the source electrode of the second field effect transistor M2 are respectively connected with a power supply voltage input end VDD, the gate electrode of the first field effect transistor M1 is connected with the gate electrode of the second field effect transistor M2, the gate electrode of the first field effect transistor M1 is connected with the drain electrode of the first field effect transistor M1, the gate electrode of the first field effect transistor M1 is connected with the collector electrode of the first transistor Q1, and the drain electrode of the second field effect transistor M2 is connected with the collector electrode of the second transistor Q2.
The output buffer circuit includes: an amplifier Av and an inverter INV;
the input end of the amplifier Av is connected with the drain electrode of the second field effect transistor M2, the output end of the amplifier Av is connected with the input end of the inverter INV, and the output end of the inverter INV is the output end UVLO of the under-voltage locking circuit.
The low temperature floats undervoltage locking circuit still includes: a feedback circuit;
the output end of the amplifier Av is provided with a feedback end C;
the feedback circuit includes: a third field effect transistor M3;
the grid electrode of the third field effect transistor M3 is connected with the feedback end C to receive a feedback signal, the source electrode of the third field effect transistor M3 is connected with the power supply voltage input end VDD, and the drain electrode of the third field effect transistor M3 is connected between the first resistor R1 and the second resistor R2.
In this embodiment, the first transistor Q1, the second transistor Q2, and the third transistor Q3 are NPN transistors, and the operation principle is described in this embodiment.
The working principle of the present embodiment is described below with reference to fig. 2 and 3:
m1 and M2 form a current mirror with the same width-to-length ratio, and when the circuit works, the current mirror enables the currents I1 and I2 to be equal.
The areas of Q2 and Q3 are larger than Q1, and the area ratio of Q1, Q2 and Q3 is 1: n: and m is selected.
R1, R2, R3 and Q3 constitute a voltage dividing circuit, and when the emitter junction voltage VBE3 of Q3 is equal to the emitter junction voltage VBE1 of Q1, the circuit is in an equilibrium state, I1 ═ I2. Voltage at point a:
VA＝VBE1＝IB·R4+VBE2+(IB+IC)R5(1)
to obtain
ΔVBE＝VBE1-VBE2＝VTlnn＝IB·R4+(IB+IC)R5(2)
Current flowing through resistor R2:
at equilibrium, the corresponding supply voltage:
VDDTH1＝IR2(R1+R2)+VBE(4)
bringing formula (3) into formula (4) to obtain
If it is
Then
Bringing formula (6) into formula (5) to obtain
VTlnn has a positive temperature coefficient, VBEHas negative temperature coefficient, so that the VDD can be ensured by selecting proper parametersTH1With little temperature drift.
When the power voltage is larger than VDDTH1Meanwhile, the current flowing through the triode Q1 is larger than that of the triode Q2 along with the change of VDD, the potential of the point B is pulled up, and a high level is output after the point B passes through the amplifier Av and the inverter INV. Point C is low and M3 is on, shorting R2. When the power supply voltage drops from a high voltage to an equilibrium state such that I1 becomes I2, the output UVLO flips from a high level to a low level, and the corresponding power supply voltage threshold is:
the positive feedback effect of M3 makes the upset threshold value of this undervoltage locking circuit have certain hysteresis range, has avoided the circuit that the tiny fluctuation of mains voltage caused to open and close repeatedly.
Compared with the traditional undervoltage locking circuit, the undervoltage locking circuit provided by the invention does not need a comparator and a reference voltage source structure, has the advantages of simple structure and small area, simultaneously introduces a hysteresis loop, makes the circuit more stable, avoids error overturning near a locking threshold point, and realizes the undervoltage locking circuit with low temperature drift by utilizing the good temperature characteristic of band gap reference.
One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:
the low-temperature-drift undervoltage locking circuit provided in the embodiment of the application adopts the band-gap reference circuit to provide reference voltage and realizes a comparison function, and compared with the existing undervoltage locking circuit based on the comparison circuit and the reference circuit, the undervoltage locking circuit has a simplified structure and a smaller occupied area, the power consumption of the circuit is effectively reduced, and meanwhile, the undervoltage locking circuit also has a smaller temperature drift characteristic.
Finally, it should be noted that the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, and although the present invention has been described in detail with reference to examples, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, which should be covered by the claims of the present invention.
Claims (7)
1. A low temperature drift under-voltage locking circuit, comprising:
the sampling circuit is used for sampling the power supply voltage and outputting a sampling voltage signal;
the band-gap reference circuit is used for generating a band-gap reference voltage signal and receiving the sampling voltage signal;
the current mirror circuit is used for carrying out mirror image processing on the currents of the two branches of the band-gap reference circuit, comparing the sampling voltage signal with the band-gap reference voltage signal and outputting a comparison signal according to a comparison result;
and the output buffer circuit is used for carrying out amplification and shaping processing on the comparison signal.
2. The low temperature drift under-voltage lock-out circuit of claim 1, wherein the sampling circuit comprises: a first resistor R1, a second resistor R2, a third resistor R3 and a third transistor Q3;
the power supply voltage input end VDD is grounded through the first resistor R1, the second resistor R2 and the third resistor R3 which are sequentially connected in series, a power supply voltage sampling point A is arranged between the second resistor R2 and the third resistor R3, and the power supply voltage sampling point A is used for generating the sampling voltage signal;
the collector of the third transistor Q3 is connected to the power supply voltage sampling point a, the base of the third transistor Q3 is connected to the collector, and the emitter of the third transistor Q3 is grounded.
3. The low temperature drift under-voltage locking circuit of claim 2, wherein the bandgap reference circuit comprises: a first transistor Q1, a second transistor Q2, a fourth resistor R4 and a fifth resistor R5;
the base of the first transistor Q1 is connected to the base of the third transistor Q3, the emitter of the first transistor Q1 is grounded, the base of the first transistor Q1 is connected to the base of the second transistor Q2 through the fourth resistor R4, the emitter of the second transistor Q2 is grounded through the fifth resistor R5, and the collector of the first transistor Q1 and the collector of the second transistor Q2 are respectively connected to the current mirror circuit.
4. The LVRT-latch circuit of claim 3, wherein the current mirror circuit comprises: a first field effect transistor M1 and a second field effect transistor M2;
the source electrode of the first field effect transistor M1 and the source electrode of the second field effect transistor M2 are connected with a power supply voltage input end VDD, the gate electrode of the first field effect transistor M1 is connected with the gate electrode of the second field effect transistor M2, the gate electrode of the first field effect transistor M1 is connected with the drain electrode of the first field effect transistor M1, the gate electrode of the first field effect transistor M1 is connected with the collector electrode of the first transistor Q1, and the drain electrode of the second field effect transistor M2 is connected with the collector electrode of the second transistor Q2.
5. The under-voltage low temperature drift lock-out circuit of claim 4, wherein the output buffer circuit comprises: an amplifier Av and an inverter INV;
the input end of the amplifier Av is connected with the drain electrode of the second field effect transistor M2, the output end of the amplifier Av is connected with the input end of the inverter INV, and the output end of the inverter INV is the output end UVLO of the under-voltage locking circuit.
6. The undervoltage lockout circuit with low temperature drift of claim 5, further comprising: a feedback circuit;
the output end of the amplifier Av is provided with a feedback end C;
the feedback circuit includes: a third field effect transistor M3;
the grid electrode of the third field effect transistor M3 is connected with the feedback end C to receive a feedback signal, the source electrode of the third field effect transistor M3 is connected with the power supply voltage input end VDD, and the drain electrode of the third field effect transistor M3 is connected between the first resistor R1 and the second resistor R2.
7. The undervoltage latch circuit with low temperature drift as claimed in claim 6, wherein the first transistor Q1, the second transistor Q2 and the third transistor Q3 are NPN transistors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911019145.5A CN110867826A (en) | 2019-10-24 | 2019-10-24 | Low temperature floats under-voltage locking circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201911019145.5A CN110867826A (en) | 2019-10-24 | 2019-10-24 | Low temperature floats under-voltage locking circuit |
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| CN110867826A true CN110867826A (en) | 2020-03-06 |
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| CN201911019145.5A Pending CN110867826A (en) | 2019-10-24 | 2019-10-24 | Low temperature floats under-voltage locking circuit |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111506149A (en) * | 2020-04-24 | 2020-08-07 | 江苏芯力特电子科技有限公司 | High-precision high-reliability under-voltage protection circuit |
| CN111509694A (en) * | 2020-04-02 | 2020-08-07 | 无锡艾为集成电路技术有限公司 | Chip, undervoltage latch circuit and working method thereof |
| CN111682503A (en) * | 2020-06-17 | 2020-09-18 | 苏州纳芯微电子股份有限公司 | Undervoltage protection circuit |
| CN115220509A (en) * | 2021-04-19 | 2022-10-21 | 圣邦微电子（北京）股份有限公司 | High-threshold-precision undervoltage locking circuit combined with calibration unit |
| CN115328265A (en) * | 2021-05-11 | 2022-11-11 | 圣邦微电子（北京）股份有限公司 | Low-voltage UVLO circuit and method using sub-band gap voltage |
| CN116559522A (en) * | 2023-07-11 | 2023-08-08 | 苏州锴威特半导体股份有限公司 | Low-temperature drift low-voltage detection circuit |
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| US20060227477A1 (en) * | 2005-03-30 | 2006-10-12 | Wenjun Sheng | Undervoltage detection circuit |
| CN101093956A (en) * | 2007-07-20 | 2007-12-26 | 开源集成电路(苏州)有限公司 | Under voltage locking circuit with temperature compensation |
| CN108469867A (en) * | 2018-05-17 | 2018-08-31 | 西安微电子技术研究所 | A kind of undervoltage lockout circuit of bandgap voltage reference structure |
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2019
- 2019-10-24 CN CN201911019145.5A patent/CN110867826A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US20060227477A1 (en) * | 2005-03-30 | 2006-10-12 | Wenjun Sheng | Undervoltage detection circuit |
| CN101093956A (en) * | 2007-07-20 | 2007-12-26 | 开源集成电路(苏州)有限公司 | Under voltage locking circuit with temperature compensation |
| CN108469867A (en) * | 2018-05-17 | 2018-08-31 | 西安微电子技术研究所 | A kind of undervoltage lockout circuit of bandgap voltage reference structure |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111509694A (en) * | 2020-04-02 | 2020-08-07 | 无锡艾为集成电路技术有限公司 | Chip, undervoltage latch circuit and working method thereof |
| CN111506149A (en) * | 2020-04-24 | 2020-08-07 | 江苏芯力特电子科技有限公司 | High-precision high-reliability under-voltage protection circuit |
| CN111506149B (en) * | 2020-04-24 | 2021-12-07 | 江苏芯力特电子科技有限公司 | High-precision high-reliability under-voltage protection circuit |
| CN111682503A (en) * | 2020-06-17 | 2020-09-18 | 苏州纳芯微电子股份有限公司 | Undervoltage protection circuit |
| CN115220509A (en) * | 2021-04-19 | 2022-10-21 | 圣邦微电子（北京）股份有限公司 | High-threshold-precision undervoltage locking circuit combined with calibration unit |
| CN115220509B (en) * | 2021-04-19 | 2024-01-30 | 圣邦微电子（北京）股份有限公司 | High-threshold-precision undervoltage locking circuit combined with calibration unit |
| CN115328265A (en) * | 2021-05-11 | 2022-11-11 | 圣邦微电子（北京）股份有限公司 | Low-voltage UVLO circuit and method using sub-band gap voltage |
| CN115328265B (en) * | 2021-05-11 | 2024-04-12 | 圣邦微电子（北京）股份有限公司 | Low-voltage UVLO circuit and method using sub-band gap voltage |
| CN116559522A (en) * | 2023-07-11 | 2023-08-08 | 苏州锴威特半导体股份有限公司 | Low-temperature drift low-voltage detection circuit |
| CN116559522B (en) * | 2023-07-11 | 2023-09-15 | 苏州锴威特半导体股份有限公司 | Low-temperature drift low-voltage detection circuit |
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Application publication date: 20200306 |