CN110444472B - Si基Mosfet器件及其制备方法 - Google Patents

Si基Mosfet器件及其制备方法 Download PDF

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CN110444472B
CN110444472B CN201910793348.3A CN201910793348A CN110444472B CN 110444472 B CN110444472 B CN 110444472B CN 201910793348 A CN201910793348 A CN 201910793348A CN 110444472 B CN110444472 B CN 110444472B
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dielectric layer
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mosfet device
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CN110444472A (zh
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李可
张志诚
沈震
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Shanghai Huali Integrated Circuit Manufacturing Co Ltd
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Abstract

本申请公开了一种Si基Mosfet器件及其制备方法,包括以下步骤:在Si基上形成高K介质层;向高K介质层中注入F离子;在高K介质层注入F离子后,形成栅极、源极和漏极。本申请实施例还公开了一种Si基Mosfet器件,包括:Si基;形成在Si基上的高K介质层,其中,高K介质层具有F离子。本申请通过向形成在Si基上的高K介质层注入F离子,使高K介质层具有F离子,以增加高K介质层的内部固定电荷密度,从而对半导体导电沟道产生吸引/排斥作用,改变了MOS处能带结构,进而实现对沟道开启电压的调节,由此改变器件阈值电压。

Description

Si基Mosfet器件及其制备方法
技术领域
本申请涉及Mosfet技术领域,具体涉及一种Si基Mosfet器件及其制备方法。
背景技术
随着半导体器件特征尺寸根据摩尔定律逐渐缩小,传统的MOSFET器件要求采用更薄的栅介质层、更高的沟道掺杂,为了保证器件性能,其对工艺参数的要求也越来越苛刻。器件开启电压(阈值电压)作为MOSFET器件的一项关键参数,传统来说都是通过改变其参杂浓度、栅介质层厚度、电极功函数来实现对其的调控,但是器件尺寸的缩小使得这些传统调节方法的工艺窗口越来越小,会造成器件良率下降等问题。因此,在不改变原有器件结构的前提下,找到另一种阈值电压调节方法非常重要。
发明内容
本申请提供了一种Si基Mosfet器件及其制备方法,可以解决相关技术中提供的Mosfet器件的阈值电压难以调控的问题。
一方面,本申请提供了一种Si基Mosfet器件的制备方法,包括以下步骤:
在Si基上形成高K介质层;
向所述高K介质层中注入F离子;
在所述高K介质层注入所述F离子后,形成栅极、源极和漏极。
可选的,在步骤“向所述高K介质层中注入所述F离子”包括:通过注入CF4,从而向所述高K介质层中注入所述F离子。
可选的,在步骤“在Si基上形成高K介质层”包括:通过原子层沉积的方式在所述Si基上形成所述高K介质层。
可选的,在步骤“在所述高介质层注入所述F离子后,形成栅极、源极和漏极”包括:将所述栅极设置在所述高K介质层背对于所述Si基的一侧,将所述源极和所述漏极设置在所述高K介质层相对的侧部。
可选的,在步骤“向所述高K介质层中注入F离子”中,所述F离子的浓度和所述高K介质层内部的固定电荷正相关。
可选的,所述高K介质层包括HfO2
可选的,在步骤“向所述高K介质层中注入F离子”之后还包括通过去耦等离子体氮化工艺和后氮化退火工艺将氮元素掺入到所述高K介质层中。
另一方面,本申请提供了一种Si基Mosfet器件,包括:
Si基;
形成在Si基上的高K介质层,其中,所述高K介质层具有F离子。
可选的,所述F离子是通过向所述高K介质层注入CF4得到的。
可选的,还包括栅极、源极和漏极;
所述栅极设置在所述高K介质层背对于所述Si基的一侧,所述源极和所述漏极设置在所述高K介质层相对的侧部。
可选的,所述高K介质层是通过原子层沉积的方式在所述Si基上形成的。
可选的,所述F离子的浓度和所述高K介质层内部的固定电荷正相关。
可选的,所述高K介质层包括HfO2
可选的,所述高K介质层还包括氮元素,所述氮元素是通过去耦等离子体氮化工艺和后氮化退火工艺将所述氮元素掺入到所述高K介质层中的。
本申请技术方案,至少包括如下优点:
通过向形成在Si基上的高K介质层注入F离子,使高K介质层具有F离子,以增加高K介质层的内部固定电荷密度,从而对半导体导电沟道产生吸引/排斥作用,改变了MOS处能带结构,进而实现对沟道开启电压的调节,由此改变器件阈值电压。
附图说明
为了更清楚地说明本申请具体实施方式或现有技术中的技术方案,下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图是本申请的一些实施方式,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是本申请实施例中Si基Mosfet器件的制备方法的示意图。
图2是本申请实施例中Si基Mosfet器件的结构示意图。
1、基板;2、Si层;3、高K介质层;4、源极;5、漏极;6、栅极。
具体实施方式
下面将结合附图,对本发明中的技术方案进行清楚、完整的描述,显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在不做出创造性劳动的前提下所获得的所有其它实施例,都属于本发明保护的范围。
在本申请的描述中,需要说明的是,术语“中心”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。此外,术语“第一”、“第二”、“第三”仅用于描述目的,而不能理解为指示或暗示相对重要性。
在本申请的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电气连接;可以是直接相连,也可以通过中间媒介间接相连,还可以是两个元件内部的连通,可以是无线连接,也可以是有线连接。对于本领域的普通技术人员而言,可以具体情况理解上述术语在本申请中的具体含义。
此外,下面所描述的本申请不同实施方式中所涉及的技术特征只要彼此之间未构成冲突就可以相互结合。
参照图1所示,本申请实施例公开了一种Si基Mosfet器件的制备方法,包括以下步骤:
在Si基上形成高K介质层3;
向高K介质层3中注入F离子(氟离子);
在高K介质层3注入F离子后,形成栅极6、源极4和漏极5。
借由上述制备方法制备得到的Mosfet器件,可以增加介质层内部固定电荷,从而改变器件阈值电压的作用。通过改变F离子注入计量,可以调节器件阈值电压大小而不用改变器件实际结构及离子注入等参数。
其中,在本实施方式中,Mosfet器件的Si基包括基板1、形成在基板1另一侧的Si层2。
在Si层2背对基板1的另一侧上可以采用沉积或其他可行的方法形成高K介质层3。其中,高K介质层3包括高K材料,该高K材料包括介电常数“K”高于10的材料,例如,该高K材料包括氧化钽(Ta2O5)、氧化锶钛(SrTiO3)、氧化铪(HfO2)、氧化铪硅(HfSiO)、氧化锆(ZrO2)中的至少一种。
在一个可选的实施方式中,在步骤“在Si基上形成高K介质层”包括:通过原子层沉积(Atomic Layer Deposition,ALD)的方式在Si基上沉积高K介质层3。
在一个可选的实施方式中,高K介质层3的材料包括氧化铪(HfO2)。在步骤“向高K介质层3中注入F离子”之后还包括通过去耦等离子体氮化(Decoupled PlasmaNitridation,DPN)和后氮化退火工艺(Post Nitridation Anneal,PNA)将氮元素掺入到高K介质层3中,提高HfO2的热稳定性。
在一个可选的实施方式中,F离子的浓度和高K介质层3内部的固定电荷正相关。
在本实施方式中,通过离子注入法(Plasma注入法)向形成在Si基上的高K介质层3注入诸如CF4等F离子,使高K介质层3具有F离子,以增加高K介质层3的内部固定电荷密度,从而对半导体导电沟道产生吸引/排斥作用,改变了MOS处能带结构,进而实现对沟道开启电压的调节,由此改变器件阈值电压。
在高K介质层3注入F离子后,形成栅极6、源极4和漏极5。其中,栅极6设置在高K介质层3背对于Si基的一侧。源极4和漏极5设置在高K介质层3相对的侧部。其中,源极4可以位于图2中的左侧,漏极5可以位于图2中的右侧。当然的,在另一个可选的实施方式中,源极4可以位于图2中的右侧,漏极5可以位于图2中的左侧。
本申请实施例中的制备方法,具有以下优点:
1.工艺简单,同现有集成电路制造工艺兼容;
2.不改变现有器件结构,不需要增加额外光罩;
3.效果显著,能够有效提升MOSFET器件阈值电压。
参照图2所示,本申请实施例还公开了一种Si基Mosfet器件,该Si基的Mosfet 器件可通过上述实施例中公开的制备方法制备得到,其包括:
Si基;
形成在Si基上的高K介质层3,其中,高K介质层3具有F离子。
F离子(氟离子)可以增加介质层内部固定电荷,从而改变器件阈值电压的作用。通过改变F离子注入计量,可以调节器件阈值电压大小而不用改变器件实际结构及离子注入等参数。
在一个可选的实施方式中,如图2所示,Mosfet器件还包括栅极6、源极4和漏极5。其中,栅极6设置在高K介质层3背对于Si基的一侧;源极4和漏极5设置在高K介质层3相对的侧部。
在一个可选的实施例中,高K介质层3包括HfO2
在一个可选的实施例中,高K介质层3还包括氮元素,该氮元素是通过去耦等离子体氮化工艺和后氮化退火工艺将氮元素掺入到高K介质层3中的。
显然,上述实施例仅仅是为清楚地说明所作的举例,而并非对实施方式的限定。对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而由此所引伸出的显而易见的变化或变动仍处于本申请创造的保护范围之中。

Claims (10)

1.一种Si基Mosfet器件的制备方法,其特征在于,包括以下步骤:
在Si基上形成高K介质层;
通过注入CF4,向所述高K介质层中注入F离子,所述F离子的浓度和所述高K介质层内部的固定电荷正相关,所述F离子用于增加高所述K介质层的内部固定电荷密度,对所述Mosfet器件的导电沟道产生吸引/排斥作用,改变所述Mosfet器件的能带结构;
形成栅极、源极和漏极。
2.根据权利要求1所述的Si基Mosfet器件的制备方法,其特征在于,在步骤“在Si基上形成高K介质层”包括:通过原子层沉积的方式在所述Si基上形成所述高K介质层。
3.根据权利要求1所述的Si基Mosfet器件的制备方法,其特征在于,在步骤“在所述高K介质层注入所述F离子后,形成栅极、源极和漏极”包括:将所述栅极设置在所述高K介质层背对于所述Si基的一侧,将所述源极和所述漏极设置在所述高K介质层相对的侧部。
4.根据权利要求1所述的Si基Mosfet器件的制备方法,其特征在于,所述高K介质层包括HfO2
5.根据权利要求1所述的Si基Mosfet器件的制备方法,其特征在于,在步骤“向所述高K介质层中注入F离子”之后还包括通过去耦等离子体氮化工艺和后氮化退火工艺将氮元素掺入到所述高K介质层中。
6.一种Si基Mosfet器件,其特征在于,包括:
Si基;
形成在Si基上的高K介质层,其中,所述高K介质层具有F离子,所述F离子是通过向所述高K介质层注入CF4得到的,所述F离子的浓度和所述高K介质层内部的固定电荷正相关,所述F离子用于增加高所述K介质层的内部固定电荷密度,对所述Mosfet器件的导电沟道产生吸引/排斥作用,改变所述Mosfet器件的能带结构。
7.根据权利要求6所述的Mosfet器件,其特征在于,还包括栅极、源极和漏极;
所述栅极设置在所述高K介质层背对于所述Si基的一侧,所述源极和所述漏极设置在所述高K介质层相对的侧部。
8.根据权利要求6所述的Mosfet器件,其特征在于,所述高K介质层是通过原子层沉积的方式在所述Si基上形成的。
9.根据权利要求6所述的Mosfet器件,其特征在于,所述高K介质层包括HfO2
10.根据权利要求6所述的Mosfet器件,其特征在于,所述高K介质层还包括氮元素,所述氮元素是通过去耦等离子体氮化工艺和后氮化退火工艺将所述氮元素掺入到所述高K介质层中的。
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