CN110400785A - 半导体装置以及驱动电路 - Google Patents

半导体装置以及驱动电路 Download PDF

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Publication number
CN110400785A
CN110400785A CN201811554469.4A CN201811554469A CN110400785A CN 110400785 A CN110400785 A CN 110400785A CN 201811554469 A CN201811554469 A CN 201811554469A CN 110400785 A CN110400785 A CN 110400785A
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China
Prior art keywords
electrode
joint portion
semiconductor
closing line
engaged
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CN201811554469.4A
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English (en)
Inventor
堀将彦
柴田弘司
佐野努
丸山一哉
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Publication of CN110400785A publication Critical patent/CN110400785A/zh
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Abstract

本发明的实施方式提供减少了导通电阻的半导体装置以及驱动电路。实施方式的半导体装置具备:第1电极;半导体基板,设于第1电极上,具有电连接于第1电极的半导体元件;第2电极,设于半导体基板上,电连接于半导体元件;与第1电极、半导体基板以及第2电极分离地设置的端子;第1接合线,具有第1一端和第1另一端,在第1一端设有接合于第2电极的第1接合部,在第1另一端设有接合于端子的第2接合部,所述第1接合线含有铜且直径为100μm以下;以及第2接合线,具有第2一端和第2另一端,在第2一端设有接合于第2电极的第3接合部,在第2另一端设有接合于端子的第4接合部,所述第2接合线含有铜且直径为100μm以下。

Description

半导体装置以及驱动电路
相关申请
本申请享受以日本专利申请2018-83501号(申请日:2018年4月24日)为基础申请的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
技术领域
本发明的实施方式涉及半导体装置以及驱动电路。
背景技术
进行了面向发电或输电、泵或鼓风机等旋转机械、通信系统或工厂等电源装置、基于交流马达的铁路、电动汽车、家庭用电器产品等广阔的领域的、以MOSFET(Metal OxideSemiconductor FieledEffect Transistor)、IGBT(Insulated Gate BipolarTransistor)这类半导体元件为代表的、为了电力控制而设计的功率半导体装置的开发。
例如,在使用MOSFET驱动马达等驱动电路的情况下,在半导体基板内形成有MOSFET。MOSFET的源极电极形成为板状而设置在半导体基板上。而且,使用通过接线机而接合的接合线将源极电极和设于MOSFET的外部的金属制的外部端子电连接。由此,能够将利用MOSFET进行了开关等的电力向外部取出。
降低MOSFET的漂移层等所引起的导通电阻在提高电力转换效率方面较重要。但是,设于MOSFET的外部的接合线以及外部端子等所具有的电阻在驱动电路中串联连接于漂移层等所引起的导通电阻而导致电力转换效率降低。因此,降低接合线以及外部端子等所引起的电阻也在减少导通电阻方面优选。
另外,为了处理较大的电力,在半导体基板内设有较多的半导体元件。而且,这些较多的半导体元件以并联的方式连接于共用的板状的源极电极。源极电极的膜厚通常约为几μm而非常薄,因此具有较大的电阻成分。因此,在减少导通电阻方面优选的是,使用具有尽量低的电阻成分的部件经由源极电极取出利用半导体元件进行了开关等的电力。
发明内容
本发明的实施方式提供减少了导通电阻的半导体装置以及驱动电路。
实施方式的半导体装置具备:第1电极;半导体基板,设于第1电极上,具有电连接于第1电极的半导体元件;第2电极,设于半导体基板上,电连接于半导体元件;与第1电极、半导体基板以及第2电极分离地设置的端子;第1接合线,具有第1一端和第1另一端,在第1一端设有接合于第2电极的第1接合部,在第1另一端设有接合于端子的第2接合部,含有铜,且直径为100μm以下;以及第2接合线,具有第2一端和第2另一端,在第2一端设有接合于第2电极的第3接合部,在第2另一端设有接合于端子的第4接合部,含有铜,且直径为100μm以下。
附图说明
图1是实施方式的驱动电路的示意图。
图2(a)以及(b)是实施方式的第1半导体装置的示意图。
图3(a)以及(b)是实施方式的第2半导体装置的示意图。
图4(a)以及(b)是实施方式的第1半导体元件的示意剖面图。
图5(a)以及(b)是实施方式的第2半导体元件的示意剖面图。
具体实施方式
以下,使用附图对实施方式进行说明。另外,在附图中,对相同或者类似的位置标注相同或者类似的附图标记。
在本说明书中,有对于相同或者类似的部件标注相同的附图标记并省略重复的说明的情况。
在本说明书中,为了表示部件等的位置关系,将附图的上方向表述为“上”,将附图的下方向表述为“下”。在本说明书中,“上”、“下”的概念不一定是表示与重力的朝向的关系的词语。
在本说明书中,n+、n、n以及p+、p、p的表述表示各导电型中的杂质浓度的相对的高低。即n+表示相对于n,n型的杂质浓度相对更高,n表示相对于n,n型的杂质浓度相对更低。另外,p+表示相对于p,p型的杂质浓度相对更高,p表示相对于p,p型的杂质浓度相对更低。另外,也有将n+与n简单记载为n型、而且将p+与p简单记载为p型的情况。
另外,以下,将第1导电型记载为n型,将第2导电型记载为p型。但是,不必提及的是,即使第1导电型是p型、第2导电型是n型,也能够优选地实施。
(实施方式)
实施方式的半导体装置具备:第1电极;半导体基板,设于第1电极上,具有电连接于第1电极的半导体元件;第2电极,设于半导体基板上,电连接于半导体元件;与第1电极、半导体基板以及第2电极分离地设置的端子;第1接合线,具有第1一端和第1另一端,在第1一端设有接合于第2电极的第1接合部,在第1另一端设有接合于端子的第2接合部,含有铜,且直径为100μm以下;以及第2接合线,具有第2一端和第2另一端,在第2一端设有接合于第2电极的第3接合部,在第2另一端设有接合于端子的第4接合部,含有铜,且直径为100μm以下。
另外,实施方式的驱动电路具备:第1半导体装置、第2半导体装置和控制元件。其中,第1半导体装置具有:第1电极;第1半导体基板,设于第1电极上,具备具有第1控制电极且电连接于第1电极的第1半导体元件;第2电极,设于第1半导体基板上,电连接于第1半导体元件;与第1电极、第1半导体基板以及第2电极分离地设置的第1端子;第1接合线,具有第1一端和第1另一端,在第1一端设有接合于第2电极的第1接合部,在第1另一端设有接合于第1端子的第2接合部,所述第1接合线含有铜且直径为100μm以下;以及第2接合线,具有第2一端和第2另一端,在第2一端设有接合于第2电极的第3接合部,在第2另一端设有接合于第1端子的第4接合部,所述第2接合线含有铜且直径为100μm以下。第2半导体装置,具有:第3电极,电连接于第2电极;第2半导体基板,设于第3电极上,具备具有第2控制电极且电连接于第3电极的第2半导体元件;第4电极,设于第2半导体基板上,电连接于第2半导体元件;与第3电极、第2半导体基板以及第4电极分离地设置的第2端子;第3接合线,具有第3一端和第3另一端,在第3一端设有接合于第4电极的第5接合部,在第3另一端设有接合于第2端子的第6接合部,第3接合线含有铜且直径为100μm以下;以及第4接合线,具有第4一端和第4另一端,在第4一端设有接合于第4电极的第7接合部,在第4另一端设有接合于第2端子的第8接合部,所述第4接合线含有铜且直径为100μm以下。控制元件连接于所述第1控制电极以及所述第2控制电极。
图1是实施方式的驱动电路300的示意图。实施方式的驱动电路300是用于驱动旋转电机400的半桥电路。旋转电机400例如是直流马达。
第1半导体装置110、第2半导体装置120、第3半导体装置130以及第4半导体装置140都是n型的常截止型的MOSFET。另外,例如,也可以是,第1半导体装置110和第3半导体装置130是p型的MOSFET,第2半导体装置120和第4半导体装置140是n型的MOSFET。
第1半导体装置110、第2半导体装置120、第3半导体装置130以及第4半导体装置140也可以是其他晶体管,例如IGBT、BJT(Bipolar Junction Transistor)等。另外,在第1半导体装置110、第2半导体装置120、第3半导体装置130以及第4半导体装置140中,也可以如图1所示那样将续流二极管连接于各自的源极电极与漏极电极之间。
第1半导体装置110、第2半导体装置120、第3半导体装置130以及第4半导体装置140是例如含有Si(硅)或者SiC(碳化硅)、并使用Si或者SiC制造出的晶体管。另外,第1半导体装置110、第2半导体装置120、第3半导体装置130以及第4半导体装置140也可以是使用GaN(氮化镓)、AlGaN、InGaN等氮化物半导体材料、GaO(氧化镓)或者金刚石半导体制造出的晶体管。
第1电源210例如是供给正的电压的直流电源。第1电源210电连接于第1半导体装置110的漏极电极(第1漏极电极)以及第3半导体装置130的漏极电极。第1半导体装置110的源极电极(第1源极电极)与第2半导体装置120的漏极电极(第2漏极电极)电连接。另外,第3半导体装置130的源极电极与第4半导体装置140的漏极电极电连接。第2半导体装置120的源极电极(第2源极电极)与第4半导体装置140的源极电极电连接于地线230。由此,第1半导体装置110以及第2半导体装置120和第3半导体装置130以及第4半导体装置140在第1电源210与地线230之间以并联的方式连接。
旋转电机400电连接于第1半导体装置110的源极电极以及第2半导体装置120的漏极电极、和第3半导体装置130的源极电极以及第4半导体装置140的漏极电极。
第1控制元件150连接于第1半导体装置110的栅极电极(第1栅极电极)以及第2半导体装置120的栅极电极(第2栅极电极)。第1控制元件150例如控制设于第1半导体装置110的栅极电极与第1控制元件150之间的未图示的可变电阻、以及设于第2半导体装置120的栅极电极与第1控制元件150之间的未图示的可变电阻,进行第1半导体装置110以及第2半导体装置120的开关。
第2控制元件160连接于第3半导体装置130的栅极电极以及第4半导体装置140的栅极电极。第2控制元件160例如控制设于第3半导体装置130的栅极电极与第2控制元件160之间的未图示的可变电阻、以及设于第4半导体装置140的栅极电极与第2控制元件160之间的未图示的可变电阻,进行第3半导体装置130以及第4半导体装置140的开关。
第1控制元件150以及第2控制元件160例如是设于半导体芯片内的集成电路或者电子电路。第1控制元件150以及第2控制元件160例如是由运算电路等硬件和程序等软件的组合构成的计算机。另外,第1控制元件150以及第2控制元件160可以由电气电路、量子电路等硬件构成,也可以由软件构成。在由软件构成的情况下,可以使用以CPU(CentralProcessing Unit)为中心的微处理器、存储处理程序的ROM(Read Only Memory)、暂时存储数据的RAM(Random Access Memory)、输入输出端口以及通信端口。记录介质并不限定于磁盘、光盘等能够装卸的介质,也可以是硬盘装置、存储器等固定型的记录介质。
第2电源220是例如市售的电源。第2电源220将用于驱动第1控制元件150以及第2控制元件160的电力向第1控制元件150以及第2控制元件160供给。
作为使用了驱动电路300的旋转电机400的一个驱动的方式,使用第1控制元件150以及第2控制元件160,将第1半导体装置110以及第4半导体装置140导通,将第2半导体装置120以及第3半导体装置130断开。由此,从第1电源210供给的电流从第1半导体装置110流向旋转电机400,并经由第4半导体装置140流向地线230。由此,旋转电机400向第1方向、例如正方向旋转。
另外,作为使用了驱动电路300的旋转电机400的其他驱动的方式,使用第1控制元件150以及第2控制元件160,将第1半导体装置110以及第4半导体装置140断开,将第2半导体装置120以及第3半导体装置130导通。由此,从第1电源210供给的电流从第3半导体装置130流向旋转电机400,并经由第2半导体装置120流向地线230。由此,旋转电机400向第2方向、例如反方向旋转。通过以上,能够使用驱动电路300使旋转电机400向正方向和反方向的任意一个方向旋转。
图2是实施方式的第1半导体装置110的示意图。另外,第1半导体装置是110半导体装置的一个例子。
这里,定义x方向、与x方向垂直的y方向、和与x方向以及y方向垂直的z方向。图2(a)是从z方向观察时的第1半导体装置110的示意图。图2(b)是从x方向观察时的第1半导体装置110的示意图。另外,在图2(b)中,省略了接合线40、41、42、43以及44的记载。另外,图2所示的第1半导体装置110例如由公知的树脂密封而使用。
第1半导体基板30例如是Si基板、SiC基板。另外,第1半导体基板30也可以是氮化物半导体基板、GaO基板、或者金刚石半导体基板。第1半导体基板30以其基板面与xy面平行的方式配置。另外,第1半导体基板30是半导体基板的一个例子。
第1漏极电极2在第1半导体基板30之下与第1半导体基板30的下侧的基板面相接地设置。换言之,第1半导体基板30设于第1漏极电极2之上。第1漏极电极2是例如包含铜、银或者金且与xy面平行地配置的、具有板状或者薄膜状的形状的电极。在实施方式的第1半导体装置110中,第1半导体基板30使用公知的第1导电性膏3固定在第1漏极电极2上。另外,第1漏极电极2是第1电极的一个例子。
第1源极电极4在第1半导体基板30之上与第1半导体基板30的上侧的基板面相接地设置。第1源极电极4是例如包含铜、银或者金且与xy面平行地配置的、具有板状或者薄膜状的形状的电极。另外,第1源极电极4是第2电极的一个例子。
第1端子90与第1漏极电极2、第1半导体基板30以及第1源极电极4在y方向上分离地设置。第1端子90例如由铜形成。另外,第1端子90是端子的一个例子。
接合线40具有一端40a和另一端40b。在一端40a设有接合部50a,接合于第1源极电极4。在另一端40b设有接合部50f,接合于第1端子90。另外,接合线40在一端40a与另一端40b之间的接合部50b、50c以及50d处,与第1源极电极4接合。另外,接合线40是第1接合线的一个例子。另外,一端40a以及另一端40b是第1一端以及第1另一端的一个例子。
接合部50a是凸块。接合线通过接线机的毛细管前端部向成为接合对象的电极上供给,用于引线接合。通过接合线前端的加热,接合线的一部分熔融,形成球部分。在该状态下,使用毛细管前端部将球部分按压于电极并加重或施加超声波振动的话,则在电极上形成凸块。另外,接合部50a是第1接合部的一个例子。
接合部50b、50c、50d以及50f是针脚(stitch)。针脚是接合线不被加热而使用毛细管前端部按压于电极上、并加重或施加超声波振动而形成的。另外,接合部50b、50c、50d以及50f的部分的接合线的直径有通过被按压于电极上而成为原始直径的1/2~1/3左右的情况。形成接合部50f后,接合线40使用接线机所配备的切断部而被切断。另外,接合部50f是第2接合部的一个例子。另外,接合部50b是第5接合部或者第9接合部的一个例子。
接合线41具有一端41a和另一端41b。在一端41a设有接合部51a,接合于第1源极电极4。在另一端41b设有接合部51f,接合于第1端子90。另外,接合线41在一端41a与另一端41b之间的接合部51b以及51c处,与第1源极电极4接合。另外,接合线41是第2接合线的一个例子。另外,一端41a以及另一端41b是第2一端以及第2另一端的一个例子。
接合部51a是凸块。接合部51b、51c以及51f是针脚。另外,接合部51a是第3接合部的一个例子。另外,接合部51f是第4接合部的一个例子。
接合线42具有一端42a和另一端42b。在一端42a设有接合部52a,接合于第1源极电极4。在另一端42b设有接合部52f,接合于第1端子90。另外,接合线42在一端42a与另一端42b之间的接合部52b、52c以及52d处,与第1源极电极4接合。
接合部52a是凸块。接合部52b、52c、52d以及52f是针脚。
接合线43具有一端43a和另一端43b。在一端43a设有接合部53a,接合于第1源极电极4。在另一端43b设有接合部53f,接合于第1端子90。另外,接合线43在一端42a与另一端42b之间的接合部53b以及53c处,与第1源极电极4接合。
接合部53a是凸块。接合部53b、53c以及53f是针脚。
接合线44具有一端44a和另一端44b。在一端44a设有接合部54a,接合于第1源极电极4。在另一端44b设有接合部54f,接合于第1端子90。另外,接合线44在一端44a与另一端44b之间的接合部54b、54c以及54d处,与第1源极电极4接合。
接合部54a是凸块。接合部54b、54c、54d以及54f是针脚。
接合线40、41、42、43以及44都是含有铜且直径为100μm以下的铜接合线。另外,作为接合线40、41、42、43以及44,也可以使用例如由钯(Pd)等其他材料覆膜的铜接合线。
在与第1半导体基板30的基板面平行的面内,形成在第1源极电极4上的接合部中的邻接的接合部彼此的距离相等。例如,若以接合线40所具有的接合部50a、50b、50c以及50d、以及接合线41所具有的接合部51a、51b以及51c为例,则接合部50a与接合部50b之间的距离、接合部50b与接合部50c之间的距离、接合部50c与接合部50d之间的距离、接合部50a与接合部51a之间的距离、接合部51a与接合部50b之间的距离、接合部51a与接合部51b之间的距离、接合部51b与接合部51c之间的距离、接合部50b与接合部51b之间的距离、接合部51b与接合部50c之间的距离、接合部50c与接合部51c之间的距离以及接合部51c与接合部50d之间的距离分别相互相等。这里,接合部间的距离例如是各个接合部的中心部间的距离。另外,若将各个接合部的中心部投影到基板面、然后测定投影的部分间的距离,则能够准确测定距离,因此优选。另外,虽然有因接线机的毛细管的xy面内的移动的精度的问题而在距离上产生约5%的偏差的情况,但即使产生了这样的距离的偏差,在本说明书中接合部间的距离也视为“相等”。
另外,形成于第1源极电极4上的接合部中的、邻接的接合部彼此的距离优选的是200μm以上1000μm以下。
接合线40、41、42,43以及44都以沿y方向延伸的状态接合。因此,例如若将接合线40的接合部50a与接合部50d之间的部分、接合线41的接合部51a与接合部51c之间的部分、接合线42的接合部52a与接合部52d之间的部分、接合线43的接合部53a与接合部53c之间的部分以及接合线44的接合部54a与接合部54d之间的部分投影到第1半导体基板30的基板面,则都相互平行,并与y方向平行。
若图2(b)所示的第1源极电极4的表面与接合线所成的角θ过大,则容易引发接合线从第1源极电极4的剥离或接合线的断裂。第1源极电极4的表面与接合线所成的角θ优选的是20度以下,更优选的是15度以下。
图3是实施方式的第2半导体装置120的示意图。另外,关于与图2所示的第1半导体装置110相同的点,省略记载。
第2漏极电极5在第2半导体基板32之下与第2半导体基板32的下侧的基板面相接地设置。换言之,第2半导体基板32设于第1漏极电极2之上。在实施方式的第2半导体装置120中,第2半导体基板32使用公知的第2导电性膏6固定在第2漏极电极5上。另外,第2漏极电极5是第3电极的一个例子。
第2源极电极7在第2半导体基板32之上与第2半导体基板32的上侧的基板面相接地设置。另外,第2源极电极7是第4电极的一个例子。
第2端子92与第2漏极电极5、第2半导体基板32以及第2源极电极7在y方向上分离地设置。第2端子92例如由铜形成。
接合线60具有一端60a和另一端60b。在一端60a设有接合部70a,接合于第2源极电极7。在另一端60b设有接合部70f,接合于第2端子92。另外,接合线60在一端60a与另一端60b之间的接合部70b、70c以及70d处,与第2源极电极7接合。另外,接合线60是第3接合线的一个例子。另外,一端60a以及另一端60b是第3一端以及第3另一端的一个例子。
接合部70a是凸块。接合部70b、70c、70d以及70f是针脚。另外,接合部70a是第5接合部的一个例子。另外,接合部70f是第6接合部的一个例子。另外,接合部70b是第10接合部的一个例子。
接合线61具有一端61a和另一端61b。在一端61a设有接合部71a,接合于第2源极电极7。在另一端61b设有接合部71f,接合于第2端子92。另外,接合线61在一端61a与另一端61b之间的接合部71b以及71c处,与第2源极电极7接合。另外,接合线61是第4接合线的一个例子。另外,一端61a以及另一端61b是第4一端以及第4另一端的一个例子。
接合部71a是凸块。接合部71b、71c以及71f是针脚。另外,接合部71a是第7接合部的一个例子。另外,接合部71f是第8接合部的一个例子。
接合线62具有一端62a和另一端62b。在一端62a设有接合部72a,接合于第2源极电极7。在另一端62b设有接合部72f,接合于第2端子92。另外,接合线62在一端62a与另一端62b之间的接合部72b、72c以及72d处,与第2源极电极7接合。
接合部72a是凸块。接合部72b、72c、72d以及72f是针脚。
接合线63具有一端63a和另一端63b。在一端63a设有接合部73a,接合于第2源极电极7。在另一端63b设有接合部73f,接合于第2端子92。另外,接合线63在一端63a与另一端63b之间的接合部73b、73c处,与第2源极电极7接合。
接合部73a是凸块。接合部73b、73c以及73f是针脚。
接合线64具有一端64a和另一端64b。在一端64a设有接合部73a,接合于第2源极电极7。在另一端64b设有接合部74f,接合于第2端子92。另外,接合线64在一端64a与另一端64b之间的接合部74b、74c以及74d处,与第1源极电极4接合。
接合部74a是凸块。接合部74b、74c、74d以及74f是针脚。
在与第2半导体基板32的基板面平行的面内,形成于第2源极电极7上的接合部中的邻接的接合部彼此的距离相等。
接合线60、61、62、63以及64都以沿y方向延伸的状态被接合。因此,例如若将接合线60的接合部70a与接合部70d之间的部分、接合线61的接合部71a与接合部71c之间的部分、接合线62的接合部72a与接合部72d之间的部分、接合线63的接合部73a与接合部73c之间的部分以及接合线64的接合部74a与接合部74d之间的部分投影到第2半导体基板32的基板面,则都相互平行,并与y方向平行。
图4是实施方式的第1半导体元件34的示意剖面图。
图4(a)所示的第1半导体元件34是DiMOSFET(Double Implanted MOSFET)。
第1半导体元件34具有第1集电极层10、第1漂移层12、第1基极层16、第1源极层18、第1栅极绝缘膜20、以及第1栅极电极22。另外,第1半导体元件34是半导体元件的一个例子。
n+型的第1集电极层10设于第1半导体基板30内,经由第1导电性膏3电连接于第1漏极电极2。另外,第1集电极层10是第1半导体层的一个例子。
n型的第1漂移层12设于第1半导体基板30内的第1集电极层10之上。另外,第1漂移层12是第2半导体层的一个例子。
p型的第1基极层16设于第1半导体基板30内的第1漂移层12之上。另外,第1基极层16的一部分与第1半导体基板30之上的基板面相接地设置。另外,第1基极层16是第1半导体区域的一个例子。
n+型的第1源极层18在第1半导体基板30内的第1基极层16与第1源极电极4之间,与第1半导体基板30的上侧的基板面相接地设置。而且,第1源极层18与第1源极电极4电连接。另外,第1源极层18是第2半导体区域的一个例子。
第1栅极绝缘膜20设于第1半导体基板30的第1漂移层12上。在第1半导体基板30是Si基板的情况下,第1栅极绝缘膜20例如由氧化硅形成。另外,第1栅极绝缘膜20是绝缘膜的一个例子。
第1栅极电极22设于第1栅极绝缘膜20内的第1栅极绝缘膜20的一部分之上。另外,第1栅极电极22是第1控制电极或者控制电极的一个例子。
在第1半导体基板30内,沿x方向以及y方向排列地设有多个第1半导体元件34。而且,多个第1半导体元件34以并联的方式连接于第1漏极电极2与第1源极电极4之间。第1漏极电极2以及第1源极电极4利用多个第1半导体元件34而共通地使用。
图4(b)所示的第1半导体元件34是IGBT,除了集电极层是p+型之外与图4(a)所示的MOSFET相同。作为第1半导体元件34,图4(a)所示的MOSFET、图4(b)所示的IGBT的哪一个都能够优选使用。
图5是实施方式的第2半导体元件36的示意剖面图。图5(a)所示的第2半导体元件36是DiMOSFET。图5(b)所示的第2半导体元件36是IGBT。第2半导体元件36具有第2集电极层11、第2漂移层13、第2基极层17、第2源极层19、第2栅极绝缘膜21、以及第2栅极电极23。另外,第2栅极电极23是第2控制电极的一个例子。
接下来,记载本实施方式的半导体装置以及驱动电路的作用效果。
源极电极的膜厚通常为约1μm~3μm,非常薄。作为经由该源极电极以尽可能低的电阻成分取出利用半导体元件进行了开关等的电力的手段,将铝制接合线连接于板状的源极电极。但是,铝制接合线由于电阻率高,因此存在电力转换效率下降这一问题。
因此,为了降低电阻率,考虑使铝制接合线的根数增加。但是,若为了尽可能增多接合线的根数,改变接合于源极电极上的接合线的环的高度而进行引线接合,则存在半导体装置整体的高度变高、不适合轻薄化这一问题。
另外,考虑使用直径大的铝制接合线。但是,在这种情况下,在引线接合时,会更强地将毛细管前端部按压于源极电极。因此,有形成于半导体基板内的半导体元件机械式地损伤的情况。另外,有半导体元件彼此产生电短路的情况。
能够通过取代接合线而使用带部来降低电阻率。但是,若欲将带部的接合部等间隔地设于源极电极上,则存在将邻接的其他带部的一部分加热而熔化这一问题。
另外,考虑使用例如铜制的夹具,在板状的源极电极的整个面通过焊料等将夹具的表面接合。但是,在利用焊料进行接合时,焊料所含的焊剂(树脂,日文:ヤニ)将会在源极电极的周边飞散。周边的部件会因焊剂引发腐蚀,因此有必须将飞散的焊剂去除这一问题。
因此,在实施方式的半导体装置中,使用了含有铜且直径为100μm以下的接合线。含有铜的接合线的电阻率比含有铝的接合线的电阻率低。因此,即使使用直径为100μm以下的直径小的接合线,电阻率也比铝制接合线低。另外,由于直径为100μm以下这样小,因此即使不将毛细管前端部强力按压于源极电极,也能使接合线接合于源极电极。因此,能够抑制对设于半导体基板内的半导体元件造成损伤或引发电气短路的情况。由此,能够提供减少了导通电阻的半导体装置。
如上述那样,在半导体基板内,沿x方向以及y方向排列地设有多个半导体元件。利用半导体元件进行了开关等的电力经由距该半导体元件最近的接合部被取出。由此,在邻接的接合部彼此的距离具有偏差的情况下,有如下问题,即:担心设置有设于距接合部极远的位置的半导体元件,导致连带着电力转换效率降低。
因此,通过使形成于源极电极上的接合部中的邻接的接合部彼此的距离相等,不再设置设于距接合部极远的位置的半导体元件。由此,能够提供减少了导通电阻的半导体装置。
凸块由于在接合线前端形成球而接合于源极电极,因此是可靠性高的接合部。因此,通过使接合线的一端的接合部为凸块,能够提供可靠性更高的半导体装置。
形成于源极电极上的接合部中的邻接的接合部彼此的距离优选的是,200μm以上1000μm以下。在超过1000μm的情况下,在设于远离接合部的位置的晶体管流过的电流流入到接合部为止的源极电极中的电阻将会变得过大。另一方面,在小于200μm的情况下,源极电极的表面与接合线所成的角θ将会变得过大,容易引起接合线的剥离或断裂。
通过将各接合线的接合部与接合部之间的部分投影到半导体基板的基板面时相对于y方向等特定的方向设为平行,从而易于使邻接的接合部彼此的距离相等。由此,能够提供进一步减少了导通电阻的半导体装置。
虽然说明了本发明的几个实施方式以及实施例,但这些实施方式以及实施例是作为例子而提出的,并不意图限定发明的范围。这些新的实施方式能够以其他各种方式实施,在不脱离发明的主旨的范围内能够进行各种省略、替换、变更。这些实施方式及其变形包含在发明的范围及主旨中,并且包含在权利要求书所记载的发明和其等效的范围内。

Claims (10)

1.一种半导体装置,具备:
第1电极;
半导体基板,设于所述第1电极上,具有电连接于所述第1电极的半导体元件;
第2电极,设于所述半导体基板上,电连接于所述半导体元件;
与所述第1电极、所述半导体基板以及所述第2电极分离地设置的端子;
第1接合线,具有第1一端和第1另一端,在所述第1一端设有接合于所述第2电极的第1接合部,在所述第1另一端设有接合于所述端子的第2接合部,所述第1接合线含有铜且直径为100μm以下;以及
第2接合线,具有第2一端和第2另一端,在所述第2一端设有接合于所述第2电极的第3接合部,在所述第2另一端设有接合于所述端子的第4接合部,所述第2接合线含有铜且直径为100μm以下。
2.如权利要求1所述的半导体装置,其中,
所述第1接合线还具有设于所述第1一端与所述第1另一端之间并接合于所述第2电极的第5接合部,
所述第1接合部与所述第3接合部的距离、所述第1接合部与所述第5接合部的距离、以及所述第3接合部与所述第5接合部的距离相等。
3.如权利要求1所述的半导体装置,其中,
所述第1接合线还具有设于所述第1一端与所述第1另一端之间并接合于所述第2电极的第5接合部,
所述第1接合部以及所述第3接合部是凸块,
所述第2接合部、所述第4接合部以及所述第5接合部是针脚。
4.如权利要求2或3所述的半导体装置,其中,
所述第1接合部与所述第5接合部的距离是200μm以上且1000μm以下。
5.如权利要求1至3中任一项所述的半导体装置,其中,
所述第1接合线的投影到半导体基板面的部分和所述第2接合线的投影到所述半导体基板面的部分相互平行。
6.如权利要求1至3中任一项所述的半导体装置,其中,
所述半导体元件是晶体管。
7.如权利要求1至3中任一项所述的半导体装置,其中,
所述半导体元件具有:
第1半导体层,设于所述第1电极上,电连接于所述第1电极;
第1导电型的第2半导体层,设于所述第1半导体层上;
第2导电型的第1半导体区域,设于所述第2半导体层上;
第1导电型的第2半导体区域,设于所述第1半导体区域与所述第2电极之间,电连接于所述第2电极;
绝缘膜,设于所述第2半导体层上;以及
控制电极,设于所述绝缘膜上。
8.如权利要求7所述的半导体装置,其中,
所述第1半导体层是第1导电型。
9.如权利要求7所述的半导体装置,其中,
所述第1半导体层是第2导电型。
10.一种驱动电路,具备:
第1半导体装置,具有:第1电极;第1半导体基板,设于所述第1电极上,具备具有第1控制电极且电连接于所述第1电极的第1半导体元件;第2电极,设于所述第1半导体基板上,电连接于所述第1半导体元件;与所述第1电极、所述第1半导体基板以及所述第2电极分离地设置的第1端子;第1接合线,具有第1一端和第1另一端,在所述第1一端设有接合于所述第2电极的第1接合部,在所述第1另一端设有接合于所述第1端子的第2接合部,所述第1接合线含有铜且直径为100μm以下;以及第2接合线,具有第2一端和第2另一端,在所述第2一端设有接合于所述第2电极的第3接合部,在所述第2另一端设有接合于所述第1端子的第4接合部,所述第2接合线含有铜且直径为100μm以下;
第2半导体装置,具有:第3电极,电连接于所述第2电极;第2半导体基板,设于所述第3电极上,具备具有第2控制电极且电连接于所述第3电极的第2半导体元件;第4电极,设于所述第2半导体基板上,电连接于所述第2半导体元件;与所述第3电极、所述第2半导体基板以及所述第4电极分离地设置的第2端子;第3接合线,具有第3一端和第3另一端,在所述第3一端设有接合于所述第4电极的第5接合部,在所述第3另一端设有接合于所述第2端子的第6接合部,所述第3接合线含有铜且直径为100μm以下;以及第4接合线,具有第4一端和第4另一端,在所述第4一端设有接合于所述第4电极的第7接合部,在所述第4另一端设有接合于所述第2端子的第8接合部,所述第4接合线含有铜且直径为100μm以下;以及
控制元件,连接于所述第1控制电极以及所述第2控制电极。
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