CN110380699A - Input buffer, differential input buffer and integrated circuit - Google Patents
Input buffer, differential input buffer and integrated circuit Download PDFInfo
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- CN110380699A CN110380699A CN201910689992.6A CN201910689992A CN110380699A CN 110380699 A CN110380699 A CN 110380699A CN 201910689992 A CN201910689992 A CN 201910689992A CN 110380699 A CN110380699 A CN 110380699A
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- H—ELECTRICITY
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- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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Abstract
A kind of input buffer, differential input buffer and integrated circuit, input buffer includes current source, the main source follower that the first transistor is made of and the auxiliary source follower that at least one second transistor is made of of the in the same direction or differential concatenation between power supply and common potential, the grid of the first transistor and the second transistor connects the input as input buffer altogether, output of the total contact as the input buffer between the current source and the main source follower.Two source followers are constituted using different crystal pipe, it is one of to be used as main source follower,, as auxiliary source follower, the effect of auxiliary source follower is the channel-length modulation for eliminating main source follower for another, to increase substantially the linearity and gain accuracy of main source follower.
Description
Technical field
The application belongs to CMOS integrated device technology field more particularly to a kind of input buffer, differential input buffer
And integrated circuit.
Background technique
The signal that nature generates is being macroscopically analog quantity.Such as: high-quality microphone exports when receiving band's sound
Voltage magnitude is from several microvolts to several hundred millivolts；Photronic electric current in video camera is down to every millisecond of several electronics；Earthquake
The several hundred millivolts of several microvolts when the range for the output voltage that instrument sensor generates is from small earth oscillation to violent earthquake.Due to
All these signals finally all must carry out various processing in digital field, so we have seen that, each such system
All it is made of an analog-digital converter (ADC) and a digital signal processor (DSP).And in fact, the electricity of natural sector signal
Form may be small to ADC direct digitization cannot be used, and these signals are also usually containing some harmful, out-of-band dry
It disturbs.Therefore the front end of ADC usually requires to increase the level that amplifier is used to enhance signal, increases analog filter and is used to inhibit to believe
Number out-of-band ingredient.In this link, preamplifier, filter and analog-digital converter belong to analog circuit, each
A is all independent research special topic.
Preamplifier is in the chopped-off head of signal processing link, directly facing sensor and signal, its noise and linear
Degree, directly determines the level that whole system is likely to be breached, is the bottleneck of the performance of whole system.Its power consumption, often also accounts for
To a big chunk of entire signal processing link Power budgets.In addition, what is faced is core since it is directly facing sensor
Various scene, some sensors even can not provide effective common-mode voltage (electric current and electricity in such as electric energy meter at all outside piece
Pressure sensor, 0) common mode electrical level of signal is, it means that and preamplifier must also handle the inappropriate situation of common mode electrical level,
Level shift appropriate is first carried out, then is amplified.Most of sensor output is high impedance, load can not be driven, if directly
Driving ADC is met, since ADC input impedance is finite value, can be divided with sensor internal resistance, to cause sensor itself
Distortion.Therefore preamplifier must also handle the finite output impedance problem of sensor, realize between sensor and chip
Impedance isolation.This circuit is known as input buffer, is placed in the front end of signal processing link.The major technique of input buffer
Index includes: gain accuracy, noise, the linearity, input and output impedance, power consumption, and whether has the function of level shift etc..
Ideal input buffer has constant unit gain (gain 1), and noiseless is undistorted, no mismatch, input impedance without
Thoroughly, output impedance is the characteristics such as 0.In reality, input buffer is as other analog circuits, it then follows Analog Circuit Design
" octagon rule ", there are serious compromises (tradeoff) between these indexs.Design an extremely low noise, high linear
Degree, while guaranteeing the input buffer that other aspects performance does not deteriorate, and is an extremely difficult or even often impossibility
Feelings.
Currently used input buffer structure includes: 1, is based on operational amplifier, and the closed loop for being connected into unit gain is anti-
Present structure.It has the advantages that input impedance is infinitely great, and output impedance is extremely low, and unit gain is extremely accurate, and the linearity is good, each
Kind occasion occurs extensively.The problem of this structure maximum is circuit complexity, and noise is big, and input signal needs to provide suitable biasing
Voltage.2, source follower (source-follower) structure based on single PMOS tube.It has input impedance infinity, circuit
The advantages that very simple.Due to being open loop structure, do not feed back, therefore its output impedance is that a limited value (generally exists
1k Ω or so depends on size of current), it is limited to channel-length modulation gain accuracy and the linearity is general.3, based on single
The source follower structure of PNP pipe.It has circuit structure simple, the gain accuracy and linearity is extremely well (does not have channel length tune
Effect processed) the advantages that.But it due to being open loop structure, does not feed back, therefore its output impedance is equally a limited value (one
As in 1k Ω or so, depend on size of current).In addition, this structure is not major problem is that input impedance is that infinite (this is
The characteristic of BJT pipe, base stage will walk electric current), cause impedance isolation effect bad.Secondly it needs the branch of BiCMOS special process
It holds.
Summary of the invention
The application's is designed to provide a kind of input buffer, differential input buffer and integrated circuit, it is intended to solve
The input buffer that the source follower of certainly traditional single PMOS tube is constituted is limited to channel-length modulation gain accuracy and line
The property general problem of degree.
The first aspect of the embodiment of the present application provides a kind of input buffer, including in the same direction or differential concatenation in power supply and
It current source between common potential, the main source follower being made of the first transistor and is made of at least one second transistor
Auxiliary source follower, the grid of the first transistor and the second transistor meets the input as input buffer, institute altogether
Output of the total contact between current source and the main source follower as the input buffer is stated, the auxiliary source follower is used
In the channel-length modulation for eliminating the main source follower.
It in one of the embodiments, further include the first level shift module, the first level shift module is connected to
Between the current source and the main source follower, the total contact between the first level shift module and the current source is made
For the output of the input buffer, the first level shift module is for increasing output level displacement.
It in one of the embodiments, further include second electrical level shift module, the second electrical level shift module is connected to
Between the main source follower and the auxiliary source follower, the second electrical level shift module is for increasing output level displacement.
The first transistor and the second transistor are PMOS tube in one of the embodiments, and described first is brilliant
The source electrode of body pipe connects power supply by the current source, is connected to described first after at least one described second transistor series aiding connection
Between the drain electrode and common potential of transistor.
The first transistor and the second transistor are NMOS tube in one of the embodiments, and described first is brilliant
The source electrode of body pipe connects common potential by the current source, is connected to after at least one described second transistor series aiding connection described
Between the drain electrode and power supply of the first transistor.
The first transistor and the second transistor work in saturation region in one of the embodiments,.
The threshold voltage of the first transistor is greater than the threshold value electricity of the second transistor in one of the embodiments,
Pressure.
The threshold voltage of the first transistor is greater than the threshold value electricity of the second transistor in one of the embodiments,
Pressure relationship are as follows: | Vth1 |-| Vth0 | >=| Vod0 |+margin；
Wherein, Vth1 is the threshold voltage of the first transistor, and Vth0 is the threshold voltage of the second transistor,
Vod0 is the overdrive voltage of the second transistor, and margin is voltage margin.
The second aspect of the embodiment of the present application provides a kind of differential input buffer, including two inputs as described above
Two inputs of buffer, two input buffers are used for access differential signal.
The third aspect of the embodiment of the present application provides a kind of integrated circuit, including input buffer as described above.
Above-mentioned input buffer constitutes two source followers using different crystal pipe, one of to follow as main source
Device, as auxiliary source follower, the effect of auxiliary source follower is the channel-length modulation for eliminating main source follower for another, from
And increase substantially the linearity and gain accuracy of main source follower.
Detailed description of the invention
It in order to more clearly explain the technical solutions in the embodiments of the present application, below will be to embodiment or description of the prior art
Needed in attached drawing be briefly described, it should be apparent that, the accompanying drawings in the following description is only some of the application
Embodiment for those of ordinary skill in the art without any creative labor, can also be according to these
Attached drawing obtains other attached drawings.
Figure 1A and 1B is respectively two kinds of structural schematic diagrams of input buffer provided by the embodiments of the present application；
Fig. 2 is the exemplary circuit schematic diagram of input buffer embodiment one shown in figure 1A；
Fig. 3 is the exemplary circuit schematic diagram of input buffer embodiment two shown in figure 1A；
Fig. 4 is the exemplary circuit schematic diagram of input buffer embodiment three shown in Figure 1B；
Fig. 5 is the exemplary circuit schematic diagram of input buffer example IV shown in Figure 1B；
Fig. 6 is the exemplary circuit schematic diagram of input buffer embodiment five shown in figure 1A；
Fig. 7 is the exemplary circuit schematic diagram of input buffer embodiment six shown in figure 1A；
Fig. 8 is the source follower structure input buffer circuit schematic diagram that traditional single PMOS tube is constituted and its input/defeated
Signal waveforms out；
Fig. 9 is the circuit diagram and its input/output signal waveform diagram of input buffer shown in Fig. 2；
Figure 10 A is the exemplary circuit schematic diagram of differential input buffer embodiment one provided by the embodiments of the present application；
Figure 10 B is the exemplary circuit schematic diagram of differential input buffer embodiment two provided by the embodiments of the present application.
Specific embodiment
It is with reference to the accompanying drawings and embodiments, right in order to which the objects, technical solutions and advantages of the application are more clearly understood
The application is further elaborated.It should be appreciated that specific embodiment described herein is only used to explain the application, and
It is not used in restriction the application.
Figure 1A and Figure 1B are please referred to, the input buffer that the first aspect of the embodiment of the present application provides includes series aiding connection
Current source Iss between power Vcc and common potential Vss of (see Figure 1A) or differential concatenation (see Figure 1B), by the first transistor
The main source follower 100 constituted and the auxiliary source follower 200 that is made of at least one second transistor, the first transistor and the
The grid of two-transistor connects the input as input buffer altogether, and the total contact between current source Iss and main source follower 100 is made
For the output of input buffer, auxiliary source follower 200 is used to eliminate the channel-length modulation of main source follower 100.We
Case be the composition of single metal-oxide-semiconductor input buffer on the basis of improve, main source follower 100 or single transistor, auxiliary source follows
Device 200 is single or multiple concatenated transistors.And current source Iss, main source follower 100 and auxiliary source follower 200 are successively
It is connected between power Vcc and common potential Vss (as greatly) forward or backwards, is p-type or N-type depending on transistor.It is defeated
Enter buffer and constitute two source followers using different crystal pipe, one of to be used as main source follower, another is as auxiliary source
Follower, the effect of auxiliary source follower is the channel-length modulation for eliminating main source follower, to increase substantially main source
The linearity and gain accuracy of follower.
Embodiment one:
Referring to Fig. 2, the first transistor and second transistor are PMOS tube, then current source Iss, main source follower 100
And auxiliary source follower 200 is sequentially connected in series between power Vcc and common potential Vss, the source electrode of the first transistor passes through electric current
Source Iss connects power Vcc, and the drain electrode and common potential of the first transistor are connected to after at least one second transistor series aiding connection
Between Vss.Specifically, the first transistor is PMOS tube PM1, and second transistor is PMOS tube PM0, and the substrate of PMOS tube PM0 connects
Its source electrode, PMOS tube PM0 grounded drain；The substrate of PMOS tube PM1 connects its source electrode, and the drain electrode of PMOS tube PM1 connects PMOS tube PM0's
Source electrode.Current source Iss provides bias current, it is placed between power Vcc and the source electrode of PMOS tube PM1, bias current direction
To flow to PMOS tube PM1 from power Vcc.Input signal vin is applied to the input grid of PMOS tube PM0 and PMOS tube PM1 simultaneously
On extremely, output signal vout is derived from the source electrode of PMOS tube PM1.
Embodiment two:
Referring to Fig. 3, the present embodiment is the tandem junction for expanding to multiple PMOS source followers on the basis of example 1
Structure, wherein the first transistor PMOS tube PM1 constitutes " master " source follower, remaining second transistor PMOS tube PM_a0~PM_an
Constitute auxiliary source follower 200 together, the grid of PMOS tube PM1 and PMOS tube PM_a0~PM_an are connect altogether as input buffer
Input, output signal vout is derived from the source electrode of the PMOS tube PM1 of the output as input buffer.
Embodiment three:
Referring to Fig. 4, the first transistor and second transistor are NMOS tube, then auxiliary source follower 200, main source follower
100 and current source Iss is sequentially connected in series between power Vcc and common potential Vss, and the source electrode of the first transistor passes through current source
Iss meets common potential Vss, and the drain electrode and power Vcc of the first transistor are connected to after at least one second transistor series aiding connection
Between.Specifically, the first transistor is NMOS tube NM1, second transistor NMOS tube NM0, and the substrate of NMOS tube NM0 connects its source
Pole, NMOS tube NM0 drain electrode connect power Vcc；The substrate of NMOS tube NM1 connects its source electrode, and the drain electrode of NMOS tube NM1 meets NMOS tube NM0
Source electrode.Current source Iss provides bias current, it is placed between common potential Vss and the source electrode of NMOS tube NM1, biased electrical
Stream direction is to flow to common potential Vss from NMOS tube NM1.Input signal vin is applied to NMOS tube NM0 and NMOS tube simultaneously
On the input grid of NM1, output signal vout is derived from the source electrode of NMOS tube NM1.In the present embodiment, followed using 2 sources NMOS
The cascaded structure that device is constituted, 2 PMOS tube structure perfect dualities with embodiment one.This when input signal vin common mode
Level can be very high, such as directly takes supply voltage.
Example IV:
Referring to Fig. 5, the present embodiment is the tandem junction for expanding to multiple NMOS source followers on the basis of embodiment three
Structure, wherein the first transistor NMOS tube NM1 constitutes main source follower, remaining second transistor NMOS tube NM_a0~NM_an is together
Constitute auxiliary source follower 200, the grid of NMOS tube NM1 and NMOS tube NM_a0~NM_an are connect altogether as the defeated of input buffer
Enter, output signal vout is derived from the source electrode of the NMOS tube NM1 of the output as input buffer.Multiple sources NMOS of the present embodiment
The cascaded structure of follower and the cascaded structure perfect duality of multiple PMOS source followers in embodiment two.
Embodiment five:
Referring to Fig. 6, the present embodiment be embodiment one to four any one on the basis of expand to increase a direct current
The structure of level shift module 300.In the present embodiment, level shift module 300 is connected to current source Iss and main source follower
Between 100, output of the total contact as input buffer between level shift module 300 and current source Iss, level shift mould
Block 300 is for increasing output level displacement.Wherein, main and auxiliary source follower 200 is not limited to PMOS tube or NMOS tube, and auxiliary source follows
The metal-oxide-semiconductor quantity of device 200 is also unlimited.
In example shown in Fig. 6, DC level shift module 300 is resistance R0, is serially connected in output and main source follower
Between PMOS tube PM1, be able to solve depend merely on PMOS tube PM1 pipe can make output level displacement not enough, this when increases level
Shift module 300 can further increase DC level displacement, while not influence signal quality.In other embodiments, electric
Resistance R0 could alternatively be a circuit module, regardless of the specific implementation of this circuit module, as long as its function is to increase direct current
Level shift, while signal quality is not influenced, then being exactly the protection scope for belonging to this programme.
Embodiment six:
Referring to Fig. 7, the present embodiment be embodiment one to four any one on the basis of expand to increase a direct current
The structure of level shift module 400.In the present embodiment, level shift module 400 is connected to main source follower 100 and auxiliary source follows
Between device 200, level shift module 400 is for increasing output level displacement.Wherein, main and auxiliary source follower 200 is not limited to PMOS
Pipe or NMOS tube, the metal-oxide-semiconductor quantity of auxiliary source follower 200 are also unlimited.In addition, the scheme in the present embodiment can be with embodiment five
Scheme be applied in combination.
In example shown in Fig. 7, DC level shift module 400 is resistance R1, is serially connected in the PMOS of main source follower 100
Between pipe PM1 and the PMOS tube PM0 of auxiliary source follower 200.It is able to solve and depends merely on PMOS tube PM1 pipe and can output level be shifted
Not enough, DC level displacement can be further increased by increasing level shift module 400 this when, while not influence signal matter
Amount.In other embodiments, resistance could alternatively be a circuit module, regardless of the specific implementation of this circuit module, only
The function of wanting it is to increase DC level displacement, while not influencing signal quality, then being exactly the protection scope for belonging to this programme.
It is and right although Fig. 6,7 being illustrated by taking 2 grades of MOS source follower cascaded structures as an example it must be noted that as above-mentioned
Be in multistage MOS source follower cascaded structure it is applicable, in these structures be inserted into level shift module, belong to protection model
It encloses.
, below will be using the first transistor and second transistor as PMOS tube please continue to refer to Fig. 2, and auxiliary source follower 200
To illustrate relative theory for a PMOS tube.Specifically, the core of input buffer use 2 PMOS tube PM0 and
PM1 and current source Iss.Therefore structurally, the two PMOS tube PM0 and PM1 be all constitute source follower, but
Its input is connected in parallel, and output " series connection " is together.PMOS tube PM1 constitutes " master " source follower, and PMOS tube PM0 constitutes " auxiliary "
Source follower；The presence of PMOS tube PM0 has carried out linearization process to PMOS tube PM1, so that the linearity of PMOS tube PM1 is substantially
It improves, and output signal vout is exactly generated by PMOS tube PM1.Just because of this cleverly connection relationship, just make linear
Degree greatly improves, and gain accuracy greatly improves, and other aspects performance is (such as output impedance, noise, power consumption, voltage margin
Consumption) it is suitable with common single PMOS tube source follower.This is very rare phenomenon in Analog Circuit Design field, because
In Analog Circuit Design field, various compromises (tradeoff) are filled with, usually a kind of circuit framework is than another kind in certain side
When the excellent performance of face, often brought using sacrificing other aspects performance as cost.
In Fig. 2 structure, PMOS tube PM0 and PMOS tube PM1 need fine design and choose size, to guarantee to allow 2
MOS works in saturation region, and this is that effective basic demand is answered in the performance of this structure.PMOS tube PM0 work is allowed to be saturated
Area's very comfortable, difficult point be that PMOS tube PM1 is allowed to work in saturation region, it must satisfy:
|Vds1|≥(|Vgs1|-|Vth1|)+margin
Wherein, Vds1, Vgs1, Vth1, margin are respectively drain-source voltage, gate source voltage, the threshold value electricity of PMOS tube PM1
In general pressure, voltage margin, margin take 100~200mV or so.Assuming that the common mode electrical level of input signal vin is 0, above formula
Further it is written as:
vout-vt≥vout-|Vth1|+margin
Further are as follows:
|Vth1|≥vt+margin
Due to vt=| Vgs0 |=| Vth0 |+Vod0, vt are that the drain electrode of PMOS tube PM1 and the source electrode of PMOS tube PM0 connect altogether
Point voltage, Vgs0, Vth0, Vod0 are gate source voltage, threshold voltage, the overdrive voltage of PMOS tube PM0,Therefore, above formula is further written as:
|Vth1|-|Vth0|≥Vod0+margin≈Vod0+100mV
This means that the threshold voltage of PMOS tube PM1 must be Vod0+margin bigger than the threshold voltage of PMOS tube PM0, i.e.,
At least in 100mV or more.In order to realize this target, at least 2 kinds of feasible solutions:
The first: technique can generally provide the option of a variety of threshold mos pipes.Can choose PM1 is high threshold pipe metal-oxide-semiconductor,
PM0 is Low threshold pipe metal-oxide-semiconductor, this can easily realize target.
Second: passing through fine and cleverly size design realization.Allow PMOS tube PM0 W/L (W be conducting channel width
Degree, L are the length of conducting channel) it is sufficiently large, make its work in subthreshold region, at this moment Vod0 can be very small (such as 50mV).
Allow the L of PMOS tube PM0 that the minimum length under current process is taken (such as 0.35um CMOS technology, to take L=simultaneously
0.35um), and the minimum usually band of L has also carried out lesser threshold voltage.In addition, making the W/L of PMOS tube PM1 as small as possible, while L
It takes (such as 0.35um CMOS technology, taking L=4um) as big as possible under current process, the Vod1 foot of such PMOS tube PM1
Enough big, the channel-length modulation of itself is sufficiently small, and the linearity is also as well as possible.And the biggish L of PMOS tube PM1 generally also band
Biggish threshold voltage is carried out.Like this, by allowing | Vth1 | it is as big as possible, allow | Vth0 | it is as small as possible, allow Vod0 as far as possible
It is small, so that above formula meets, this programme structure bring effect is then played, has further made the linearity more preferable.
Next further analysis, why the proposed structure of this programme can increase substantially the linearity and gain is accurate
Degree, needs to investigate this problem by comparative analysis.
Fig. 8 is the source follower structure input buffer that traditional single PMOS tube is constituted, and substrate connects source electrode.It is input to defeated
Gain out are as follows:
Wherein gm is the mutual conductance of PMOS tube PM1, and gds is the intrinsic admittance of output of PMOS tube PM1.Gm/gds is known as metal-oxide-semiconductor
Intrinsic gain, this usual value is 100 or so, that is to say, that gds ≈ gm/100 usually can be ignored compared to gm, because
This Av is approximately equal to 1.If for the occasion of high-precision and high linearity, the influence of gds cannot be had ignored.Gds influences characterization
Be channel-length modulation, in this structure, gds determines the precision and the linearity of gain completely.Notice gds's
Definition:
Therefore gds is the function of vds (drain-source voltage of metal-oxide-semiconductor).For the source follower of Fig. 8, due to vds=
Vout-0 ≈ vin, so while the influence of gds, gain A v is actually still the minorant of input signal:
Here it is non-linear, then harmonic distortion is just produced.Design and simulation result are shown on typical CMOS processes,
The component of the source follower structure input buffer that this traditional single PMOS tube is constituted, 2 subharmonic and 3 subharmonic is difficult to be lower than
< -80dBc, this means that the measuring system based on this single PMOS tube source follower structure input buffer, number of significant digit
(precision index is defined as ENOB=(SNDR-1.76)/6.02) is at most in 13bits or so, and this is for high-precision applications field
It is far from being enough for conjunction.
By the analysis to Fig. 8, it is understood that bottleneck is gds.It is proposed that patent formula exactly almost
Eliminate the influence of gds.
As shown in figure 9, input signal vin by 2 source followers, generates vout and vt respectively.We are PMOS tube PM1
Referred to as main source follower 100, PMOS tube PM0 are known as auxiliary source follower 200.Vout and vt are nearly all exactly equal to input signal
Vin, the magnitude of error are exactly harmonic component (in a ten thousandth or so of -80dBc or so, that is, signal itself).
It is further noted that PMOS tube PM1,
Vds=vout-vt ≈ vin+o (vin)-[vin+o (vin)]=o (vin) ≈ 0
Mathematically mark is employed herein, small o indicates " being much smaller than ", such as o (vin) indicates the amount for being much smaller than vin.Cause
This, the source electrode and drain electrode of PMOS tube PM1 is to synchronize to follow input wobble signal, but for its difference, almost 0 (is fluctuated
It is exactly a ten thousandth or so in input signal), therefore the variation of imperceptible vds.Since the variation of imperceptible vds, that
The gds of PMOS tube PM1 pipe is also just no better than 0.Therefore, for the circuit structure of the application:
Nonlinear component substantially reduces, therefore significantly reduces harmonic distortion.It is designed in same CMOS technology and imitative
It is true the results show that using the application the new source follower structure input buffer proposed, 2 subharmonic and 3 subharmonic
Component can accomplish < -120dBc, it is meant that the measuring system of the input buffer based on this source follower, number of significant digit is most
Height can achieve the level close to 20bits, enough (usual 16bits or so is relatively common) for high-precision applications occasion.
On the other hand the index to be considered is gain accuracy, this is equally to Guan Chong for high precision measuring system
It wants.In practice, every level-one in signal processing link (buffering isolation, amplification, filtering, analog-to-digital conversion ...) can all introduce increasing
Benefit, and the gain of every level-one can all be influenced by PVT (process deviation, power-supply fluctuation, temperature), it is often extremely complex or even difficult
Accurately to portray.In the influence of PVT:
The influence of usual power-supply fluctuation V can be by being designed to deal with, such as is placed in LDO (Low Dropout
Regulator, low pressure difference linear voltage regulator) under allow V to keep constant.
The influence of usual process deviation P is solved by the calibration link before chip/complete machine factory.So-called calibration is exactly
Yield value Av0 before chip/complete machine factory is write down, is stored in the nonvolatile memory of chip, referred to as demarcates.Normally make
Used time calibrates actual gain Av with Av0.In this way, the process variations between piece and piece are eliminated；
And the influence of temperature T, it must be become pair by outstanding design level and cleverly circuit structure by the gain of circuit
Temperature-insensitive.
For the source follower structure input buffer that traditional single PMOS tube shown in Fig. 8 is constituted, gain are as follows:
Wherein
Gds (PVT) and gm (PVT) be all with high temperature change amount, DEG C range from -40 DEG C to+85, gds (PVT)/
Gm (PVT) variable quantity is often as high as 2 times or more.As before, it is about 0.99 that the representative value of gds/gm, which is about 1%, Av representative value,；
But if Av variation with temperature is up to 1% or more, and this results in very big measurements in view of after the varying with temperature of gds/gm
Error, so that high precision measuring system becomes no longer accurate.Since gds (PVT)/gm (PVT) not only has relationship with T, also have with P
Relationship, it means that for each chips, gds (PVT)/gm (PVT) temperature curve may be all different, so that considering to do
The idea of temperature-compensating becomes not implementable (needing to do temperature-compensating to each, cost is extremely expensive).
But for the patent formula that the application proposes, gain are as follows:
Wherein
Assuming that the value of x itself is about 1%, variation is also about 1% within the scope of total temperature.As before, o (x) is one
The amount of 40dB also smaller than x or so (about 100 times), therefore the value of o (x) itself is about 0.01%, and become within the scope of total temperature
Change is also about 0.01% magnitude, is converted to about 8ppm/ DEG C of temperature coefficient, in terms of the document that can be found at present, this
Belong to most top level, meets the application of most high precision measuring systems.
The source follower that the application constitutes 2 metal-oxide-semiconductors, input terminal are connected in parallel, and output end " series connection " is together.Its
In a metal-oxide-semiconductor as main source follower 100, as auxiliary source follower 200, output takes autonomous source for another or multiple metal-oxide-semiconductors
Follower 100.The effect of auxiliary source follower 200 is the channel-length modulation for eliminating main source follower 100, thus significantly
Improve the linearity and gain accuracy of main source follower 100.
In order to allow the metal-oxide-semiconductor of main and auxiliary source follower 200 all to work in saturation region, the design method of use: one is using
The design method of multi-threshold pipe；The second is using the pipe sizing choosing method more rich in skill.Both methods is in front
It has a detailed description.
The input buffer of the application and integrated circuit linearity degree are extremely well, and gain is extremely accurate；Input signal does not need
It provides additional bias voltage (sensor can be used as common-mode signal with directly taking)；Circuit is extremely simple, and complete with CMOS technology
It is complete compatible, it is not necessarily to particular device；Impedance isolation (input is high impedance, is exported as Low ESR)；Other aspects performance (such as noise,
The consumption of power consumption, voltage margin) it is suitable with common single metal-oxide-semiconductor source follower structure.This is very rare in circuit design field
The phenomenon that seeing.In circuit design field, various compromises (tradeoff) are filled with, a kind of circuit framework ratio is another in certain side
Face excellent performance is often brought using sacrificing other aspects performance as cost.
Figure 10 A and Figure 10 B is please referred to, on the other hand differential input buffer that the embodiment of the present application provides includes two
Two inputs of input buffer as above, two input buffers are used for access differential signal vip, vin.Figure 10 A is to utilize
The differential input buffer that 2 grades of PMOS cascaded structures of Fig. 2 are constituted, Figure 10 B are constituted using 2 grades of NMOS cascaded structures of Fig. 4
Differential input buffer.Difference channel has symmetry, innately has rejection ability to even-order harmonic, therefore have more wide
General use, most amplifier circuits are that occur in the form of difference (or pseudo-differential) in practical application.In Figure 10 A and
In the structure of Figure 10 B, the half of circuit in left and right, principle and performance are just the same, and example one and three can be implemented in specific embodiment
Illustrate, which is not described herein again.
It must be noted that although two input buffers of differential input buffer are with 2 grades with Figure 10 A and Figure 10 B
Illustrate for PMOS or NMOS cascaded structure, in practice for all structures of including but not limited to embodiment one to six,
To constitute difference channel, these belong to the protection scope of the application.
The third aspect of the embodiment of the present application provides a kind of integrated circuit, including input buffer as above.
The foregoing is merely the preferred embodiments of the application, not to limit the application, all essences in the application
Made any modifications, equivalent replacements, and improvements etc., should be included within the scope of protection of this application within mind and principle.
Claims (10)
1. a kind of input buffer, which is characterized in that including electric current of the in the same direction or differential concatenation between power supply and common potential
Source, the main source follower being made of the first transistor and the auxiliary source follower being made of at least one second transistor, it is described
The grid of the first transistor and the second transistor connects the input as input buffer, the current source and the main source altogether
Output of the total contact as the input buffer between follower, the auxiliary source follower are followed for eliminating the main source
The channel-length modulation of device.
2. input buffer as described in claim 1, which is characterized in that it further include the first level shift module, described first
Level shift module is connected between the current source and the main source follower, the first level shift module and the electricity
Output of the total contact as the input buffer between stream source, the first level shift module is for increasing output level
Displacement.
3. input buffer as described in claim 1, which is characterized in that it further include second electrical level shift module, described second
Level shift module is connected between the main source follower and the auxiliary source follower, and the second electrical level shift module is used for
Increase output level displacement.
4. input buffer as described in any one of claims 1 to 3, which is characterized in that the first transistor and described
Two-transistor is PMOS tube, and the source electrode of the first transistor connects power supply by the current source, at least one described second crystalline substance
It is connected between the drain electrode and common potential of the first transistor after body pipe series aiding connection.
5. input buffer as described in any one of claims 1 to 3, which is characterized in that the first transistor and described
Two-transistor is NMOS tube, and the source electrode of the first transistor connects common potential by the current source, at least one described
It is connected to after two-transistor series aiding connection between the drain electrode and power supply of the first transistor.
6. input buffer as described in claim 1, which is characterized in that the first transistor and the second transistor are equal
Work is in saturation region.
7. input buffer as described in claim 1 or 6, which is characterized in that the threshold voltage of the first transistor is greater than
The threshold voltage of the second transistor.
8. input buffer as claimed in claim 7, which is characterized in that the threshold voltage of the first transistor is greater than described
The threshold voltage relationship of second transistor are as follows: | Vth1 |-| Vth0 | >=| Vod0 |+margin；
Wherein, Vth1 is the threshold voltage of the first transistor, and Vth0 is the threshold voltage of the second transistor, and Vod0 is
The overdrive voltage of the second transistor, margin are voltage margin.
9. a kind of differential input buffer, which is characterized in that slow including two inputs as claimed in any one of claims 1 to 8
Device is rushed, two inputs of two input buffers are used for access differential signal.
10. a kind of integrated circuit, which is characterized in that including input buffer as claimed in any one of claims 1 to 8.
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| CN111294047A (en) * | 2020-03-11 | 2020-06-16 | 电子科技大学 | High-speed high-linearity input buffer |
| CN113381696A (en) * | 2021-05-21 | 2021-09-10 | 北京大学（天津滨海）新一代信息技术研究院 | Oscillator circuit and phase-locked loop circuit |
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