CN118413202A - Charge sensitive amplifier and electronic device - Google Patents
Charge sensitive amplifier and electronic device Download PDFInfo
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- CN118413202A CN118413202A CN202410315712.6A CN202410315712A CN118413202A CN 118413202 A CN118413202 A CN 118413202A CN 202410315712 A CN202410315712 A CN 202410315712A CN 118413202 A CN118413202 A CN 118413202A
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- 239000004065 semiconductor Substances 0.000 description 2
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Abstract
A charge-sensitive amplifier and an electronic device. The charge sensitive amplifier includes: the amplifying circuit comprises two switching tubes and two current sources; the amplifying circuit is used for receiving the charge signal, amplifying the charge change in the charge signal and generating an output signal; the voltage of the output signal is related to the charge variation in the input charge signal; the feedback capacitor is connected with the signal output end and the input end of the amplifying circuit; and the reset transistor is connected with the feedback capacitor in parallel. By adopting the scheme, the charge sensitive amplifier can be simplified, so that noise is reduced.
Description
Technical Field
The invention relates to the technical field of amplifiers, in particular to a charge sensitive amplifier and electronic equipment.
Background
The input to the charge sense amplifier (CHARGE SENSITIVE AMPLIFIER, CSA) is a charge signal. When the input end inflow charge changes, the CSA can detect the change of the input end charge and change the output end voltage according to the change of the input end charge, so that the output end voltage can amplify the change of the input end charge.
However, the conventional CSA is implemented by an operational amplifier, and the circuit structure of the operational amplifier is generally complex when the operational amplifier is implemented by a circuit, so that the CSA itself has many drawbacks.
Disclosure of Invention
The invention aims to solve the problems that: a CSA with a simplified structure is provided.
To solve the above problems, an embodiment of the present invention provides a charge-sensitive amplifier, including:
The amplifying circuit comprises two switching tubes and two current sources; the amplifying circuit is used for receiving the charge signal, amplifying the charge change in the charge signal and generating an output signal; the voltage of the output signal is related to the charge variation in the input charge signal;
the feedback capacitor is connected with the signal output end and the input end of the amplifying circuit;
And the reset transistor is connected with the feedback capacitor in parallel.
In one possible embodiment, the amplifying circuit includes: the switching device comprises a first switching tube, a second switching tube, a first current source and a second current source; wherein:
The control end of the first switching tube is used as a signal input end of the amplifying circuit; the first connecting end of the first switching tube is connected with the power supply voltage output end; the second connecting end of the first switching tube is grounded through a first current source;
The control end of the second switching tube is connected with the bias voltage output end; the first connecting end of the second switching tube is connected with the power supply voltage output end through a second current source; the second connecting end of the second switching tube is grounded through the first current source.
In one possible embodiment, the first switching tube is a PMOS tube and the second switching tube is an NMOS tube.
In a possible embodiment, the first current source is implemented with a third switching tube and the second current source is implemented with a fourth switching tube.
In one possible embodiment, the third switching tube is an NMOS tube, and the fourth switching tube is a PMOS tube.
In one possible embodiment, the method further comprises:
And one end of the common mode adjusting circuit is connected with the first connecting end of the first switching tube, and the other end of the common mode adjusting circuit is connected with the power supply voltage output end and is used for adjusting the common mode voltage of the charge signal and the output signal.
In a possible embodiment, the common mode adjustment circuit is configured to reduce a voltage value of the first connection terminal of the first switch tube to adjust a common mode voltage of the charge signal and the output signal.
In one possible embodiment, the common mode adjustment circuit is a resistive circuit.
In one possible embodiment, the common mode adjustment circuit includes: a fifth switching tube; the control end of the fifth switching tube is connected to the common mode adjusting voltage, the first connecting end of the fifth switching tube is connected with the power supply voltage output end, and the second connecting end of the fifth switching tube is connected with the first switching tube.
The embodiment of the invention also provides electronic equipment, which comprises the charge sensitive amplifier.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:
By applying the scheme of the invention, the amplifying circuit comprises two switching tubes and two current sources, so that compared with the circuit structure of the existing operational amplifier, the structure is simplified, the noise is relatively reduced, and in addition, the circuit area and the power consumption are relatively reduced.
Drawings
FIG. 1 is a schematic diagram of a circuit configuration of a charge sensitive amplifier;
FIG. 2 is a schematic diagram of a charge-sensitive amplifier according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another charge-sensitive amplifier according to an embodiment of the present invention;
fig. 4 is a schematic circuit diagram of another charge-sensitive amplifier according to an embodiment of the present invention.
Detailed Description
Fig. 1 is a schematic circuit diagram of a conventional CSA. Referring to fig. 1, the CSA may include an operational amplifier 11, a feedback capacitor 12, and a reset transistor Q1. The negative input terminal of the operational amplifier 11 is connected to a charge signal, and the voltage of the charge signal is vi. The positive input end of the operational amplifier 11 is connected with a common mode signal, and the voltage of the common mode signal is the common mode voltage vcm of the input signal and the output signal. The output of the operational amplifier 11 outputs a signal, the voltage of which is vo. The feedback capacitor 12 is connected between the negative input end and the output end of the operational amplifier 11, and the capacitance value is Cf. The reset transistor Q1 is connected in parallel with the feedback capacitor 12.
When the reset pulse signal rst is at a high level, the reset transistor Q1 is turned on, the operational amplifier 11 is reset, the charge of the feedback capacitor 12 is cleared, and the voltage at the positive input end of the operational amplifier 11 is set to be the input-output common-mode voltage vcm. After the reset is completed, the reset pulse signal rst is at low level, and the reset transistor Q1 is turned off. At this time, when the charge signal connected to the negative input terminal of the operational amplifier 11 has a charge change, for example, electrons with the charge Q flow into the negative input terminal of the operational amplifier 11, and the voltage at the output terminal of the operational amplifier 11 will change Q/Cf due to conservation of charge. It can be seen that the gain (sensitivity) of the charge-sensitive amplifier is 1/Cf.
However, the CSA is implemented by the operational amplifier 11, and the operational amplifier 11 is usually complicated in circuit implementation, and thus causes a large noise.
In order to solve the problem, the invention provides a charge sensitive amplifier, wherein an amplifying circuit of the charge sensitive amplifier is not realized by an operational amplifier, but is realized by two switching tubes and two current sources, so that the structure is simpler, and noise, power consumption and increase of circuit area caused by a complex circuit structure can be avoided.
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention briefly described above will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.
Referring to fig. 2, an embodiment of the present invention provides a charge-sensitive amplifier including: an amplifying circuit 21, a feedback capacitor 22 and a reset transistor M0. Wherein:
The amplifying circuit 21 comprises two switching tubes and two current sources; the amplifying circuit 21 is configured to receive a charge signal, amplify a charge change in the charge signal, and generate an output signal; the voltage of the output signal is related to the charge variation in the input charge signal;
The feedback capacitor 22 is connected with the signal output end and the input end of the amplifying circuit 21;
the reset transistor M0 is connected in parallel with the feedback capacitor.
Since the amplifying circuit 21 is implemented by two switching transistors and two current sources, the structure is simple, noise and power consumption can be reduced, and the circuit area can be reduced.
In a specific implementation, the capacitance value of the feedback capacitor 22 is Cf. The gate of the reset transistor M0 is connected to the reset pulse signal rst. The reset pulse signal rst may control the reset transistor M0 to be turned on or off. When the reset transistor M0 is turned on, a reset operation can be performed on the amplifying circuit 21, and the charge of the feedback capacitor 22 can be cleared. After the completion of the reset, the amplifying circuit 21 tracks and puts a change in the charge of the input signal, thereby outputting an output signal capable of reflecting the amount of change in the charge of the input signal.
In an embodiment, the reset transistor M0 may be implemented as an NMOS transistor, where the gate of the reset transistor M0 is connected to the reset pulse signal rst, the source is connected to one end of the feedback capacitor 22, and the drain is connected to the other end of the feedback capacitor 22. At this time, when the reset pulse signal rst is at a high level, the reset transistor M0 is turned on. When the reset pulse signal rst is at a low level, the reset transistor M0 is turned off.
In implementation, the amplifying circuit 21 formed by two switching transistors and two current sources may have various circuit structures, which are not limited herein.
In an embodiment, referring to fig. 2, the amplifying circuit 21 may include: the switching device comprises a first switching tube M1, a second switching tube M2, a first current source Ia and a second current source Ib. Wherein:
The control end of the first switching tube M1 is used as a signal input end of the amplifying circuit 21; the first connecting end of the first switching tube M1 is connected with the power supply voltage output end; the second connection end of the first switching tube M1 is grounded GND through a first current source Ia;
The control end of the second switching tube M2 is connected with the bias voltage output end; the first connecting end of the second switching tube M2 is connected with the power supply voltage output end through a second current source Ib; the second connection end of the second switching tube is grounded to GND through the first current source Ia.
In a specific implementation, the input voltage of the amplifying circuit 21 is vi. The output voltage of the amplifying circuit 21 is vo. The power supply voltage provided by the power supply voltage output end is VDD. The bias voltage output terminal provides a bias voltage vb. The bias voltage vb is a fixed value, and the bias voltage vb can enable the second switching tube M2 to work in a saturation region and enable the first current source Ia to work normally, and when the first current source Ia works normally, the first current source Ia can provide a stable current value, so that the bias voltage output end does not contribute noise. In this way, the first switching tube M1, the second switching tube M2, the first current source Ia and the second current source Ib can provide the CSA with the required open-loop voltage gain from the output voltage vo to the input voltage vi.
When the charge amount of the input charge signal changes, the gate voltage of the first switching tube M1 is affected, and thus the current flowing through the first switching tube M1, that is, the on current of the first switching tube M1 is affected. Since the total current from the power supply voltage terminal to the ground terminal in the discharge circuit 21 is unchanged (i.e., the current value provided by the first current source Ia), and the total current of the discharge circuit 21 is equal to the sum of the on current of the first switching tube M1 and the on current of the second switching tube M2, and the sum of the on current of the second switching tube M2 and the output current of the discharge circuit 21 is equal to the current value provided by the second current source Ib, the current value provided by the second current source Ib is generally unchanged, when the on current of the first switching tube M1 changes, the output current of the amplifying circuit 21 is affected, so that the output voltage of the amplifying circuit 21 changes with the change of the on current of the first switching tube M1, thereby playing a role of amplifying the charge change in the charge signal.
In an implementation, the first switching tube M1 may be a PMOS tube, and the second switching tube M2 may be an NMOS tube. At this time, the gate of the first switch tube M1 is connected to the charge signal, the source is connected to the power supply voltage, and the drain is connected to the first current source Ia. The gate of the second switch tube M2 is connected to the bias voltage vb, the drain is connected to the second current source Ib, and the source is connected to the first current source Ia.
In other embodiments, the first switching transistor M1 and the second switching transistor M2 may be semiconductor devices such as insulated gate bipolar transistors (Insulated Gate Bipolar Transistor, IGBTs). For example, the first switching transistor M1 may be a P-channel IGBT, and the second switching transistor M2 may be an N-channel IGBT.
In an implementation manner, the first current source Ia and the second current source Ib may be implemented by using a switching tube. Specifically, referring to fig. 4, the first current source Ia may be implemented using a third switching transistor M3, and the second current source Ib may be implemented using a fourth switching transistor M4.
The third switching tube M3 and the fourth switching tube M4 may be MOS tubes or semiconductor devices such as IGBTs.
When the third switching tube M3 and the fourth switching tube M4 are MOS tubes, the third switching tube M3 may be an NMOS tube, and the fourth switching tube M4 may be a PMOS tube. At this time, the gate of the third switching tube M3 is connected to the first control voltage vn, and the gate of the fourth switching tube M4 is connected to the second control voltage vp. The first control voltage vn may control the third switching tube M3 to be in a saturation region, and the second control voltage vp may control the fourth switching tube M4 to be in a saturation region. The bias voltage vb can make the second switching tube M2, the third switching tube M3 and the first switching tube M1 all be in the saturation region.
In an embodiment of the present invention, in order to make the output voltage swing of the charge-sensing amplifier as large as possible, so that the more obvious the output signal fluctuation of the charge-sensing amplifier is, the more easily the effective output is obtained, referring to fig. 3, the charge-sensing amplifier may further include: a common mode adjustment circuit 23. One end of the common mode adjusting circuit 23 is connected to the first connection end of the first switching tube M1, and the other end is connected to the power supply voltage output end, for adjusting the common mode voltage vcm of the charge signal and the output signal.
In a specific implementation, the common mode adjustment circuit 23 is configured to reduce a voltage value of the first connection terminal of the first switching tube M1 to adjust a common mode voltage vcm of the charge signal and the output signal.
Referring to fig. 2 and 4, it is assumed that the first switching transistor M1 operates in a saturation region, ignoring a channel length modulation effect, and an absolute value V gs,M1＝Vov,M1+Vth,M1 of a gate-source voltage difference of the first switching transistor M1, where V th,M1 is a threshold voltage of the first switching transistor M1, and V ov,M1 is an overdrive voltage of the first switching transistor M1, and is related to a current, a size, and the like of the first switching transistor M1.
When the reset pulse signal rst is at a high level, the input end and the output end of the CSA are short-circuited through the reset transistor M0, so that the input-output common-mode voltage vcm is obtained. At this time, since the input/output common mode voltage vcm=v s,M1-|Vgs,M1|＝Vs,M1-Vth,M1-Vov,M1,Vs,M1 is the source voltage of the first switching transistor M1, the input/output common mode voltage vcm can be adjusted by adjusting the voltage value of V s,M1 when the current, the size, and other parameters of the first switching transistor M1 are fixed.
In a specific implementation, the common mode adjustment circuit 23 may be implemented by various circuits, which are not limited herein, so long as the source voltage of the first switching transistor M1 can be changed.
In an embodiment, referring to fig. 4, the common mode adjustment circuit 23 may be implemented with a fifth switching transistor M5. At this time, the control end of the fifth switching tube M5 is connected to the common mode adjustment voltage vc, the first connection end of the fifth switching tube M5 is connected to the power supply voltage output end, and the second connection end of the fifth switching tube M5 is connected to the first switching tube M1.
The common mode adjustment voltage vc may change the on-current of the fifth switching transistor M5, thereby changing the source voltage of the first switching transistor M1.
Specifically, assuming that the common mode adjustment circuit 23 is not provided, as shown in fig. 4, taking the implementation of the first current source Ia and the second current source Ib both using switching transistors as an example, V s,M1＝VDD,vcm＝VDD-Vgs,M1, the output voltage maximum value V o,max＝VDD-Vov,M4 is output, and the output voltage swing (swing upward from vcm) is V o,max-vcm＝Vgs,M1-Vov,M4. Wherein V ov,M4 is the overdrive voltage of the fourth switching tube M4.
When the common mode adjustment circuit 23 is provided, the input-output common mode voltage vcm can be easily adjusted by adjusting the value of the common mode adjustment voltage vc, thereby making the output voltage range flexibly adjustable.
For example, let vc=v gs,M5+Vgs,M1+Vov,M2+Vov,M3, where vcm=v ov,M2+Vov,M3,Vo,max＝VDD-Vov,M4, the output voltage swing (swing upward from vcm) is V o,max-vcm＝VDD-Vov,M4-Vov,M2-Vov,M3, reaching the maximum voltage swing that the circuit can obtain. Wherein V ov,M2 is the overdrive voltage of the fourth switching tube M2, and V ov,M3 is the overdrive voltage of the third switching tube M3.
In another embodiment, the common mode adjustment circuit 23 may also be a resistor circuit, which is composed of at least one resistor. When the resistor circuit is composed of two or more resistor circuits, the two or more resistors may be connected in parallel or in series. The specific structure of the resistor circuit is not limited, as long as the input-output common-mode voltage vcm can be changed.
In practical application, the total resistance of the resistor circuit can be set according to the requirement of the maximum voltage swing, so that the input and output common-mode voltage vcm is changed, the input and output common-mode voltage vcm=v ov,M2+Vov,M3 is enabled, and the maximum voltage swing which can be obtained by the circuit is achieved.
In other embodiments, the common mode adjustment circuit 23 may be implemented using other circuit structures, which are not illustrated here.
The output voltage swing of the CSA can be improved by providing the common mode adjustment circuit 23.
The embodiment of the invention also provides electronic equipment, which comprises the CSA.
As can be seen from the above, the charge-sensing amplifier according to the embodiment of the invention has a simplified circuit structure due to the use of a smaller number of components, so that the charge-sensing amplifier has excellent noise performance. In addition, due to the simple circuit structure, the power consumption can be reduced and the circuit area can be reduced.
Further, by providing a common mode adjustment circuit, the output voltage swing of the charge sense amplifier can be improved.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.
Claims (10)
1. A charge sensitive amplifier, comprising:
The amplifying circuit comprises two switching tubes and two current sources; the amplifying circuit is used for receiving the charge signal, amplifying the charge change in the charge signal and generating an output signal; the voltage of the output signal is related to the charge variation in the input charge signal;
the feedback capacitor is connected with the signal output end and the input end of the amplifying circuit;
And the reset transistor is connected with the feedback capacitor in parallel.
2. The charge-sensing amplifier of claim 1, wherein the amplifying circuit comprises: the switching device comprises a first switching tube, a second switching tube, a first current source and a second current source; wherein:
The control end of the first switching tube is used as a signal input end of the amplifying circuit; the first connecting end of the first switching tube is connected with the power supply voltage output end; the second connecting end of the first switching tube is grounded through a first current source;
The control end of the second switching tube is connected with the bias voltage output end; the first connecting end of the second switching tube is connected with the power supply voltage output end through a second current source; the second connecting end of the second switching tube is grounded through the first current source.
3. The charge-sensing amplifier of claim 2, wherein the first switching tube is a PMOS tube and the second switching tube is an NMOS tube.
4. The charge-sensitive amplifier of claim 2, wherein the first current source is implemented with a third switching tube and the second current source is implemented with a fourth switching tube.
5. The charge-sensing amplifier of claim 4, wherein the third switching tube is an NMOS tube and the fourth switching tube is a PMOS tube.
6. A charge sensitive amplifier as claimed in any one of claims 2 to 5, further comprising:
And one end of the common mode adjusting circuit is connected with the first connecting end of the first switching tube, and the other end of the common mode adjusting circuit is connected with the power supply voltage output end and is used for adjusting the common mode voltage of the charge signal and the output signal.
7. The charge-sensing amplifier of claim 6, wherein the common-mode adjustment circuit is configured to reduce a voltage value at the first connection of the first switching tube to adjust a common-mode voltage of the charge signal and the output signal.
8. The charge-sensing amplifier of claim 7, wherein the common-mode adjustment circuit is a resistive circuit.
9. The charge-sensing amplifier of claim 7, wherein the common-mode adjustment circuit comprises: a fifth switching tube; the control end of the fifth switching tube is connected to the common mode adjusting voltage, the first connecting end of the fifth switching tube is connected with the power supply voltage output end, and the second connecting end of the fifth switching tube is connected with the first switching tube.
10. An electronic device comprising a charge sensitive amplifier as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410315712.6A CN118413202A (en) | 2024-03-19 | 2024-03-19 | Charge sensitive amplifier and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410315712.6A CN118413202A (en) | 2024-03-19 | 2024-03-19 | Charge sensitive amplifier and electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN118413202A true CN118413202A (en) | 2024-07-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410315712.6A Pending CN118413202A (en) | 2024-03-19 | 2024-03-19 | Charge sensitive amplifier and electronic device |
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| Country | Link |
|---|---|
| CN (1) | CN118413202A (en) |
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- 2024-03-19 CN CN202410315712.6A patent/CN118413202A/en active Pending
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