CN110323181B - 一种半导体器件的制造方法 - Google Patents
一种半导体器件的制造方法 Download PDFInfo
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- CN110323181B CN110323181B CN201910647015.XA CN201910647015A CN110323181B CN 110323181 B CN110323181 B CN 110323181B CN 201910647015 A CN201910647015 A CN 201910647015A CN 110323181 B CN110323181 B CN 110323181B
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- 238000000034 method Methods 0.000 title claims abstract description 52
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 239000010410 layer Substances 0.000 claims abstract description 311
- 238000005530 etching Methods 0.000 claims abstract description 128
- 239000012790 adhesive layer Substances 0.000 claims abstract description 75
- 238000000059 patterning Methods 0.000 claims abstract description 41
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- 239000000463 material Substances 0.000 claims abstract description 27
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- 238000009966 trimming Methods 0.000 claims abstract description 14
- 229910003481 amorphous carbon Inorganic materials 0.000 claims description 30
- 239000011241 protective layer Substances 0.000 claims description 26
- 229920002120 photoresistant polymer Polymers 0.000 claims description 24
- 230000004888 barrier function Effects 0.000 claims description 16
- 238000009792 diffusion process Methods 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 13
- 239000003989 dielectric material Substances 0.000 claims description 7
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- 229910052799 carbon Inorganic materials 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 2
- 230000003667 anti-reflective effect Effects 0.000 claims 1
- 150000007530 organic bases Chemical class 0.000 claims 1
- 238000000206 photolithography Methods 0.000 abstract description 14
- 239000007769 metal material Substances 0.000 description 10
- 239000007789 gas Substances 0.000 description 7
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- 229910000577 Silicon-germanium Inorganic materials 0.000 description 4
- 230000000149 penetrating effect Effects 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
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- 239000012212 insulator Substances 0.000 description 3
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- 229910052581 Si3N4 Inorganic materials 0.000 description 2
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
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- 239000010703 silicon Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000006117 anti-reflective coating Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- RWRIWBAIICGTTQ-UHFFFAOYSA-N difluoromethane Chemical compound FCF RWRIWBAIICGTTQ-UHFFFAOYSA-N 0.000 description 1
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- 229910052732 germanium Inorganic materials 0.000 description 1
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- 239000010937 tungsten Substances 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
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- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
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- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76811—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving multiple stacked pre-patterned masks
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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- H01L21/76813—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving a partial via etch
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- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H—ELECTRICITY
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
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- Microelectronics & Electronic Packaging (AREA)
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Abstract
Description
Claims (8)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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CN201910647015.XA CN110323181B (zh) | 2019-07-17 | 2019-07-17 | 一种半导体器件的制造方法 |
US16/584,188 US11107726B2 (en) | 2019-07-17 | 2019-09-26 | Method for manufacturing bonding pad in semiconductor device |
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CN201910647015.XA CN110323181B (zh) | 2019-07-17 | 2019-07-17 | 一种半导体器件的制造方法 |
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CN110323181B true CN110323181B (zh) | 2021-08-24 |
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CN110752184A (zh) * | 2019-11-28 | 2020-02-04 | 长江存储科技有限责任公司 | 半导体器件的制作方法 |
CN110931373B (zh) * | 2019-12-11 | 2021-11-19 | 武汉新芯集成电路制造有限公司 | 一种半导体器件及其制造方法 |
CN113066761B (zh) * | 2021-03-18 | 2022-12-27 | 长鑫存储技术有限公司 | 一种半导体器件的制作方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1166055A (zh) * | 1996-05-23 | 1997-11-26 | 世界先进积体电路股份有限公司 | 导电体连线的制造方法 |
WO2004012254A1 (ja) * | 2002-07-30 | 2004-02-05 | Sony Corporation | 半導体装置の製造方法 |
CN101123214A (zh) * | 2006-08-07 | 2008-02-13 | 联华电子股份有限公司 | 双镶嵌结构的制作方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101615914B1 (ko) * | 2008-02-01 | 2016-04-27 | 램 리써치 코포레이션 | 포토레지스트 스트립핑 동안 로우-k 재료에 대한 손상 감소 |
US8298935B2 (en) * | 2010-11-22 | 2012-10-30 | United Microelectronics Corp. | Dual damascene process |
US9685404B2 (en) * | 2012-01-11 | 2017-06-20 | International Business Machines Corporation | Back-end electrically programmable fuse |
US8883638B2 (en) * | 2012-01-18 | 2014-11-11 | United Microelectronics Corp. | Method for manufacturing damascene structure involving dummy via holes |
EP3029724B1 (en) * | 2014-12-01 | 2017-06-07 | IMEC vzw | Metallization method for semiconductor structures |
KR102463893B1 (ko) * | 2015-04-03 | 2022-11-04 | 삼성전자주식회사 | 하드마스크 조성물 및 이를 이용한 패턴의 형성방법 |
US9824920B2 (en) * | 2016-04-04 | 2017-11-21 | Globalfoundries Inc. | Methods of forming self-aligned contact structures by work function material layer recessing and the resulting devices |
US9659821B1 (en) * | 2016-05-23 | 2017-05-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming interconnect structures by self-aligned approach |
EP3367428A1 (en) * | 2017-02-23 | 2018-08-29 | IMEC vzw | Method for blocking a trench portion during patterning of trenches in a dielectric material, and corresponding semiconductor structure |
US10680101B2 (en) * | 2017-07-31 | 2020-06-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Power metal-oxide-semiconductor field-effect transistor |
US10312201B1 (en) * | 2017-11-30 | 2019-06-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Seal ring for hybrid-bond |
CN109524300B (zh) * | 2018-11-28 | 2021-08-03 | 上海华力微电子有限公司 | 一种刻蚀方法及半导体器件 |
US10748765B2 (en) * | 2018-11-30 | 2020-08-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-layer mask and method of forming same |
US10811309B2 (en) * | 2018-12-04 | 2020-10-20 | Nanya Technology Corporation | Semiconductor structure and fabrication thereof |
US11037947B2 (en) * | 2019-04-15 | 2021-06-15 | Macronix International Co., Ltd. | Array of pillars located in a uniform pattern |
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1166055A (zh) * | 1996-05-23 | 1997-11-26 | 世界先进积体电路股份有限公司 | 导电体连线的制造方法 |
WO2004012254A1 (ja) * | 2002-07-30 | 2004-02-05 | Sony Corporation | 半導体装置の製造方法 |
CN101123214A (zh) * | 2006-08-07 | 2008-02-13 | 联华电子股份有限公司 | 双镶嵌结构的制作方法 |
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