CN110299417A - A kind of two-sided IBC battery structure and preparation method thereof - Google Patents
A kind of two-sided IBC battery structure and preparation method thereof Download PDFInfo
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- CN110299417A CN110299417A CN201910486244.8A CN201910486244A CN110299417A CN 110299417 A CN110299417 A CN 110299417A CN 201910486244 A CN201910486244 A CN 201910486244A CN 110299417 A CN110299417 A CN 110299417A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 30
- 239000011159 matrix material Substances 0.000 claims abstract description 30
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 30
- 239000010703 silicon Substances 0.000 claims abstract description 30
- 238000002161 passivation Methods 0.000 claims abstract description 20
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 36
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 36
- 229910004205 SiNX Inorganic materials 0.000 claims description 27
- 229910017107 AlOx Inorganic materials 0.000 claims description 18
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 18
- 239000002002 slurry Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 8
- 238000010276 construction Methods 0.000 claims description 7
- 238000004090 dissolution Methods 0.000 claims description 6
- 235000008216 herbs Nutrition 0.000 claims description 6
- 210000002268 wool Anatomy 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 claims description 3
- 229910003465 moissanite Inorganic materials 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 3
- 238000007639 printing Methods 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 238000010248 power generation Methods 0.000 abstract description 3
- FGUUSXIOTUKUDN-IBGZPJMESA-N C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 Chemical compound C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 FGUUSXIOTUKUDN-IBGZPJMESA-N 0.000 description 4
- 230000003667 anti-reflective effect Effects 0.000 description 1
- 230000003796 beauty Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0684—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells double emitter cells, e.g. bifacial solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
It is an object of the invention to disclose a kind of two-sided IBC battery structure and preparation method thereof, it includes that silicon wafer matrix, front-surface field, front surface passivated reflection reducing penetrate layer, P+ doped layer, N+ doped layer, passivation and antireflection layer, positive electrode pair grid line and negative electrode pair grid line；Silicon wafer front side of matrix sets gradually front-surface field and front surface passivated reflection reducing penetrates layer, P+ doped layer and N+ doped layer is respectively set in the silicon wafer matrix back side, the back side of P+ doped layer and N+ doped layer is provided with passivation and antireflection layer, is passivated and the back side of antireflection layer is connected separately with positive electrode pair grid line and negative electrode pair grid line；The surface of at least one in P+ doped layer and N+ doped layer is textured flannelette, and the surface of front-surface field is textured flannelette；Compared with prior art, two-sided rate can achieve 60-70% or more, and component power generation flow gain is in 5%-10% or more after being packaged into double-side assembly, application especially suitable for snow and ice cover extremely frigid zones, production cost is effectively controlled, production efficiency is improved, achieves the object of the present invention.
Description
Technical field
The present invention relates to a kind of solar battery structure and preparation method thereof, in particular to a kind of two-sided IBC battery structure
And preparation method thereof.
Background technique
Photovoltaic power generation is current one of the major way for utilizing solar energy, and solar energy power generating is cleaned, safely, just because of it
The features such as sharp, efficient, it has also become countries in the world common concern and the new industry given priority to.Therefore, it furthers investigate and utilizes
Solar energy resources, to alleviating, crisis of resource, improving the ecological environment is had a very important significance.
IBC battery is because front zero is blocked, battery positive and negative electrode is respectively positioned on the special construction of cell backside, the generous beauty of appearance
It sees, high conversion efficiency is industry research hot spot and future thrust.
Existing IBC cell backside positive and negative anodes grid line wider width, electrode metal area account for the 50% of backside area with
It is upper and limit the two-sided rate of battery in 30%-40% or less by IBC battery preparation technique, can only front receive solar energy as list
Face battery come using.
It is accordingly required in particular to a kind of two-sided IBC battery structure and preparation method thereof, to solve above-mentioned existing ask
Topic.
Summary of the invention
The purpose of the present invention is to provide a kind of two-sided IBC battery structures and preparation method thereof, not for the prior art
Foot, not only can be improved component generated output, can also improve component in the performance advantage of snow and ice cover extremely frigid zones.
Technical problem solved by the invention can be realized using following technical scheme:
In a first aspect, the present invention provides a kind of two-sided IBC battery structure, which is characterized in that it includes silicon wafer matrix, preceding table
Face, front surface passivated reflection reducing penetrate layer, P+ doped layer, N+ doped layer, passivation and antireflection layer, positive electrode pair grid line and negative electrode
Secondary grid line；The silicon wafer front side of matrix sets gradually front-surface field and front surface passivated reflection reducing penetrates layer, the silicon wafer matrix back side
It is respectively set P+ doped layer and N+ doped layer, the back side of the P+ doped layer and the N+ doped layer is provided with passivation and antireflective
The back side of layer, the passivation and antireflection layer is connected separately with positive electrode pair grid line and negative electrode pair grid line；The P+ doped layer
Surface at least one in the N+ doped layer is textured flannelette, and the surface of the front-surface field is textured suede
Face.
In one embodiment of the invention, the width of the Metallic Pairs grid line of the P+ doped layer is less than 70-80 μm.
In one embodiment of the invention, the width of the Metallic Pairs grid line of the N+ doped layer is less than 70-80 μm.
In one embodiment of the invention, rear electrode metallic area accounts for 15% or less the back side gross area.
In one embodiment of the invention, it is described passivation and antireflection layer with a thickness of 100-200nm, refractive index is
1.4-2.1。
Second aspect, the present invention provide a kind of preparation method of two-sided IBC battery structure, which is characterized in that including as follows
Step:
A) silicon wafer matrix is put into NaOH or the KOH dissolution that mass percent is 1%-20% and carries out damaging layer, then
Carry out twin polishing or making herbs into wool；
B) progress P+ doping matrix double-faced to above-mentioned silicon wafer, P+ doped layer sheet resistance are 60-2000 Ω/sq；
C) in one layer of silicon wafer matrix backside deposition one layer of SiC, SiOx, SiNx or thermally grown SiOx as exposure mask, mask thickness
Degree is 5-500nm；
D) method of back side laser slotting, printing corrosive slurry or photoetching slots to form the area N+ window, the area N+ window
Width is 0.1-3mm；
E) NaOH or the KOH dissolution that mass percent is 1%-10% are put into and carries out two-sided making herbs into wool；
F) add method for annealing to carry out two-sided N+ doping with thermal diffusion or ion implanting, N+ doped layer sheet resistance be 60-2000 Ω/
sq；
G) SiOx, SiNx or SiOx/SiNx, SiOx/SiONx, SiOx/ are grown by CVD mode in silicon wafer front side of matrix
SiNx/SiONx laminated construction penetrates layer as passivated reflection reducing, passivated reflection reducing penetrate layer with a thickness of 50-300nm；The silicon wafer matrix back side
AlOx, SiOx, SiNx or SiOx/SiNx, SiOx/AlOx/SiNx, SiOx/AlOx/SiOx, AlOx/ are grown by CVD mode
SiOx, AlOx/SiNx, AlOx/SiONx/SiNx laminated construction are used as the thickness of passivation and antireflection layer, passivation and antireflection layer
For 50-500nm；
H) two are printed respectively in silicon wafer matrix back side P+ doped layer and N+ doped layer one-step print slurry of the same race or in two times
Kind different slurries form positive electrode pair grid lines and negative electrode pair grid line, and the width of positive electrode pair grid line and negative electrode pair grid line is
10-80 μm, radical is 10-1000 root, is then sintered.
In one embodiment of the invention, above-mentioned steps b) and step f) can be replaced mutually.
In one embodiment of the invention, further comprising the steps of after above-mentioned steps b) and step f): to be put into HF matter
It is cleaned in the solution that amount percentage is 2%-15%.
Two-sided IBC battery structure of the invention and preparation method thereof, compared with prior art, two-sided rate can achieve 60-
70% or more, it is packaged into after double-side assembly component power generation flow gain in 5%-10% or more, it is high and cold especially suitable for snow and ice cover
The application in area effectively controls production cost, improves production efficiency, achieves the object of the present invention.
The features of the present invention sees the detailed description of the drawings of the present case and following preferable embodiment and obtains clearly
Solution.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of two-sided IBC battery structure of the invention and preparation method thereof.
Specific embodiment
In order to be easy to understand the technical means, the creative features, the aims and the efficiencies achieved by the present invention, tie below
Conjunction is specifically illustrating, and the present invention is further explained.
Embodiment
As shown in Figure 1, two-sided IBC battery structure and preparation method thereof of the invention, it includes that silicon wafer matrix 100 (can be with
For N-type or p-type), front-surface field 101, front surface passivated reflection reducing penetrate layer 102, P+ doped layer 201, N+ doped layer 202,
Passivation and antireflection layer 203, positive electrode pair grid line 204 and negative electrode pair grid line 205；Before 100 front of silicon wafer matrix is set gradually
Surface field 101 and front surface passivated reflection reducing penetrate layer 102, and P+ doped layer 201 and N+ doped layer is respectively set in 100 back side of silicon wafer matrix
The back side of 202, P+ doped layers 201 and N+ doped layer 202 is provided with passivation and antireflection layer 203, passivation and antireflection layer 203
The back side is connected separately with positive electrode pair grid line 204 and negative electrode pair grid line 205；In P+ doped layer 01 and N+ doped layer 202 at least
One surface is textured flannelette, and the surface of front-surface field 101 is textured flannelette.
In the present embodiment, the width of the Metallic Pairs grid line of P+ doped layer 201 is less than 70-80 μm；The gold of N+ doped layer 202
The width for belonging to secondary grid line is less than 70-80 μm.
In the present embodiment, rear electrode metallic area accounts for 15% or less the back side gross area.
In the present embodiment, passivation and antireflection layer 203 with a thickness of 100-200nm, refractive index 1.4-2.1.
The preparation method of two-sided IBC battery structure of the invention, includes the following steps:
A) silicon wafer matrix is put into NaOH or the KOH dissolution that mass percent is 1%-20% and carries out damaging layer, then
Carry out twin polishing or making herbs into wool；
B) progress P+ doping matrix double-faced to above-mentioned silicon wafer, P+ doped layer sheet resistance are 60-2000 Ω/sq；
C) in one layer of silicon wafer matrix backside deposition one layer of SiC, SiOx, SiNx or thermally grown SiOx as exposure mask, mask thickness
Degree is 5-500nm；
D) method of back side laser slotting, printing corrosive slurry or photoetching slots to form the area N+ window, the area N+ window
Width is 0.1-3mm；
E) NaOH or the KOH dissolution that mass percent is 1%-10% are put into and carries out two-sided making herbs into wool；
F) add method for annealing to carry out two-sided N+ doping with thermal diffusion or ion implanting, N+ doped layer sheet resistance be 60-2000 Ω/
sq；
G) SiOx, SiNx or SiOx/SiNx, SiOx/SiONx, SiOx/ are grown by CVD mode in silicon wafer front side of matrix
SiNx/SiONx laminated construction penetrates layer as passivated reflection reducing, passivated reflection reducing penetrate layer with a thickness of 50-300nm；The silicon wafer matrix back side
AlOx, SiOx, SiNx or SiOx/SiNx, SiOx/AlOx/SiNx, SiOx/AlOx/SiOx, AlOx/ are grown by CVD mode
SiOx, AlOx/SiNx, AlOx/SiONx/SiNx laminated construction are used as the thickness of passivation and antireflection layer, passivation and antireflection layer
For 50-500nm；
H) two are printed respectively in silicon wafer matrix back side P+ doped layer and N+ doped layer one-step print slurry of the same race or in two times
Kind different slurries form positive electrode pair grid lines and negative electrode pair grid line, and the width of positive electrode pair grid line and negative electrode pair grid line is
10-80 μm, radical is 10-1000 root, is then sintered.
In the present embodiment, above-mentioned steps b) and step f) can be replaced mutually.
In the present embodiment, further comprising the steps of after above-mentioned steps b) and step f): being put into HF mass percent is
It is cleaned in the solution of 2%-15%.
The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention.The technology of the industry
Personnel are it should be appreciated that the present invention is not limited to the above embodiments, and the above embodiments and description only describe this
The principle of invention, without departing from the spirit and scope of the present invention, various changes and improvements may be made to the invention, these changes
Change and improvement all fall within the protetion scope of the claimed invention, the claimed scope of the invention by appended claims and its
Equivalent thereof.
Claims (8)
1. a kind of two-sided IBC battery structure, which is characterized in that it includes that silicon wafer matrix, front-surface field, front surface passivated reflection reducing are penetrated
Layer, P+ doped layer, N+ doped layer, passivation and antireflection layer, positive electrode pair grid line and negative electrode pair grid line；The silicon wafer matrix is just
Face sets gradually front-surface field and front surface passivated reflection reducing penetrates layer, and P+ doped layer is respectively set for the silicon wafer matrix back side and N+ mixes
The back side of diamicton, the P+ doped layer and the N+ doped layer is provided with passivation and antireflection layer, the passivation and antireflection layer
The back side be connected separately with positive electrode pair grid line and negative electrode pair grid line；At least one in the P+ doped layer and the N+ doped layer
A surface is textured flannelette, and the surface of the front-surface field is textured flannelette.
2. two-sided IBC battery structure as described in claim 1, which is characterized in that the Metallic Pairs grid line of the P+ doped layer
Width is less than 70-80 μm.
3. two-sided IBC battery structure as described in claim 1, which is characterized in that the Metallic Pairs grid line of the N+ doped layer
Width is less than 70-80 μm.
4. two-sided IBC battery structure as described in claim 1, which is characterized in that it is total that rear electrode metallic area accounts for the back side
15% or less area.
5. two-sided IBC battery structure as described in claim 1, which is characterized in that the passivation and antireflection layer with a thickness of
100-200nm, refractive index 1.4-2.1.
6. a kind of preparation method of two-sided IBC battery structure, which comprises the steps of:
A) silicon wafer matrix is put into NaOH or the KOH dissolution that mass percent is 1%-20% and carries out damaging layer, then carried out
Twin polishing or making herbs into wool；
B) progress P+ doping matrix double-faced to above-mentioned silicon wafer, P+ doped layer sheet resistance are 60-2000 Ω/sq；
C) in one layer of silicon wafer matrix backside deposition one layer of SiC, SiOx, SiNx or thermally grown SiOx as exposure mask, mask thicknesses are
5-500nm；
D) method of back side laser slotting, printing corrosive slurry or photoetching slots to form the area N+ window, the width of the area N+ window
For 0.1-3mm；
E) NaOH or the KOH dissolution that mass percent is 1%-10% are put into and carries out two-sided making herbs into wool；
F) method for annealing is added to carry out two-sided N+ doping with thermal diffusion or ion implanting, N+ doped layer sheet resistance is 60-2000 Ω/sq；
G) SiOx, SiNx or SiOx/SiNx, SiOx/SiONx, SiOx/SiNx/ are grown by CVD mode in silicon wafer front side of matrix
SiONx laminated construction penetrates layer as passivated reflection reducing, passivated reflection reducing penetrate layer with a thickness of 50-300nm；The silicon wafer matrix back side passes through
CVD mode grow AlOx, SiOx, SiNx or SiOx/SiNx, SiOx/AlOx/SiNx, SiOx/AlOx/SiOx, AlOx/SiOx,
AlOx/SiNx, AlOx/SiONx/SiNx laminated construction as passivation and antireflection layer, passivation and antireflection layer with a thickness of 50-
500nm；
H) two kinds are printed respectively in silicon wafer matrix back side P+ doped layer and N+ doped layer one-step print slurry of the same race or in two times not
With slurry formation positive electrode pair grid line and negative electrode pair grid line, the width of positive electrode pair grid line and negative electrode pair grid line is 10-80 μ
M, radical are 10-1000 root, are then sintered.
7. the preparation method of two-sided IBC battery structure as claimed in claim 6, which is characterized in that above-mentioned steps b) and step
F) it exchanges.
8. the preparation method of two-sided IBC battery structure as claimed in claim 6, which is characterized in that above-mentioned steps b) and step
F) further comprising the steps of after: to be put into the solution that HF mass percent is 2%-15% and cleaned.
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|---|---|---|---|---|
| CN103325861A (en) * | 2008-06-12 | 2013-09-25 | 太阳能公司 | Trench process and structure for backside contact solar cells with polysilicon doped regions |
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| US20170077336A1 (en) * | 2015-09-11 | 2017-03-16 | David D. Smith | Bifacial solar cells with reflective back contacts |
| CN108365046A (en) * | 2018-03-06 | 2018-08-03 | 周华 | A kind of back contacts double-sided solar battery and preparation method thereof |
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2019
- 2019-06-05 CN CN201910486244.8A patent/CN110299417A/en active Pending
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|---|---|---|---|---|
| CN103325861A (en) * | 2008-06-12 | 2013-09-25 | 太阳能公司 | Trench process and structure for backside contact solar cells with polysilicon doped regions |
| CN103681963A (en) * | 2013-11-29 | 2014-03-26 | 奥特斯维能源（太仓）有限公司 | Back-junction back-contact crystalline silicon solar cell manufacturing method |
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| US20170077336A1 (en) * | 2015-09-11 | 2017-03-16 | David D. Smith | Bifacial solar cells with reflective back contacts |
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