CN110265485A - 具有肖特基势垒AlGaN/GaN异质结的横向晶体管及其制作方法 - Google Patents
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Abstract
本发明提出了一种具有肖特基势垒AlGaN/GaN异质结的横向晶体管及其制作方法。该结构的栅极采用金属‑半导体的整流接触，靠近漏极一侧的外延层表面还通过异质外延形成AlGaN层与漏极相接，形成AlGaN/GaN异质结；所述栅极为肖特基接触，所述源极和漏极为欧姆接触。AlGaN/GaN异质结通过自发极化和压电极化效应在异质结界面处形成高密度二维电子气，二维电子气具有很高的迁移率，从而使具有AlGaN/GaN异质结的横向晶体管具有很低的导通电阻。该结构具有更高的耐压、更大的电流密度，且能减小常规AlGaN/GaN中的电流崩塌，可大幅度提高器件的性能。
Description
技术领域
本发明涉及功率半导体器件领域，具体涉及一种横向晶体管。
背景技术
横向场效应管具有易集成，热稳定性好，较好的频率稳定性，低功耗，多子导电，功率驱动小，开关速度高等优点是智能功率电路和高压器件的核心。由于便携式电源管理和汽车电子产品的市场需求日益增长，在全球范围内受到越来越多的关注。
宽禁带半导体材料由于具有禁带宽度大，电子漂移饱和速度高、介电常数小、导电性能好的特点，其本身具有的优越性质及其在功率器件领域应用中潜在的巨大前景GaN材料作为第三代半导体材料的核心之一，相比碳化硅(SiC)特殊之处在于其所具有极化效应。然而，由于氮化物材料没有天然的衬底，需要依靠材料生长的方式实现单晶材料，在未人为掺杂的情况下，生长得到的氮化物外延薄膜通常含有多种残余的杂质，强烈的影响着材料的背景载流子浓度，难以获得高质量的外延层。
发明内容
本发明提出了一种具有肖特基势垒AlGaN/GaN异质结的横向晶体管，不仅突破了横向器件中随着漂移区长度增加而导致导通电阻大幅增加的问题，还能减小常规AlGaN/GaN中的电流崩塌现象，可大幅度提高器件的性能。
本发明的技术方案如下：
该具有肖特基势垒AlGaN/GaN异质结的横向晶体管，包括：
半导体材料的衬底；
氮化镓材料外延层；
位于外延层表面的源极、栅极、漏极；
其特殊之处在于：
靠近漏极一侧的外延层表面还通过异质外延形成AlGaN层与漏极相接，形成AlGaN/GaN异质结；所述栅极为肖特基接触(与外延层相连)，所述源极和漏极为欧姆接触(与外延层相连)。
在以上方案的基础上，本发明还进一步作了如下优化：
衬底的材料选择氮化镓、碳化硅、蓝宝石、硅等。
衬底的掺杂浓度根据设计的击穿电压和不同的衬底材料确定，典型掺杂浓度范围为1×1015cm-3～1×1017cm-3。
外延层的掺杂浓度根据设计的阈值电压确定，典型掺杂浓度范围为1×1016cm-3～1×1017cm-3。
外延层的厚度典型值0.5μm～1.5μm。
所述AlGaN/GaN异质结的横向尺寸占整个器件长度的比例典型值为
1/2～3/4。
AlGaN/GaN异质结与肖特基接触区域可保持0～3μm的间距。
栅极下方还可以增设绝缘介质层，绝缘介质层厚度的典型值为0～0.1μm(取0即表示也可以没有绝缘介质层)。介质材料选自与氮化镓界面结合较好的高K材料(如氮化硅、Al2O3)。
一种制作上述具有肖特基势垒AlGaN/GaN异质结的横向晶体管的方法，包括以下步骤：
(1)取半导体材料作为衬底；
(2)在衬底上通过外延形成GaN外延层；
(3)在外延层上通过异质外延形成AlGaN层；
(4)在指定区域刻除AlGaN层，在掩膜的保护下，通过离子注入形成N型漂移区以及介质层淀积；
(5)通过肖特基接触形成栅极，通过欧姆接触形成源极和漏极；
(6)器件表面淀积钝化层，并刻蚀接触孔。
本发明技术方案的有益效果如下：
本发明将AlGaN/GaN异质结应用于器件的漂移区。器件关断时，由于2DEG引入了新的电荷，降低了器件栅端边缘的峰值电场，提高了击穿电压，大幅度降低了器件的导通损耗；栅极采用肖特基接触，具有较大的电流密度，减小了栅极电容，具有更高的开关速度。
本发明在相同漂移区长度和栅宽的情况下，具有更高的耐压、更大的电流密度、更快的开关频率，具有更好的性能。
附图说明
图1是本发明的结构示意图。
其中，1-源极；2-栅极；3-介质层；4-外延层；5-AlGaN层；6-漏极；7-衬底；8-衬底电极。
具体实施方式
下面结合附图以N沟道具有肖特基势垒AlGaN/GaN异质结的横向晶体管为例介绍本发明。
如图1所示，本实施例的结构包括：
半导体材料的衬底；
氮化镓材料外延层；
位于外延层表面的源极、漏极、介质层以及栅极；
靠近漏极一侧的外延层表面还通过异质外延形成AlGaN层与漏极相接，形成AlGaN/GaN异质结，即漂移区由N型漂移区与AlGaN/GaN异质结两部分组成；栅极为肖特基接触(即金属-半导体的整流接触)，栅极下方还可以设置厚度为0～0.1μm的绝缘介质层(也可以没有该绝缘介质层)；源极和漏极为欧姆接触。
AlGaN/GaN异质结的横向尺寸占整个器件长度的比例为1/2～3/4。
衬底的材料可选择氮化镓、碳化硅、蓝宝石或硅，衬底的掺杂浓度为1×1015cm-3～1×1017cm-3。
外延层的掺杂浓度为1×1014cm-3～1×1016cm-3，外延层的厚度为0.5μm～1.5μm。
介质层厚度为0～0.1μm，材料选自与氮化镓界面结合较好的高K材料，如氮化硅、Al2O3。
该器件的制备过程如下：
(1)半导体材料衬底；
(2)在衬底上表面通过外延形成的氮化镓外延层；
(3)在衬底下表面形成金属化衬底电极；
(4)在外延层上通过异质外延形成AlGaN层；
(5)在指定区域刻除AlGaN层，在掩膜的保护下，通过离子注入形成N型漂移区以及介质层淀积；
(6)通过肖特基接触形成栅极，通过欧姆接触形成源极和漏极；
(7)器件表面淀积钝化层，并刻蚀接触孔。
该器件结构的栅极采用金属-半导体的整流接触，部分漂移区为AlGaN/GaN异质结。AlGaN/GaN异质结通过自发极化和压电极化效应在异质结界面处形成高密度二维电子气(two dimensional electron gas，2DEG)，二维电子气具有很高的迁移率，从而使具有AlGaN/GaN异质结的横向晶体管具有很低的导通电阻。器件关断时，2DEG引入了新的电场峰，提高了击穿电压。同时，栅极采用肖特基接触，具有较大的电流密度，减小了栅极电容。该结构具有更高的耐压、更大的电流密度、更快的开关频率。
经ISE TCAD仿真表明，本发明器件的性能较之于传统宽禁带横向晶体管明显提升，器件的导通电阻下降了20％以上，且能减小常规AlGaN/GaN中的电流崩塌。
本发明采用的半导体材料还可以是能形成二维电子气的其他半导体材料，如砷化镓等，基于同样的发明构思，也应视为属于本申请权利要求的保护范围。
本发明所述的横向晶体管当然也可以为P型沟道，其结构与N沟道横向晶体管等同，也应当视为属于本申请权利要求的保护范围，在此不再赘述。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明技术原理的前提下，还可以做出若干改进和替换，这些改进和替换的方案也落入本发明的保护范围。
Claims (9)
1.具有肖特基势垒AlGaN/GaN异质结的横向晶体管，包括：
半导体材料的衬底；
位于衬底上表面的氮化镓材料的外延层；
位于外延层表面的源极、栅极和漏极；
其特征在于：
靠近漏极一侧的外延层表面还通过异质外延形成AlGaN层与漏极相接，形成AlGaN/GaN异质结；所述栅极为肖特基接触，所述源极和漏极为欧姆接触。
2.根据权利要求1所述的具有肖特基势垒AlGaN/GaN异质结的横向晶体管，其特征在于：所述衬底的材料为氮化镓、碳化硅、蓝宝石或硅。
3.根据权利要求1所述的具有肖特基势垒AlGaN/GaN异质结的横向晶体管，其特征在于：所述衬底为P型，典型掺杂浓度1×1015cm-3～1×1017cm-3。
4.根据权利要求1所述的具有肖特基势垒AlGaN/GaN异质结的横向晶体管，其特征在于：所述外延层的典型掺杂浓度为1×1016cm-3～1×1017cm-3。
5.根据权利要求1所述的具有肖特基势垒AlGaN/GaN异质结的横向晶体管，其特征在于：所述AlGaN/GaN异质结的横向尺寸占整个器件长度的比例典型值为1/2～3/4。
6.根据权利要求1所述的具有肖特基势垒AlGaN/GaN异质结的横向晶体管，其特征在于：外延层的厚度为0.5μm～1.5μm。
7.根据权利要求1所述的所述的具有肖特基势垒AlGaN/GaN异质结的横向晶体管，其特征在于：所述栅极下方还设置有绝缘介质层，绝缘介质层的厚度为0～0.1μm。
8.根据权利要求7所述的具有肖特基势垒AlGaN/GaN异质结的横向晶体管，其特征在于：所述绝缘介质层的材料为高K材料。
9.一种制作权利要求1所述具有肖特基势垒AlGaN/GaN异质结的横向晶体管的方法，包括以下步骤：
(1)取半导体材料制备衬底；
(2)在衬底上通过外延形成GaN外延层；
(3)在GaN外延层上通过异外延形成AlGaN层；
(4)在指定区域刻除AlGaN层，在掩膜的保护下，通过离子注入形成N型漂移区；
(5)通过肖特基接触形成栅极，通过欧姆接触形成源极和漏极；
(6)器件表面淀积钝化层，并刻蚀接触孔。
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