CN110223909B - Wafer edge processing method and wafer assembly - Google Patents
Wafer edge processing method and wafer assembly Download PDFInfo
- Publication number
- CN110223909B CN110223909B CN201910458709.9A CN201910458709A CN110223909B CN 110223909 B CN110223909 B CN 110223909B CN 201910458709 A CN201910458709 A CN 201910458709A CN 110223909 B CN110223909 B CN 110223909B
- Authority
- CN
- China
- Prior art keywords
- wafer
- edge
- liquid curable
- curable material
- chamfer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 11
- 239000000463 material Substances 0.000 claims abstract description 53
- 239000007788 liquid Substances 0.000 claims abstract description 38
- 238000000034 method Methods 0.000 claims abstract description 19
- 238000005538 encapsulation Methods 0.000 claims abstract description 12
- 238000005266 casting Methods 0.000 claims abstract description 3
- 239000011347 resin Substances 0.000 claims abstract 3
- 229920005989 resin Polymers 0.000 claims abstract 3
- 239000004814 polyurethane Substances 0.000 claims description 7
- 229920002635 polyurethane Polymers 0.000 claims description 7
- 239000004593 Epoxy Substances 0.000 claims description 5
- CERQOIWHTDAKMF-UHFFFAOYSA-M Methacrylate Chemical compound CC(=C)C([O-])=O CERQOIWHTDAKMF-UHFFFAOYSA-M 0.000 claims description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 claims description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-M Acrylate Chemical compound [O-]C(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-M 0.000 claims 2
- 229920000642 polymer Polymers 0.000 abstract 1
- 239000003822 epoxy resin Substances 0.000 description 9
- 229920000647 polyepoxide Polymers 0.000 description 9
- 239000004925 Acrylic resin Substances 0.000 description 6
- 229920000178 Acrylic resin Polymers 0.000 description 6
- 239000003292 glue Substances 0.000 description 5
- 238000005520 cutting process Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 4
- -1 acrylic ester Chemical class 0.000 description 3
- JHPBZFOKBAGZBL-UHFFFAOYSA-N (3-hydroxy-2,2,4-trimethylpentyl) 2-methylprop-2-enoate Chemical compound CC(C)C(O)C(C)(C)COC(=O)C(C)=C JHPBZFOKBAGZBL-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 125000005396 acrylic acid ester group Chemical group 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000005054 agglomeration Methods 0.000 description 2
- 230000002776 aggregation Effects 0.000 description 2
- 239000008393 encapsulating agent Substances 0.000 description 2
- 125000005397 methacrylic acid ester group Chemical group 0.000 description 2
- 239000005416 organic matter Substances 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 239000002313 adhesive film Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000002894 organic compounds Chemical class 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02021—Edge treatment, chamfering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Abstract
A wafer edge processing method, the wafer edge having a chamfer, the method comprising: providing a mold for horizontally placing the wafer; horizontally placing the wafer into the mold; casting a liquid curable material along the inner edge of the mold; solidifying the liquid solidifiable material to enable the wafer edge to be chamfered and encapsulated; and taking the encapsulated wafer out of the die. The invention also discloses a wafer assembly formed after the wafer edge is processed, the wafer edge is provided with a chamfer, the wafer assembly comprises an encapsulation piece, and the encapsulation piece tightly encapsulates the wafer edge chamfer along the wafer edge. The invention adopts the method of encapsulating the wafer edge chamfer by the resin polymer, thereby avoiding the phenomenon of edge breakage caused by suspending the chamfer in the thinning process.
Description
Technical Field
The present invention relates to the field of semiconductor technology, and in particular, to a wafer edge processing method and a wafer assembly formed after wafer edge processing.
Background
In the aspect of preparing the flexible chip by adopting the traditional silicon-based wafer, the flexible chip is mainly realized by the traditional processes of back grinding and thinning the wafer, film pasting and supporting and transferring, mechanical cutting and the like.
In terms of wafer thinning, there are 4 methods currently common in the industry: 1) The front surface is directly thinned after the protective film is attached, and edge breakage and extension cracks are easy to occur when the thinned thickness is lower than 20um due to the design chamfering of the edge of the wafer; 2) The support wafer is thinned after being temporarily bonded, and the thickness fluctuation range of the thinned wafer is enlarged due to the addition of the support structure and the bonding structure; 3) The method has higher requirements on cutting equipment and a front protective film, and when the thickness of a chip is too thin (< 20 um), the conditions of overflow of an adhesive film, sliding of the position of the chip and the like are easy to occur, so that the subsequent packaging is inconvenient; 4) The Taiko method, that is, the edge is kept for a circle without grinding during grinding, plays a role of fixing and supporting a central grinding area, and avoids warping.
Disclosure of Invention
The invention aims to provide a wafer edge processing method and a wafer assembly formed after wafer edge processing, which can avoid chamfering and edge breakage and do not affect the original structure of a wafer.
The invention provides a wafer edge processing method, wherein the wafer edge is provided with a chamfer, and the method comprises the following steps: providing a mold for horizontally placing the wafer; horizontally placing the wafer into the mold; casting a liquid curable material along the inner edge of the mold; solidifying the liquid solidifiable material to enable the wafer edge to be chamfered and encapsulated; and taking the encapsulated wafer out of the die.
Further, the liquid curable material is an acrylic resin, an epoxy resin or a polyurethane organic matter.
Further, the liquid curable material is acrylic ester with the viscosity of 500-1000 mPas and the hardness of 60-70 after curing, or methacrylic ester with the viscosity of 1000-2000 mPas and the hardness of 65-75 after curing, or bi-component epoxy resin with the viscosity of 4000-6000 mPas and the hardness of 83-93 after curing.
Further, the wafer is placed face down when the wafer is placed horizontally in the mold.
Further, when the liquid curable material is poured along the inner edge of the die, the height of the liquid curable material after pouring is not higher than the thickness of the wafer.
The invention also provides a wafer assembly formed after the wafer edge is processed, the wafer edge is provided with a chamfer, the wafer assembly comprises an encapsulation piece, and the encapsulation piece forms tight encapsulation on the wafer edge chamfer along the wafer edge.
Further, the encapsulation is not higher than the wafer back surface on the wafer back surface side.
Further, the encapsulant is formed by curing a liquid curable material.
Further, the liquid curable material is acrylic resin, epoxy resin or polyurethane organic matter
Further, the liquid curable material is acrylic ester with the viscosity of 500-1000 mPas and the hardness of 60-70 after curing, or methacrylic ester with the viscosity of 1000-2000 mPas and the hardness of 65-75 after curing, or bi-component epoxy resin with the viscosity of 4000-6000 mPas and the hardness of 83-93 after curing.
According to the wafer edge processing method and the wafer assembly formed after the wafer edge processing, the liquid curable material is adopted to encapsulate the wafer edge chamfer, so that the phenomenon that the chamfer is suspended to collapse in the thinning process can be avoided, the original structure of the wafer is not influenced, and external acting force is not introduced, so that the influence on the reliability of an edge effective core due to mechanical/thermal stress caused by fluctuation of an edge cutting process can be avoided, and the yield is improved.
Drawings
FIG. 1 is a process diagram of a wafer edge processing method according to an embodiment of the invention.
Fig. 2 is a flowchart of a wafer edge processing method according to an embodiment of the invention.
Detailed Description
The following describes in further detail the embodiments of the present invention with reference to the drawings and examples. The following examples are illustrative of the invention and are not intended to limit the scope of the invention.
As shown in fig. 1 and 2, the present embodiment discloses a wafer edge processing method, wherein the edge of a wafer 1 to be edge processed has a chamfer 2. The method comprises the following steps:
s1, providing a die 3 for horizontally placing a wafer 1;
s2, horizontally placing the wafer 1 into a die 3;
s3, pouring a liquid curable material 4 along the inner edge of the die 3, and curing the liquid curable material 4 to encapsulate the edge chamfer 2 of the wafer 1;
and S4, taking the encapsulated wafer 1 out of the die 3.
In the present embodiment, in steps S1 and S2, the wafer 1 may be a 12-inch or less single crystal silicon wafer, or may be a wafer made of another common semiconductor material having a size of 12 inches or less. The mold 3 is a special detachable clamp, which ensures that the wafer 1 is intact when demolded, and other molds can be used in other embodiments. When the wafer 1 is placed horizontally in the mold 3, the front surface of the wafer 1 is placed downward, so that a plurality of chips (not shown) to be packaged, which are isolated by dicing streets, on the front surface of the wafer 1 can be protected from contamination.
In this embodiment, in step S3, the liquid curable material 4 is poured along the inner edge of the mold 3, and after the pouring is completed, different modes are selected according to the properties of the liquid curable material 4 to cure, so that the edge chamfer 2 of the wafer 1 is encapsulated. The liquid curable material 4 has good bonding force with the edge of the wafer 1, good insulating property, proper viscosity and small volume change before and after curing.
The liquid curable material 4 may be an acrylic, epoxy or polyurethane based organic material, the specific type of which is selected to meet several requirements: 1) The adhesive has good bonding force with the edge of the wafer 1, and has larger elastic modulus and hardness after solidification so as to have good protection effect on the edge of the wafer 1 in the thinning process; 2) The insulating material has good insulating property, and avoids the influence of the insulating material on surrounding chips; 3) The ink-jet head has proper viscosity so as to ensure that the ink-jet head with a small caliber can smoothly discharge the glue, the phenomena of blockage, agglomeration and the like can not occur, and the height of a stroke step can be conveniently controlled through the glue discharge amount; 4) The volume change before and after curing is small, and the phenomenon that the edge protection effect is lost due to overlarge shrinkage of the cured material is avoided. According to the above requirements, acrylic resin, epoxy resin, polyurethane organic compound, and the like can be selected. In other embodiments, other liquid curable materials may be used.
In an embodiment, the liquid curable material 4 may be 3410 acrylic resin with viscosity of 680mPas, curing under UV light of 1000mJ/cm2, hardness of 65 after curing, tensile elastic modulus of 75MPa, tensile strength of 7N/mm2, mass loss ratio of 0.1% before and after curing, light yellow liquid at normal temperature, and sufficient hardness to support the suspended part of the chamfer 2, the elastic modulus is close to the silicon as the main component of the wafer 1, and good adhesion after encapsulating the edge of the wafer 1. By adopting the materials, a circular ring with the width of 2-3 mm is prepared along the edge of the wafer 1 and tightly encapsulates the wafer 1.
In other embodiments, acrylic acid ester with the viscosity of 500-1000 mPas and the hardness of the cured material of 60-70, methacrylic acid ester with the viscosity of 1000-2000 mPas and the hardness of the cured material of 65-75, or two-component epoxy resin with the viscosity of 4000-6000 mPas and the hardness of the cured material of 83-93 can be selected. Wherein, the parameters of the acrylic ester are as follows: at 25 ℃, 500-1000 mPa.s, the hardness of the cured material is 60-70, preferably 65, the tensile elastic modulus is more than 75MPa, the tensile strength is more than 7N/mm <2 >, and the mass loss ratio before and after curing is less than 0.1%. The parameters for the methacrylate were: at 25 ℃, the hardness of the cured material is 65-75, preferably 60, the tensile elastic modulus is 90MPa, the tensile strength is more than 7N/mm <2 >, and the mass loss ratio before and after curing is less than 0.1 percent. The parameters of the two-component epoxy resin are: at 25 ℃, 4000-6000 mPa.s, the hardness of the cured material is 83-93, preferably 88, the tensile elastic modulus is 75MPa, the compressive strength is more than 17N/mm <2 >, and the mass loss ratio before and after curing is less than 0.1%.
When the liquid curable material 4 is poured along the inner edge of the die 3, the height of the poured liquid curable material 4 is not higher than the thickness of the wafer 1 by controlling the glue outlet amount, so that the workload of subsequent thinning and other operations is reduced.
In this embodiment, in step S4, the encapsulated wafer 1 is taken out of the mold 3, including: the mould is removed and the wafer 1 is obtained with the edge chamfer 2 already encapsulated.
As shown in fig. 1 and 2, in the present embodiment, a wafer assembly is formed after processing an edge of a wafer 1, and the edge of the wafer 1 has a chamfer 2. The wafer assembly includes an encapsulation that forms a tight encapsulation for the chamfer 2 along the edge of the wafer 1. The envelope is formed by placing the wafer 1 horizontally in a mould 3 and pouring a liquid curable material. Other ways of making the enclosure may be used in other embodiments.
In this embodiment, the encapsulant is not higher than the back surface of the wafer 1 on the back surface side of the wafer 1, so as to reduce the workload of subsequent thinning operations.
In this embodiment, the encapsulation member is formed by curing a liquid curable material 4, and the liquid curable material 4 is a material having good bonding force with the edge of the wafer 1, good insulating property, proper viscosity, and small volume change before and after curing. In this embodiment, acrylic resin is adopted, epoxy resin or polyurethane organic matters can be selected in other embodiments, other materials can be adopted in other embodiments, and the specific type of materials is selected to meet the requirements in several aspects: 1) The adhesive has good bonding force with the edge of the wafer 1, and has larger elastic modulus and hardness after solidification, so as to have good protection effect on the edge of the wafer in the thinning process; 2) The insulating material has good insulating property, and avoids the influence of the insulating material on surrounding chips; 3) The ink-jet head has proper viscosity so as to ensure that the ink-jet head with a small caliber can smoothly discharge the glue, the phenomena of blockage, agglomeration and the like can not occur, and the height of a stroke step can be conveniently controlled through the glue discharge amount; 4) The volume change before and after curing is small, and the phenomenon that the edge protection effect is lost due to overlarge shrinkage of the cured material is avoided. In other embodiments, other liquid curable materials may be used. In this example, the liquid curable material 4 was 3410 acrylic resin having a viscosity of 680mPas, a hardness of 65 after curing under a UV light of 1000mJ/cm2, a tensile elastic modulus of 75MPa, a tensile strength of 7N/mm2, and a mass loss ratio before and after curing of 0.1%.
In other embodiments, acrylic acid ester with the viscosity of 500-1000 mPas and the hardness of the cured material of 60-70, methacrylic acid ester with the viscosity of 1000-2000 mPas and the hardness of the cured material of 65-75, or two-component epoxy resin with the viscosity of 4000-6000 mPas and the hardness of the cured material of 83-93 can be selected.
In this embodiment, after the edge chamfer 2 of the wafer 1 is encapsulated by adopting the liquid curable material, the phenomenon of edge breakage caused by suspending the chamfer 2 in the thinning process can be avoided, the original structure of the wafer 1 is not affected, and external acting force is not introduced, so that the mechanical/thermal stress caused by fluctuation of the edge cutting process can be avoided, the reliability of the effective core of the edge is affected, and the yield is improved. The chamfering encapsulation can be suitable for wafer chamfering structures with various shapes, and has high flexibility.
In this document, the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", "vertical", "horizontal", etc. refer to the directions or positional relationships based on those shown in the drawings, and are merely for clarity and convenience of description of the expression technical solution, and thus should not be construed as limiting the present invention.
In this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a list of elements is included, and may include other elements not expressly listed.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (8)
1. A method of processing a wafer edge, the wafer edge having a chamfer, the method comprising: providing a mold for horizontally placing the wafer; horizontally placing the wafer into the mold; casting a liquid curable material along the inner edge of the mold; solidifying the liquid solidifiable material to enable the wafer edge to be chamfered and encapsulated; and taking the encapsulated wafer out of the die, wherein the height of the liquid curable material is not higher than the thickness of the wafer after the liquid curable material is poured along the inner edge of the die.
2. The method of claim 1, wherein the liquid curable material is an acrylic, epoxy, or polyurethane based organic.
3. The method of claim 1, wherein the liquid curable material is an acrylate having a viscosity of 500 to 1000 mPa-s and a hardness of 60 to 70 after curing, or a methacrylate having a viscosity of 1000 to 2000 mPa-s and a hardness of 65 to 75 after curing, or a two-component epoxy-based resin having a viscosity of 4000 to 6000 mPa-s and a hardness of 83 to 93 after curing.
4. The method of claim 1, wherein the wafer is placed face down while the wafer is placed horizontally in the mold.
5. A wafer assembly formed by the wafer edge processing method of claim 1, wherein the wafer edge has a chamfer, and wherein the wafer assembly comprises an encapsulation that tightly encapsulates the wafer edge chamfer along the wafer edge, the encapsulation being no higher than the wafer backside on the wafer backside side.
6. The wafer assembly of claim 5, wherein the enclosure is cured from a liquid curable material.
7. The wafer assembly of claim 6, wherein the liquid curable material is an acrylic, epoxy, or polyurethane type organic.
8. The wafer assembly of claim 6 wherein the liquid curable material is an acrylate having a viscosity of 500 to 1000 mPa-s and a hardness of 60 to 70 after curing, or a methacrylate having a viscosity of 1000 to 2000 mPa-s and a hardness of 65 to 75 after curing, or a two-component epoxy-based resin having a viscosity of 4000 to 6000 mPa-s and a hardness of 83 to 93 after curing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910458709.9A CN110223909B (en) | 2019-05-29 | 2019-05-29 | Wafer edge processing method and wafer assembly |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910458709.9A CN110223909B (en) | 2019-05-29 | 2019-05-29 | Wafer edge processing method and wafer assembly |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110223909A CN110223909A (en) | 2019-09-10 |
| CN110223909B true CN110223909B (en) | 2024-03-26 |
Family
ID=67818803
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910458709.9A Active CN110223909B (en) | 2019-05-29 | 2019-05-29 | Wafer edge processing method and wafer assembly |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110223909B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112959211B (en) * | 2021-02-22 | 2021-12-31 | 长江存储科技有限责任公司 | Wafer processing apparatus and processing method |
| CN113843115B (en) * | 2021-09-22 | 2022-09-23 | 浙江华帅特新材料科技有限公司 | Mold for substrate surface functionalization and substrate surface functionalization method |
| CN114347279A (en) * | 2021-12-31 | 2022-04-15 | 苏州北汀羽电子有限公司 | Wafer slotting method and yellow glue film edge cutting equipment |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1074752A (en) * | 1996-09-02 | 1998-03-17 | Fuji Electric Co Ltd | Manufacture of semiconductor device |
| US5818556A (en) * | 1996-07-24 | 1998-10-06 | Raychem Corporation | Method and apparatus for patterning encapsulated liquid crystal layers |
| JP2002100596A (en) * | 2000-09-25 | 2002-04-05 | Mitsubishi Materials Silicon Corp | Edge protecting device for silicon wafer |
| CN101150059A (en) * | 2007-10-31 | 2008-03-26 | 日月光半导体制造股份有限公司 | Wafer thinning method |
| JP2010021441A (en) * | 2008-07-11 | 2010-01-28 | Sumco Corp | Epitaxial substrate wafer |
| CN101661909A (en) * | 2008-08-28 | 2010-03-03 | 日东电工株式会社 | Thermosetting die-bonding film |
| CN102190864A (en) * | 2010-03-16 | 2011-09-21 | 日立化成工业株式会社 | Epoxy resin composition for sealing packing of semiconductor, semiconductor device, and manufacturing method thereof |
| US8124455B2 (en) * | 2005-04-02 | 2012-02-28 | Stats Chippac Ltd. | Wafer strength reinforcement system for ultra thin wafer thinning |
| CN102496596A (en) * | 2011-12-27 | 2012-06-13 | 复旦大学 | Wafer bearing structure and preparation method thereof, and wafer thinning method |
| CN104599982A (en) * | 2014-12-11 | 2015-05-06 | 南通富士通微电子股份有限公司 | Whole-sealing semiconductor wafer packaging mold |
| CN107275234A (en) * | 2016-04-08 | 2017-10-20 | 株式会社迪思科 | The manufacture method of encapsulated wafer and the manufacture method of device chip |
| CN108231646A (en) * | 2016-12-13 | 2018-06-29 | 中芯国际集成电路制造(上海)有限公司 | A kind of manufacturing method of semiconductor devices |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8119500B2 (en) * | 2007-04-25 | 2012-02-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer bonding |
| US8922021B2 (en) * | 2011-12-30 | 2014-12-30 | Deca Technologies Inc. | Die up fully molded fan-out wafer level packaging |
-
2019
- 2019-05-29 CN CN201910458709.9A patent/CN110223909B/en active Active
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5818556A (en) * | 1996-07-24 | 1998-10-06 | Raychem Corporation | Method and apparatus for patterning encapsulated liquid crystal layers |
| JPH1074752A (en) * | 1996-09-02 | 1998-03-17 | Fuji Electric Co Ltd | Manufacture of semiconductor device |
| JP2002100596A (en) * | 2000-09-25 | 2002-04-05 | Mitsubishi Materials Silicon Corp | Edge protecting device for silicon wafer |
| US8124455B2 (en) * | 2005-04-02 | 2012-02-28 | Stats Chippac Ltd. | Wafer strength reinforcement system for ultra thin wafer thinning |
| CN101150059A (en) * | 2007-10-31 | 2008-03-26 | 日月光半导体制造股份有限公司 | Wafer thinning method |
| JP2010021441A (en) * | 2008-07-11 | 2010-01-28 | Sumco Corp | Epitaxial substrate wafer |
| CN101661909A (en) * | 2008-08-28 | 2010-03-03 | 日东电工株式会社 | Thermosetting die-bonding film |
| CN102190864A (en) * | 2010-03-16 | 2011-09-21 | 日立化成工业株式会社 | Epoxy resin composition for sealing packing of semiconductor, semiconductor device, and manufacturing method thereof |
| CN102496596A (en) * | 2011-12-27 | 2012-06-13 | 复旦大学 | Wafer bearing structure and preparation method thereof, and wafer thinning method |
| CN104599982A (en) * | 2014-12-11 | 2015-05-06 | 南通富士通微电子股份有限公司 | Whole-sealing semiconductor wafer packaging mold |
| CN107275234A (en) * | 2016-04-08 | 2017-10-20 | 株式会社迪思科 | The manufacture method of encapsulated wafer and the manufacture method of device chip |
| CN108231646A (en) * | 2016-12-13 | 2018-06-29 | 中芯国际集成电路制造(上海)有限公司 | A kind of manufacturing method of semiconductor devices |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110223909A (en) | 2019-09-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110223909B (en) | Wafer edge processing method and wafer assembly | |
| CN101964311B (en) | Method of forming integrated circuit and integrated circuit structure | |
| US8378441B2 (en) | Manufacturing method and structure of a wafer level image sensor module with package structure | |
| TWI302731B (en) | Filling paste structure and process for wl-csp | |
| TWI633013B (en) | Adhesive film and method of manufacturing semiconductor device | |
| US8124471B2 (en) | Method of post-mold grinding a semiconductor package | |
| CN110211913A (en) | A kind of manufacturing method of flexible chip | |
| KR102276498B1 (en) | Method of manufacturing semiconductor device, and semiconductor device | |
| KR101968428B1 (en) | Method of manufacturing semiconductor device, and semiconductor device | |
| KR101681360B1 (en) | Method for Manufacturing Electronic Component Package | |
| CN106328639A (en) | LED encapsulating structure and preparing method thereof | |
| KR101393700B1 (en) | Manufacturing of fan-out wafer level packaging fortified preventing warpage of wafer | |
| CN106876342A (en) | A kind of manufacture method of two-side radiation semiconductor element | |
| TWI324829B (en) | Optical semiconductor package and method for manufacturing the same | |
| EP3195351B1 (en) | Methods of protecting peripheries of in-process semiconductor wafers and related in-process wafers and systems | |
| US20150145078A1 (en) | Semiconductor Package with Air Gap | |
| CN107833866A (en) | The encapsulating structure and manufacture method of the enhancing radiating of encapsulated moulding | |
| CN209045534U (en) | Chip plastic package structure and wafer chip level plastic package structure | |
| CN109616424B (en) | Injection molding device and packaging structure | |
| JPH10270606A (en) | Structure of packaged semiconductor device | |
| JP2016004856A (en) | Transfer mold, transfer molding device with the same, package and manufacturing method of package | |
| KR20220042118A (en) | The manufacturing method of a support piece, the manufacturing method of a semiconductor device, and laminated|multilayer film for support piece formation | |
| CN111863634B (en) | Manufacturing method of ultrathin packaging structure | |
| TW200947569A (en) | Package structure and method | |
| KR20220002259A (en) | A method for manufacturing a semiconductor device having a dolmen structure and a method for manufacturing a support piece |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |