CN108231646A - A kind of manufacturing method of semiconductor devices - Google Patents
A kind of manufacturing method of semiconductor devices Download PDFInfo
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- CN108231646A CN108231646A CN201611146494.XA CN201611146494A CN108231646A CN 108231646 A CN108231646 A CN 108231646A CN 201611146494 A CN201611146494 A CN 201611146494A CN 108231646 A CN108231646 A CN 108231646A
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- device wafers
- adhesive
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- support wafer
- bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
The present invention provides a kind of manufacturing methods of semiconductor devices.The method includes：Device wafers are provided, the device wafers have front and back relative to each other；Support wafer is provided, is bonded in the front of the support wafer and the device wafers temporarily by adhesive；Back side process technique is carried out to the back side of the device wafers；The fringe region of the device wafers is handled, to remove the adhesive of the device wafers fringe region package；Solution bonding is carried out, makes the device wafers and the support wafer separate.The adhesive generated in bonding process is effectively reduced by the manufacturing method of the present invention to the package at device wafers bezel, so as to reduce cohesive force of the adhesive to crystal round fringes, device wafers fragmentation caused by so as to avoid in solution bonding process.
Description
Technical field
The present invention relates to field of semiconductor manufacture, in particular to a kind of manufacturing method of semiconductor devices.
Background technology
As requirement of the people to miniaturization of electronic products, high performance steps up, electronic chip is towards more and more thinner
Direction develop.For semiconductor crystal wafer thickness 400 microns or less sizes processing, due to be thinned after wafer transfer and
Processing is difficult, and generally use is bonded reconciliation bonding technology with the transfer and processing in secondary wafer manufacturing process temporarily.Ephemeral key
It closes generally use in reconciliation bonding technology the device wafers with device architecture and the advanced line unit conjunction of support wafer stick to one,
Wafer is thinned again, TSV manufactures, reroutes the integrated circuit fabrication process such as layer and form internal circuit interconnection, it finally will be brilliant
Circle carries out solution bonding with slide glass and detaches, and it is post-processed.
In the prior art, because bonding wafer device wafers front have Facad structure, in bonding process frequently with
Device wafers front can be coated under specified conditions as adhesive by cured liquid organic material rapidly, to control follow-up bonding
Overall thickness variation (TTL) in wafer-process.During device wafers surface coating adhesive, it can not avoid to crystal round fringes
Package is generated, as shown in Figure 1, the adhesive 101 between support wafer 102 and device wafers 100 is to device wafers bezel
Generate package.This package causes adhesive larger in device wafers edge cohesive force, thus in bonding process is solved, support is brilliant
With being subsequently removed in the separation process of device wafers and to adhesive using the adhesive tape that removes photoresist wafer side occurs in the process for circle
Edge pull-up and generate wafer fragmentation.
How in the manufacturing process of solution bonding being bonded of semiconductor crystal wafer temporarily, it is semiconductor system to reduce wafer fragmentation
Make the problem of manufacturer pays close attention to for a long time.
Invention content
A series of concept of reduced forms is introduced in Summary, this will in specific embodiment part into
One step is described in detail.The Summary of the present invention is not meant to attempt to limit technical solution claimed
Key feature and essential features do not mean that the protection domain for attempting to determine technical solution claimed more.
In order in the manufacturing process of the interim bonding reconciliation bonding of semiconductor crystal wafer, reduce wafer fragmentation, the present invention carries
A kind of manufacturing method of semiconductor devices has been supplied, the method includes：
Device wafers are provided, the device wafers have front and back relative to each other；
Support wafer is provided, the front of the support wafer and the device wafers is carried out by ephemeral key by adhesive
It closes；
Back side process technique is carried out to the back side of the device wafers；
The fringe region of the device wafers is handled, to remove the gluing of the device wafers fringe region package
Agent；
Solution bonding is carried out, makes the device wafers and the support wafer separate.
Illustratively, the processing includes removing the device wafers edge using the method for crystal round fringes cutting adhesive
The adhesive of region package.
Illustratively, the method that the processing includes trimming the device wafers edge removes the device wafers
The adhesive of fringe region package.
Illustratively, the method for the trimming removes the marginal portion of the device wafers simultaneously.
Illustratively, the back side process technique includes reduction process.
Illustratively, thinned technique is carried out to the back side of device wafers as grinding technics.
Illustratively, it further includes and coats the step of one layer of releasing layer on support wafer surface to be bonded before bonding
Suddenly.
Illustratively, step to discharge the releasing layer is handled the releasing layer before being additionally included in solution bonding
Suddenly.
Illustratively, the support wafer is using glass, and the releasing layer converts film layer for optical and thermal, described in the release
The step of releasing layer, uses laser treatment.
Illustratively, the solution bonding steps include：
Remove the support wafer；
The adhesive tape that removes photoresist is arranged in the device wafers front；
The positive adhesive tape that removes photoresist of the device wafers is removed, while removes the adhesive on the device wafers surface.
The manufacturing method of semiconductor devices having thus described the invention, by the preceding edge to device wafers of solution bonding
Region is handled, and effectively reduces the adhesive generated in bonding process to the package at device wafers bezel, thus
Reduce in adhesive to the cohesive force of crystal round fringes, promote in solution bonding process, device wafers stablize separation with support wafer
And the smooth disengaging of device wafers front adhesive, it avoids in bonding process is solved, supports the separation of wafer and device wafers
And crystal round fringes occur when being subsequently removed using the adhesive tape that removes photoresist to adhesive and is pulled up and generates wafer fragmentation.Meanwhile
The present invention is easy to operate, and processing position will not generate any damage far from wafer effective coverage to wafer.
Description of the drawings
The drawings below of the present invention is used to understand the present invention in this as the part of the present invention.Shown in the drawings of this hair
Bright embodiment and its description, principle used to explain the present invention.
In attached drawing：
Fig. 1 is package schematic diagram of the adhesive to the edges of device wafers of bonding wafer in the prior art；
Fig. 2 is bonding involved in the prior art and the fabrication of semiconductor device schematic flow chart of solution bonding process；
Fig. 3 A~3I are the structure formed in correlation step in fabrication of semiconductor device in one embodiment of the invention
Sectional view；
Fig. 4 is fabrication of semiconductor device schematic flow chart in one embodiment of the invention；
Fig. 5 A~5I are the knot formed in correlation step in fabrication of semiconductor device in another embodiment of the present invention
The sectional view of structure.
Specific embodiment
In the following description, a large amount of concrete details are given in order to provide more thorough understanding of the invention.So
And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid with the present invention obscure, for some technical characteristics well known in the art not into
Row description.
In order to thoroughly understand the present invention, detailed description will be proposed in following description, to illustrate of the present invention half
The manufacturing method of conductor device.Obviously, execution of the invention be not limited to semiconductor applications technical staff be familiar with it is special
Details.Presently preferred embodiments of the present invention is described in detail as follows, however other than these detailed descriptions, the present invention can also have it
His embodiment.
It should give it is noted that term used herein above is merely to describe specific embodiment, and be not intended to restricted root
According to exemplary embodiment of the present invention.As used herein, unless the context clearly indicates otherwise, otherwise singulative
Intention includes plural form.Additionally, it should be understood that when using term "comprising" and/or " comprising " in the present specification
When, it indicates there are the feature, entirety, step, operation, element and/or component, but do not preclude the presence or addition of one or more
Other a features, entirety, step, operation, element, component and/or combination thereof.
Now, exemplary embodiment according to the present invention is more fully described with reference to the accompanying drawings.However, these exemplary realities
Applying example can be implemented, and should not be construed to be limited solely to the embodiments set forth herein with many different forms.It should
These embodiments that are to provide understood are in order to enable disclosure of the invention is thoroughly and complete, and by these exemplary implementations
The design of example is fully conveyed to those of ordinary skill in the art.In the accompanying drawings, for the sake of clarity, the thickness of layer and region is exaggerated
Degree, and make identical element is presented with like reference characters, thus description of them will be omitted.
It below will be with insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, abbreviation
IGBT) involved in manufacturing process to for ease of be thinned after wafer transmission and carry out temporarily be bonded reconciliation bonding technique for tool
Body embodiment explains principle according to the present invention.Embodiment using insulated gate bipolar transistor manufacturing process as example,
It is not intended to be defined technical scheme of the present invention, it is clear that technical scheme of the present invention can also be applied to other using glue
Glutinous agent is carried out in the technique of interim bonding reconciliation bonding.
In with insulated gate bipolar transistor manufacture process craft, for reduction energy loss and the mesh such as thermal diffusivity are improved
, it generally requires that IGBT device is carried out being thinned to 100um hereinafter, completing back process on the wafer after being thinned simultaneously.System
Transfer caused by being thinned during Subsequent semiconductor processing procedure and difficult during making, for this purpose, generally use is interim
Bonding and solution bonding aid in treatment wafer.Fig. 2 shows bondings involved in the prior art and the semiconductor devices of solution bonding process
Manufacturing process schematic flow chart, step S201 is first carried out, device wafers are provided, the device wafers have relative to each other
Front and back；Then step S202 is performed, support wafer is provided, wafer and the device are supported by described by adhesive
The front of wafer is bonded temporarily；Then step S203 is performed, the back side of the device wafers is thinned；Then it performs
Step S204, other techniques of the device wafers back side form circuit interconnection；Then step S205 is performed, carries out solution bonding, is made described
Device wafers and the support wafer separate.
Wafer frontside is coated on processing apparatus crystalline substance frequently with adhesive in the interim bonding reconciliation bonding process of wafer
Circular surfaces surface height caused by forming chip structure is different, so as to form the comprehensive support of device crystal column surface, then
It is bonded temporarily with support wafer.Since generation adhesive in the coating procedure of adhesive, can not be avoided to be coated to wafer side
Edge, there are one wrapping up, as shown in Figure 1, so that after grinding technics, carries out wafer the process of solution bonding to crystal round fringes inclined-plane
In, because adhesive leads to the package on crystal round fringes inclined-plane edge cohesive force larger (more than 2.5N/inch), thus in solution key
During conjunction, support and adhesive is removed in the separation process of wafer and device wafers and subsequently using the adhesive tape that removes photoresist
Crystal round fringes pull-up occurs in the process and generates wafer fragmentation.
In order in the manufacturing process of the interim bonding reconciliation bonding of semiconductor crystal wafer, reduce wafer fragmentation, the present invention carries
A kind of manufacturing method of semiconductor devices has been supplied, the method includes：
Device wafers are provided, the device wafers have front and back relative to each other；
Support wafer is provided, the front of the support wafer and the device wafers is carried out by ephemeral key by adhesive
It closes；
Back side process technique is carried out to the back side of the device wafers；
The fringe region of the device wafers is handled, to remove the gluing of the device wafers fringe region package
Agent；
Solution bonding is carried out, makes the device wafers and the support wafer separate.
The manufacturing method of semiconductor devices having thus described the invention, by the preceding edge to device wafers of solution bonding
Region is handled, and effectively reduces the adhesive generated in bonding process to the package at device wafers bezel, thus
Reduce in adhesive to the cohesive force of crystal round fringes, promote in solution bonding process, device wafers stablize separation with support wafer
And the smooth disengaging of device wafers front adhesive, it avoids in bonding process is solved, supports the separation of wafer and device wafers
And crystal round fringes occur when being subsequently removed using the adhesive tape that removes photoresist to adhesive and is pulled up and generates wafer fragmentation.Meanwhile
The present invention is easy to operate, and processing position will not generate any damage far from wafer effective coverage to wafer.
Embodiment one
Fig. 3 A~3I and Fig. 4 show a kind of manufacturing method for semiconductor devices that one embodiment of the present of invention proposes,
Wherein, the sectional view of structure that Fig. 3 A~3I are formed for correlation step in the fabrication of semiconductor device of the embodiment of the present invention,
Fig. 4 is the schematic flow chart of the manufacturing process of semiconductor devices in embodiment：
Step S1 is first carried out：Device wafers are provided, the device wafers have front and back relative to each other；
As shown in Figure 3A, device wafers 300 are provided, the device wafers include front 301 and the back side relative to each other, institute
It can be at least one of following material being previously mentioned to state device wafers 300：Silicon, silicon-on-insulator (SOI), insulator upper strata
SiGe (S-SiGeOI) and germanium on insulator SiClx (SiGeOI) etc. is laminated on folded silicon (SSOI), insulator.Further,
The substrate can also be N-type substrate or P type substrate.Can also be that substrate is lightly doped in N-type.Illustratively, it in the present embodiment, adopts
Use silicon substrate.
The front 301 of the device wafers can be to include the structure such as base area for forming various device architectures, transmitting
Area, grid oxic horizon, grid and emitter, the device can be MOSFET element, IGBT device etc..Illustratively, this reality
It applies in example and is further described by taking IGBT device as an example.
Then, step S2 is performed：Support wafer is provided, by adhesive by the support wafer and the device wafers
Front is bonded temporarily；
As shown in Figure 3B, support wafer 303 is provided, is bonded temporarily, by adhesive 302 by the support wafer
303 and the fronts 301 of the device wafers 300 be bonded temporarily, form bonding wafer.Specifically, the support wafer 303
Can be Silicon Wafer, glass or ceramic material.For playing a supportive role to device wafers, convenient for the back side to device wafers into
Row operation.Illustratively, support wafer is used as using glass in the present embodiment, be further described.
Illustratively, the step being bonded in the front of the support wafer and the device wafers temporarily by adhesive
Suddenly include：The adhesive is coated on to the front of the device wafers, to realize the positive global planarization of device wafers；It will
The device wafers coated with the adhesive surface to be bonded with the support wafer is bonded.The support wafer treats key
It is follow-up ground to ensure that the surface of conjunction and the device wafers surface coated with adhesive can form stable bonded interface
The overall balance of device wafers is supported and is solved in journey stablizing in bonding process to be detached from.It is coated on described using adhesive
Device wafers front is in order to which processing apparatus crystal column surface surface height caused by forming chip structure is different, with shaper
The global planarization of part crystal column surface, so as to be bonded with follow-up support wafer.Illustratively, the support wafer treats key
The surface of conjunction, which is coated with one layer of releasing layer, can support device wafers overall balance in bonding process with being formed and subsequently solve
Wafer is supported in bonding process stablizes separation.
Referring to Fig. 3 B, adhesive 302 is coated in the front 301 of the device wafers 300, the support wafer 303
Surface is coated with releasing layer 304, and the device wafers are coated with the face of adhesive 302 and the support wafer 303 is coated with
The face of releasing layer 304 carries out bonding together to form bonding wafer.The adhesive 302 can be but not limited to high-molecular organic material
Or can ultraviolet denaturation can be formed surface planarisation and under given conditions can cured liquid organic material rapidly, liquid glue
Glutinous agent controls more preferably overall thickness variation (TTL).It can be bonded in the releasing layer 304 of 303 surface of carrying wafer coating
Comprehensive, balance and stability bonded interface is formed to device wafers and support wafer interface in journey, is further formed to device wafers
Overall balance support, in subsequently solution bonding process after light, heating or chemical treatment, changed by the decomposition of releasing layer
Support wafer is made with device wafers to stablize to detach, the releasing layer can be formed to be any after heating, light or chemical treatment
Melting or the material of volatile materials.When illustratively, in the present embodiment using glass as support wafer material, it can be used
The propylene liguid acid adhesive of uv-curable is used as using LTHC (light- heat transfer) film and is treated coated in glass support wafer
The releasing layer of bonding surface.It is to be appreciated that wafer by device wafers and is supported into line unit using adhesive in the present embodiment
The step of conjunction, is only exemplary, other it is any using adhesive by device wafers and support wafer bonding technique can
Applied in the present invention.
With continued reference to Fig. 3 B, the support wafer and device wafers front are bonded temporarily by adhesive 302.Key
During conjunction, wafer frontside is generally coated on using adhesive 302 and is bonded temporarily with support wafer, due to the painting of adhesive
Generation adhesive can not be avoided to be coated to crystal round fringes during covering, and to crystal round fringes inclined-plane, there are one wrap up.Fig. 3 C show key
The partial enlarged view of synthetic the edge of the circle, there are one wrap up for bezel of the adhesive to device wafers.Adhesive 302 is to wafer side
The package on edge inclined-plane 305, while this adhesive 302 leads to the package on crystal round fringes inclined-plane 304 that edge cohesive force is larger (to be more than
2.5N/inch)。
Then, step S3 is performed：Back side process technique is carried out to the back side of the device wafers.
As shown in Figure 3D, show that the part of the bonding crystal round fringes after the back side of the device wafers is thinned is put
Big figure.In this step, the thining method can select method commonly used in the art, such as mechanical lapping may be used, change
The methods of learning mechanical polishing (CMP), chemical attack, plasma etching.Illustratively, grinding wafer technique is used in the present embodiment
Thinned, only grinding silicon chip central part when grinding wafer technique is ground is ground to substrate layer, and 3mm- is stayed in silicon chip edge
The region of 5mm is not ground, so as to form support ring 306 much one thicker than device silicon wafer thickness in silicon chip edge.It is brilliant
Circle grinding technics because device wafers edge formed a support ring, so as to make be thinned after wafer it is subsequent transmission, manufacture and
The situation for deforming upon and rupturing in handling process further reduces.After grinding wafer technique, the glue that is generated in bonding process
Glutinous agent generates package to crystal round fringes inclined-plane 305, becomes and 306 bezel of device wafers edge support rings after being thinned is continued
Package, in this case, adhesive is big to the cohesive force at device wafers edge, while device wafers edge support rings are thick and middle part
It is thin, so as to more readily occur in solution bonding process, the generating device wafer fragmentation when edge cohesive force is big.
It, can be further as needed at the back side of device wafers based on the supporting role of bonding wafer after grinding technics
Semiconductor technology, such as TSV techniques are performed, forms other interconnection structures.It illustratively, can be into one in IGBT device processing procedure
Step performs the technique for forming collecting zone at the device wafers back side.After grinding technics, technique, ability are performed at the device wafers back side
Field technique personnel can further be expanded with general technology as needed, and the inventive point of non-present invention, and details are not described herein.
Then, step S4 is performed：The fringe region of the device wafers is handled, to remove the device wafers side
The adhesive of edge region package.
As shown in FIGURE 3 E, it shows and the fringe region of the device wafers is handled, to remove the device wafers
Bonding crystal round fringes close-up schematic view after the adhesive of fringe region package.Illustratively, it is cut using crystal round fringes
To the adhesive of the device wafers bezel 305 package in the method removal bonding wafer of adhesive.The edge
The method of cutting adhesive can be the method for any removable edge adhesive, and such as mechanical removal adhesive, plasma is gone
Except adhesive, technology that the method is well known to those skilled in the art, details are not described herein.Adhesive is cut using edge
Method removal adhesive after bonding wafer, the bonding force of adhesive and wafer decreases below from more than 2.5N/inch
1N/inch.It effectively reduces crystal round fringes inclined-plane and is in the package of the adhesive that is generated in bonding process to crystal round fringes, so as to subtract
The small adhesive in bonding process is solved removes photoresist adhesive tape to adhesive to the cohesive force of crystal round fringes removing support wafer and using
It is avoided when being removed because adhesive is excessive to the cohesive force of crystal round fringes, and occurs to support crystal round fringes or the adhesive tape that removes photoresist will be brilliant
The edge of the circle pull-up and generate wafer fragmentation.
Then, step S5 is performed：Solution bonding is carried out, makes the device wafers and the support wafer separate.
Specifically, the method that any solution bonding well known to those skilled in the art can be used, discrete device wafer and support
Wafer, for example, by light, thermally and chemically the para-linkages wafer such as reaction is handled, then mechanically decoupled device wafer and support crystalline substance
Circle.
Illustratively, bonding steps are solved in the present embodiment to include：Remove the support wafer；In device wafers front
Arrange the one layer of adhesive tape that removes photoresist；The positive adhesive tape that removes photoresist of the device wafers is removed, while removes the device wafers surface
Adhesive.Because in step S405, handling the fringe region of device wafers, eliminating the gluing at device wafers edge
Agent so that device wafers edge adhesive reduces the cohesive force at device wafers edge, during supporting wafer in removal,
Support wafer is avoided with being bonded damage of the edge of wafer in separation process to device wafers edge.Further, follow-up
Device wafers during positive adhesive removal, because device wafers edge adhesive removes, are reduced using the adhesive tape that removes photoresist
Cohesive force of the adhesive to device wafers edge, so as to make to remove photoresist, adhesive tape is unlikely to during adhesive is taken up by device
Crystal round fringes pull-up and generate wafer fragmentation.
Illustratively, the process that the support wafer coated with releasing layer is used to be bonded in bonding process, in solution key
It is further included during closing, para-linkage wafer is handled, the step of to discharge releasing layer.Releasing layer discharges in bonding process is solved
Tension is generated between device wafers and support wafer, this tension is balanced between wafer interface and is uniformly distributed, and can promote device
Stablize separation between wafer and support wafer, can further reduce during support wafer removes because adhesive is to device side
Edge adhesion strength is more than middle part and device wafers may be damaged.
In the present embodiment, the process being bonded using optical and thermal conversion film coated on glass support crystal column surface, is being solved
In bonding process, processing release releasing layer is carried out, then remove support wafer and subsequently removed using laser para-linkage wafer
The step of adhesive.Detailed process referring to Fig. 3 F~3H, carries out laser treatment to the bonding wafer after edge treated first,
As shown in 3F, the releasing layer for supporting 303 surface of wafer can be carried out decomposition release by the laser treatment.Then, it is brilliant to remove support
Circle as shown in Figure 3 G, removes and is also stained with adhesive 302 on the device wafers front 301 after support wafer.Then, in device
The adhesive tape that removes photoresist is arranged on the adhesive of crystal column surface, for the adhesive in removal devices wafer frontside, as shown in figure 3h, in device
The one layer of adhesive tape 307 that removes photoresist is arranged on the adhesive 302 on 301 surface of part wafer frontside.Finally, the adhesive tape 307 that removes photoresist is going glue stick 308
Under the action of torn since device wafers edge, while drive adhesive from device wafers edge be detached from, as shown in fig. 31.Extremely
This, the solution bonding technology between device wafers and support wafer is completed, and device wafers are not chipping.It is to be appreciated that this
The step of being bonded device wafers and support wafer using adhesive in embodiment is only exemplary, other are any to adopt
The step of device wafers and support wafer bonding, can be applied in the present invention with adhesive.
Embodiment two
Fig. 4 and Fig. 5 A~5I show a kind of manufacturer for semiconductor devices that an alternative embodiment of the invention proposes
Method, wherein, Fig. 4 is the schematic flow chart of the manufacturing process of semiconductor devices in embodiment, and Fig. 5 A~5I are implemented for the present invention
The sectional view for the structure that correlation step is formed in the fabrication of semiconductor device of example：
Step S1 is first carried out：Device wafers are provided, the device wafers have front and back relative to each other.
As shown in Figure 5A, device wafers are provided, the device wafers 500 have front 501 and the back side relative to each other, institute
It can be at least one of following material being previously mentioned to state device wafers 500：Silicon, silicon-on-insulator (SOI), insulator upper strata
SiGe (S-SiGeOI) and germanium on insulator SiClx (SiGeOI) etc. is laminated on folded silicon (SSOI), insulator.Further,
The substrate can also be N-type substrate or P type substrate.Can also be that substrate is lightly doped in N-type.Illustratively, it in the present embodiment, adopts
Use silicon substrate.
Can be to include the structure such as base area for forming various device architectures, transmitting in the front 501 of device wafers 500
Area, grid oxic horizon, grid and emitter, the device can be MOSFET element, IGBT device etc..Illustratively, this reality
It applies in example and is further described by taking IGBT device as an example.
Then, step S2 is performed：There is provided support wafer, support wafer is provided, by adhesive by it is described support wafer and
The front of the device wafers is bonded temporarily.
As shown in Figure 5 B, support wafer 503 is provided, is bonded temporarily, by adhesive 502 by the support wafer
503 and the fronts 501 of the device wafers 500 be bonded temporarily, form bonding wafer.Specifically, the support wafer 503
Can be Silicon Wafer, glass or ceramic material.For playing a supportive role to device wafers, convenient for the back side to device wafers into
Row operation.Illustratively, support wafer is used as using glass in the present embodiment, be further described.
Illustratively, the step being bonded in the front of the support wafer and the device wafers temporarily by adhesive
Suddenly include：The adhesive is coated on to the front of the device wafers, to realize the positive global planarization of device wafers；It will
The device wafers coated with the adhesive surface to be bonded with the support wafer is bonded.The support wafer treats key
It is follow-up ground to ensure that the surface of conjunction and the device wafers surface coated with adhesive can form stable bonded interface
The overall balance of device wafers is supported and is solved in journey stablizing in bonding process to be detached from.It is coated on described using adhesive
Device wafers front is in order to different with processing apparatus crystal column surface surface height caused by forming chip, so as to shaper
The comprehensive support of part crystal column surface, so as to be bonded with follow-up support wafer.Illustratively, the support wafer is to be bonded
Surface be coated with one layer of releasing layer and in bonding process device wafers overall balance can be supported to be formed and subsequently solve key
Support wafer stablizes separation during closing.
Referring to Fig. 3 B, adhesive 502 is coated on the device wafers surface 501, the surface of the support wafer 503 applies
Releasing layer 504 is covered with, the device wafers are coated with the face of adhesive 502 and the support wafer 503 is coated with releasing layer
504 face carries out bonding together to form bonding wafer.The adhesive 502 can be but not limited to high-molecular organic material or can be purple
Outer denaturation can be formed surface planarisation and under given conditions can cured liquid organic material rapidly, liquid adhesive pair
Overall thickness variation (TTL) control is more preferably.Carrying wafer 503 surface coating releasing layer 504 can in bonding process it is right
Device wafers and support wafer interface form comprehensive, balance and stability bonded interface, are further formed to the comprehensive of device wafers
Balanced support in subsequently solution bonding process after light, heating or chemical treatment, makes support by the decomposition variation of releasing layer
Wafer and device wafers stabilization detach, the releasing layer can be it is any formed after heating, light or chemical treatment melting or
The material of volatile materials.When illustratively, in the present embodiment using glass as support wafer material, ultraviolet light can be used
Curable propylene liguid acid adhesive is used as using LTHC (light- heat transfer) film and is coated in glass support wafer table to be bonded
The releasing layer in face.It is to be appreciated that the step for being bonded device wafers and support wafer using adhesive in the present embodiment
Suddenly be only exemplary, other it is any using adhesive by device wafers and support wafer bonding technique can be applied to
In the present invention.
With continued reference to Fig. 5 B, the support wafer and device wafers front are bonded temporarily by adhesive 502.Key
During conjunction, wafer frontside is generally coated on using adhesive 502 and is bonded temporarily with support wafer, due to the painting of adhesive
Generation adhesive can not be avoided to be coated to crystal round fringes during covering, and to crystal round fringes inclined-plane, there are one wrap up.Fig. 5 C show key
The partial enlarged view of synthetic the edge of the circle, adhesive is to the bezel of device wafers there are one wrapping up, and adhesive 502 is to wafer side
The package on edge inclined-plane 505, while this adhesive 502 leads to the package on crystal round fringes inclined-plane 504 that edge cohesive force is larger (to be more than
2.5N/inch)。
Then, step S3 is performed：Back side process technique is carried out to the back side of the device wafers.
As shown in Figure 5 D, the part of the bonding crystal round fringes after the back side of the device wafers 500 is thinned is shown
Enlarged drawing.In this step, the thining method can select method commonly used in the art, for example, may be used mechanical lapping,
The methods of chemically-mechanicapolish polishing (CMP), chemical attack, plasma etching.Illustratively, grinding wafer work is used in the present embodiment
Skill is ground substrate layer thinned, only grinding silicon chip central part when grinding wafer technique is ground, and is stayed in silicon chip edge
The region of 3mm-5mm is not ground, so as to form support ring much one thicker than device silicon wafer thickness in silicon chip edge
505.Grinding wafer technique because device wafers edge formed a support ring, so as to make be thinned after wafer it is subsequent transmission,
The situation for deforming upon and rupturing in manufacture and handling process further reduces.After grinding wafer technique, produced in bonding process
Raw adhesive generates package to crystal round fringes inclined-plane 505, becomes oblique to 506 edge of device wafers edge support rings after being thinned
Face 505 continues to wrap up, and as shown in fig. 5e, in this case, adhesive is big to the cohesive force at device wafers edge, while device is brilliant
The edge of the circle support ring is thick and middle part is thin, so as to more readily occur in solution bonding process, the generating device when edge cohesive force is big
Wafer fragmentation.
Then, step S4 is performed：The fringe region of the device wafers is handled, to remove the device wafers side
The adhesive of edge region package.
As illustrated in figure 5f, it shows and the fringe region of the device wafers is handled, to remove shown device wafers
Bonding crystal round fringes close-up schematic view after the adhesive of fringe region package.Illustratively, using to device wafers side
The adhesive that device wafers fringe region wraps up in the method removal bonding wafer that edge is trimmed.As illustrated in figure 5f, it shows
The device wafers bezel 505 is wrapped using method removal described be bonded in wafer modified to device wafers edge
The partial enlarged view at the device wafers edge after the adhesive wrapped up in.The method remover trimmed to 500 edge of device wafers
While adhesive 502 of part crystal round fringes region package, the marginal portion of removal devices wafer eliminates bezel
505.Crystal round fringes inclined-plane is effectively removed while device wafers bezel 505 is removed and is in device wafers in bonding process
The adhesive of fringe region package, to the cohesive force of crystal round fringes, is removing branch so as to reduce the adhesive in bonding process is solved
It supports wafer and is avoided when adhesive tape is removed adhesive using removing photoresist because adhesive is excessive to the cohesive force of crystal round fringes, and send out
Crystal round fringes pull-up is generated wafer fragmentation by raw support crystal round fringes or the adhesive tape that removes photoresist.
Then, step S5 is performed：Solution bonding is carried out, makes the device wafers and the support wafer separate.
Specifically, the method that any solution bonding well known to those skilled in the art can be used, discrete device wafer and support
Wafer, for example, by light, thermally and chemically the para-linkages wafer such as reaction is handled, then mechanically decoupled device wafer and support crystalline substance
Circle.
Illustratively, bonding steps are solved in the present embodiment to include：Remove the support wafer；In device wafers front
Arrange the one layer of adhesive tape that removes photoresist；The positive adhesive tape that removes photoresist of the device wafers is removed, while removes the device wafers surface
Adhesive.Because in step s 604, handling device wafers fringe region, device being eliminated using the method for edge pruning
The adhesive in part crystal round fringes region and the marginal portion of device wafers so that adhesive subtracts the package at device wafers edge
It is few even to remove, so as to reduce cohesive force of the device wafers edge adhesive to device wafers edge so that supported removing
During wafer, support wafer is reduced with being bonded damage of the edge of wafer in separation process to device wafers edge.More into
One step uses the adhesive tape that removes photoresist to device wafers during positive adhesive removal follow-up, because device wafers edge removes,
It even removes so that adhesive reduces the package at device wafers edge, device wafers edge is glued so as to reduce adhesive
Tie power so that the adhesive tape that removes photoresist is unlikely to device wafers edge pull-up generating wafer fragmentation during adhesive is taken up.
Illustratively, the process that the support wafer coated with releasing layer is used to be bonded in bonding process, in solution key
It is further included during closing, para-linkage wafer is handled, the step of to discharge releasing layer.Releasing layer discharges in bonding process is solved
Tension is generated between device wafers and support wafer, this tension is balanced between wafer interface and is uniformly distributed, and can promote device
Stablize separation between wafer and support wafer, can further reduce during support wafer removes because adhesive is to device side
Edge adhesion strength is more than middle part and device wafers may be damaged.
In the present embodiment, the process being bonded using optical and thermal conversion film coated on glass support crystal column surface, is being solved
In bonding process, processing release releasing layer is carried out, then remove support wafer and subsequently removed using laser para-linkage wafer
The step of adhesive.Detailed process referring to Fig. 5 F~5I, carries out laser treatment to the bonding wafer after edge treated first,
As shown in 5F, the releasing layer for supporting 503 surface of wafer can be carried out decomposition release by the laser treatment.Then, it is brilliant to remove support
Circle 503 as depicted in fig. 5g, removes and is also stained with adhesive 502 on the device wafers front 501 after support wafer.Then, in device
The one layer of adhesive tape that removes photoresist is arranged on the adhesive of part crystal column surface, for the adhesive in removal devices wafer frontside, such as Fig. 5 H institutes
It states, the one layer of adhesive tape 507 that removes photoresist is arranged on the adhesive 502 on positive 501 surfaces of device wafers.Finally, the adhesive tape 507 that removes photoresist is being gone
It is torn since device wafers edge under the action of glue stick 508, while adhesive is driven to be detached from from device wafers edge, such as Fig. 5 I
It is shown.So far the solution bonding technology between device wafers and support wafer is completed, and device wafers are not chipping.It is understood that
The step of being, being bonded device wafers and support wafer using adhesive in the present embodiment, is only exemplary, other
It is any to be applied to the step of device wafers and support wafer bonding in the present invention using adhesive.
In actual production, after the bonding reconciliation bonding steps for completing wafer, device wafers will further be located
Reason, including cleaning, techniques, these techniques such as cutting are all technique well-known to those skilled in the art, and details are not described herein.
In conclusion the manufacturing method of semiconductor devices having thus described the invention, by preceding to device in solution bonding
The fringe region of wafer is handled, effectively reduce the adhesive generated in bonding process to device wafers bezel at
Package so as to reduce the cohesive force in adhesive to crystal round fringes, promotes in solution bonding process, device wafers and support wafer
Stablize separation and the smooth disengaging of device wafers front adhesive, avoid in bonding process is solved, support wafer is brilliant with device
Round separation and follow-up occur that crystal round fringes are pulled up when being removed using the adhesive tape that removes photoresist to adhesive and to generate wafer broken
It splits.Meanwhile the present invention is easy to operate, processing position will not generate any damage far from wafer effective coverage to wafer.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to
Citing and the purpose of explanation, and be not intended to limit the invention in the range of described embodiment.In addition people in the art
It is understood that the invention is not limited in above-described embodiment, introduction according to the present invention can also be made more kinds of member
Variants and modifications, these variants and modifications are all fallen within scope of the present invention.Protection scope of the present invention by
The appended claims and its equivalent scope are defined.
Claims (10)
1. a kind of manufacturing method of semiconductor devices, which is characterized in that the method includes：
Device wafers are provided, the device wafers have front and back relative to each other；
Support wafer is provided, is bonded in the front of the support wafer and the device wafers temporarily by adhesive；
Back side process technique is carried out to the back side of the device wafers；
The fringe region of the device wafers is handled, to remove the adhesive of the device wafers fringe region package；
Solution bonding is carried out, makes the device wafers and the support wafer separate.
2. the method as described in claim 1, which is characterized in that the processing includes the side using crystal round fringes cutting adhesive
Method removes the adhesive of the device wafers fringe region package.
3. the method as described in claim 1, which is characterized in that the processing includes trimming the device wafers edge
Method remove the adhesive of device wafers fringe region package.
4. method as claimed in claim 3, which is characterized in that the method for the trimming removes the side of the device wafers simultaneously
Edge point.
5. the method as described in claim 1, which is characterized in that the back side process technique includes reduction process.
6. method as claimed in claim 5, which is characterized in that thinned technique is carried out to the back side of device wafers as grinding work
Skill.
7. the method as described in claim 1, which is characterized in that further include to be bonded in the support wafer before bonding
Surface coats the step of one layer of releasing layer.
8. the method for claim 7, which is characterized in that the releasing layer is handled before being additionally included in solution bonding
The step of to discharge the releasing layer.
9. method as claimed in claim 8, which is characterized in that for the support wafer using glass, the releasing layer is optical and thermal
Film layer is converted, described the step of discharging the releasing layer uses laser treatment.
10. the method as described in claim 1 to 9 any one, which is characterized in that the solution bonding steps include：
Remove the support wafer；
The adhesive tape that removes photoresist is arranged in the device wafers front；
The positive adhesive tape that removes photoresist of the device wafers is removed, while removes the adhesive on the device wafers surface.
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| CN111446151A (en) * | 2020-03-27 | 2020-07-24 | 绍兴同芯成集成电路有限公司 | Method for transferring crystal grains to blue film in batches after crystal grains are cut |
| CN111834280A (en) * | 2020-07-24 | 2020-10-27 | 武汉新芯集成电路制造有限公司 | Temporary bonding method |
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