JPH1074752A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH1074752A
JPH1074752A JP23164596A JP23164596A JPH1074752A JP H1074752 A JPH1074752 A JP H1074752A JP 23164596 A JP23164596 A JP 23164596A JP 23164596 A JP23164596 A JP 23164596A JP H1074752 A JPH1074752 A JP H1074752A
Authority
JP
Japan
Prior art keywords
passivation material
liquid
passivation
mold
silicon wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23164596A
Other languages
Japanese (ja)
Inventor
Kazunori Okuhara
和典 奥原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP23164596A priority Critical patent/JPH1074752A/en
Publication of JPH1074752A publication Critical patent/JPH1074752A/en
Pending legal-status Critical Current

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  • Thyristors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PROBLEM TO BE SOLVED: To make a non-alloy type semiconductor device stable in withstand voltage by a method in which air bubbles are restrained from being left in a passivation film. SOLUTION: A silicon wafer 1 is set in a passivation potting mold 4, the potting mold 4 is made to stand upright, liquid passivation material 7 (e.g. silicone rubber or the like) is infected into the potting mold 4 through an inlet opening 5 with normal pressure, and a gap between the potting mold 4 and the silicon wafer 1 is filled up with liquid passivation material 7 from below. The liquid passivation material 7 fully filled into the mold 4 is discharged from the mold 4 through an outlet opening 6, air bubbles in the liquid passivation material 7 are moved opposite to the direction of gravitation shown by an arrow and also discharged from the potting mold 4, the liquid passivation material 7 is hardened after the potting mold 4 is fully filled up with the passivation material 7, and the mold 4 is dismounted, thereby the peripheral edge of the silicone wafer 1 is covered with an air bubble-free passivation film.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、ダイオード、サ
イリスタおよびGTOサイリスタなどの電力用半導体装
置の製造方法に関する。
The present invention relates to a method for manufacturing a power semiconductor device such as a diode, a thyristor and a GTO thyristor.

【0002】[0002]

【従来の技術】ワンウエハ、ワンデバイスであるダイオ
ード、サイリスタやGTOサイリスタなどの電力用半導
体装置は高い耐圧を維持させるため、シリコンウエハの
周縁部をシリコーンゴムなどパッシベーション膜で被覆
されている。図2は非合金形半導体装置の従来のパッシ
ベーション膜の被覆方法を示す構成図である。通常の合
金形半導体装置ではpn接合を形成したシリコンウエハ
を支持板であるモリブデン板に合金し、その後パッシベ
ーション膜を周縁部に被覆してパッケージに収納する。
一方、非合金形半導体装置では支持板であるモリブデン
板にシリコンウエハ1を合金しないで図示されていない
パッケージに収納する。この非合金形半導体装置のパッ
シベーション膜の被覆方法について説明する。pn接合
を形成したシリコンウエハ1の両面には図示されていな
いアルミニウム膜などの金属膜が選択的に蒸着され、電
極が形成される。その後で、シリコンウエハ1の円周端
部3は耐圧を確保できるようにベベル加工され、化学処
理される。このシリコンウエハ1をパッシベーション用
の注入型4にセットし、この注入型4を水平に置き、注
入口5から液状のパッシベーション材7を注入し、出口
6から充満した液状のパッシベーション材7を取り出
す。これらの作業を減圧チャンバー9中で行い、減圧チ
ャンバー9内を減圧にすることで液状のパッシベーショ
ン材7内の気泡8を注入口5と出口6から脱気する。そ
の後、液状のパッシベーッション材7を硬化させ、シリ
コンウエハ1の周縁部2をパッシベーション膜で被覆す
る。その後で、シリコンウエハ1の両面をモリブデンな
どの金属で挟み平型パッケージに収納する。
2. Description of the Related Art In order to maintain a high withstand voltage, a power semiconductor device such as a diode, a thyristor or a GTO thyristor, which is a one-wafer or one-device, has a peripheral portion of a silicon wafer covered with a passivation film such as silicone rubber. FIG. 2 is a configuration diagram showing a conventional method for coating a non-alloy type semiconductor device with a passivation film. In a typical alloy type semiconductor device, a silicon wafer having a pn junction formed thereon is alloyed with a molybdenum plate serving as a support plate, and thereafter, a passivation film is coated on a peripheral portion and housed in a package.
On the other hand, in a non-alloy type semiconductor device, the silicon wafer 1 is stored in a package (not shown) without alloying the silicon wafer 1 with a molybdenum plate as a support plate. A method for coating the passivation film of the non-alloy type semiconductor device will be described. A metal film (not shown) such as an aluminum film is selectively deposited on both surfaces of the silicon wafer 1 on which the pn junction is formed to form electrodes. After that, the circumferential end 3 of the silicon wafer 1 is beveled and chemically treated so as to ensure a withstand voltage. The silicon wafer 1 is set in an injection mold 4 for passivation, the injection mold 4 is placed horizontally, a liquid passivation material 7 is injected from an injection port 5, and a filled liquid passivation material 7 is taken out from an outlet 6. These operations are performed in the decompression chamber 9, and the air in the liquid passivation material 7 is deaerated from the inlet 5 and the outlet 6 by reducing the pressure in the decompression chamber 9. Thereafter, the liquid passivation material 7 is cured, and the peripheral portion 2 of the silicon wafer 1 is covered with a passivation film. Thereafter, both surfaces of the silicon wafer 1 are sandwiched between metals such as molybdenum and stored in a flat package.

【0003】[0003]

【発明が解決しようとする課題】しかし、この減圧によ
る方法では、注入型の上部に溜まった気泡を完全に脱気
することが困難であり、パッシベーション膜内に気泡が
残る場合が多い。気泡がパッシベーション膜内に残留す
ると、半導体装置に電圧が印加された場合、この気泡の
ある場所で電界集中が起こり、半導体装置の耐圧が低下
する。
However, in this method using reduced pressure, it is difficult to completely deaerate the air bubbles accumulated on the upper part of the injection mold, and air bubbles often remain in the passivation film. If a bubble remains in the passivation film, when a voltage is applied to the semiconductor device, electric field concentration occurs at a location where the bubble is present, and the withstand voltage of the semiconductor device decreases.

【0004】この発明の目的は、パッシベーション膜内
に気泡が残留しないようにして、安定な耐圧を確保でき
る非合金形半導体装置を供給することにある。
An object of the present invention is to provide a non-alloy type semiconductor device capable of ensuring a stable breakdown voltage by preventing bubbles from remaining in a passivation film.

【0005】[0005]

【課題を解決するための手段】前記の目的を達成するた
めに、少なくとも一つのpn接合が形成された円板状の
シリコンウエハの周縁部がパッシベーション膜で被覆さ
れ、パッケージに収納されて形成される半導体装置の製
造方法において、シリコンウエハの周縁部をパッシベー
ション用の注入型で囲い、該注入型を立てて配置し、該
注入型に液状のパッシベーション材を注入するための注
入口と、液状のパッシベーション材を取り出す出口とを
設け、注入口を下に、出口を上に配置し、注入口から液
状のパッシベーション材を注入し、注入型の底部から上
方に向かって液状のパッシベーション材を充満させて液
状のパッシベーション材に混入した気泡を出口から取り
出し、シリコンウエハの周縁部が液状のパッシベーショ
ン材で覆われた後、液状のパッシベーション材を硬化さ
せ、シリコンウエハの周縁部をパッシベーション膜で被
覆する工程を有するようにする。このパッシベーション
材がシリコーンゴムであるとよい。また注入型の傾斜角
度が重力方向に対して0〜45°とするとよい。
In order to achieve the above object, a disk-shaped silicon wafer on which at least one pn junction is formed is covered with a passivation film and housed in a package. In a method for manufacturing a semiconductor device, a peripheral portion of a silicon wafer is surrounded by an injection mold for passivation, the injection mold is placed upright, an injection port for injecting a liquid passivation material into the injection mold, and a liquid injection port. An outlet for taking out the passivation material is provided, the injection port is disposed below, the outlet is disposed above, the liquid passivation material is injected from the injection port, and the liquid passivation material is filled upward from the bottom of the injection mold. After the bubbles mixed in the liquid passivation material are taken out from the outlet, the peripheral edge of the silicon wafer is covered with the liquid passivation material. Curing the passivation material liquid, to have a step of coating the periphery of the silicon wafer with a passivation film. This passivation material is preferably silicone rubber. Further, it is preferable that the inclination angle of the injection mold is 0 to 45 ° with respect to the direction of gravity.

【0006】[0006]

【発明の実施の形態】図1はこの発明の第1実施例で非
合金形半導体装置のパッシベーション膜の被覆方法を示
す図である。少なくとも一つのpn接合が形成された円
板状のシリコンウエハ1の両面に図示されていない金属
電極膜が選択的に形成され、またシリコンウエハ1の円
周端部3はベベル加工と化学処理が施され、その後、パ
ッシベーション用の注入型4にシリコンウエハ1をセッ
トする。この注入型4はシリコンウエハ1の周縁部2に
のみ液状のパッシベーション材7がコーテングされるよ
うに構成されている。この注入型4を立てて、その下方
に設けた注入口5から液状のパッシベーション材7(例
えばシリコーンゴムなどが有効である)を常圧中で注入
し、注入型5とシリコンウエハ1の隙間を下の方から液
状のパッシベーション材7で埋めて行く。満杯になった
液状のパッシベーション材7は出口6から注入型4の外
部に流れ出す。この液状のパッシベーション材7内にあ
る気泡8は矢印で示した重力方向と反対の方向に向かっ
て移動し、出口6を通って注入型4の外に逃げてゆく。
液状のパッシベーション材7が注入型4の上部まで充填
された後、液状のパッシベーション材7を硬化させ、注
入型4を取り外す。液状のパッシベーション材7がシリ
コーンゴムの場合は硬化温度は150℃程度である。こ
うすることで、気泡のないパッシベーション膜をシリコ
ンウエハの周縁部に形成することができる。その後、こ
のシリコンウエハは両面をモリブデン板で挟まれ、平型
パッケージに収納される。この方法を使うことで、パッ
シベーション膜内の気泡を無くすることができ、気泡が
起因する部分放電を防止でき、非合金形半導体装置の耐
圧を高信頼で維持することができる。また従来のように
減圧チャンバーに入れて減圧にする必要がなく、処理時
間を短縮できる。
FIG. 1 is a view showing a method of coating a passivation film of a non-alloy type semiconductor device according to a first embodiment of the present invention. A metal electrode film (not shown) is selectively formed on both surfaces of the disc-shaped silicon wafer 1 on which at least one pn junction is formed, and the circumferential end 3 of the silicon wafer 1 is subjected to bevel processing and chemical treatment. Then, the silicon wafer 1 is set on the injection mold 4 for passivation. The injection mold 4 is configured such that the liquid passivation material 7 is coated only on the peripheral edge 2 of the silicon wafer 1. The injection mold 4 is set up, and a liquid passivation material 7 (for example, silicone rubber is effective) is injected under normal pressure from an injection port 5 provided below the injection mold 4, and a gap between the injection mold 5 and the silicon wafer 1 is formed. Fill with liquid passivation material 7 from below. The filled liquid passivation material 7 flows out of the injection mold 4 from the outlet 6. The bubbles 8 in the liquid passivation material 7 move in the direction opposite to the direction of gravity indicated by the arrow, and escape through the outlet 6 to the outside of the injection mold 4.
After the liquid passivation material 7 is filled up to the upper part of the injection mold 4, the liquid passivation material 7 is cured and the injection mold 4 is removed. When the liquid passivation material 7 is silicone rubber, the curing temperature is about 150 ° C. In this manner, a passivation film without bubbles can be formed on the peripheral edge of the silicon wafer. Thereafter, the silicon wafer is sandwiched on both sides by a molybdenum plate and stored in a flat package. By using this method, bubbles in the passivation film can be eliminated, partial discharge caused by the bubbles can be prevented, and the breakdown voltage of the non-alloy type semiconductor device can be maintained with high reliability. Further, unlike the conventional case, it is not necessary to reduce the pressure in the decompression chamber so that the processing time can be reduced.

【0007】注入型4を重力方向に対してある角度だけ
傾けてもよい。その角度は液状のパッシベーション材の
粘性に関係しており、粘性が大きい場合は角度を小さく
し、粘性が小さい場合は角度を大きくすることができ
る。これは、気泡が重力に逆らって液状のパッシベーシ
ョン材内を上方に向かって移動できる力に関係している
ためである。この角度は0°〜45°が実用的な範囲で
ある。
[0007] The injection mold 4 may be inclined by a certain angle with respect to the direction of gravity. The angle is related to the viscosity of the liquid passivation material. When the viscosity is high, the angle can be reduced, and when the viscosity is low, the angle can be increased. This is because it is related to the force with which bubbles can move upward in the liquid passivation material against gravity. This angle is practically 0 ° to 45 °.

【0008】[0008]

【発明の効果】この発明によれば、立てておいたシリコ
ンウエハの周縁部にセットしたパッシベーション用の注
入型に液状のパッシベーション材を注入口から注入する
ことで、気泡を重力に反発して液状のパッシベーション
材の上方に移動させ出口から逃がして、気泡のないパッ
シベーション膜を形成する。気泡がないため、半導体装
置の耐圧の安定化が図れる。また従来のように減圧して
脱気することを必要としないため、工程が短縮できる。
According to the present invention, by injecting the liquid passivation material from the injection port into the injection mold for passivation set on the peripheral edge of the silicon wafer that has been set up, the bubbles are repelled by gravity and the liquid is removed. Is moved above the passivation material and escaped from the outlet to form a passivation film without bubbles. Since there are no air bubbles, the breakdown voltage of the semiconductor device can be stabilized. Further, since it is not necessary to depressurize and deaerate as in the conventional case, the process can be shortened.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の第1実施例で、非合金形半導体装置
のパッシベーション膜の被覆方法を示す図
FIG. 1 is a diagram showing a method for coating a passivation film of a non-alloy type semiconductor device according to a first embodiment of the present invention.

【図2】非合金形半導体装置の従来のパッシベーション
膜の被覆方法を示す図
FIG. 2 is a view showing a conventional method for coating a non-alloy type semiconductor device with a passivation film.

【符号の説明】[Explanation of symbols]

1 シリコンウエハ 2 周縁部 3 円周端部 4 注入型 5 注入口 6 出口 7 液状のパッシベーション材 8 気泡 9 減圧チャンバー DESCRIPTION OF SYMBOLS 1 Silicon wafer 2 Peripheral part 3 Circular end part 4 Injection type 5 Injection port 6 Outlet 7 Liquid passivation material 8 Bubbles 9 Decompression chamber

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】少なくとも一つのpn接合が形成された円
板状のシリコンウエハの周縁部がパッシベーション膜で
被覆され、パッケージに収納されて形成される半導体装
置の製造方法において、シリコンウエハの周縁部をパッ
シベーション用の注入型で囲い、該注入型を立てて配置
し、該注入型に液状のパッシベーション材を注入するた
めの注入口と、液状のパッシベーション材を取り出す出
口とを設け、注入口を下に、出口を上に配置し、注入口
から液状のパッシベーション材を注入し、注入型の底部
から上方に向かって液状のパッシベーション材を充満さ
せて液状のパッシベーション材に混入した気泡を出口か
ら取り出し、シリコンウエハの周縁部が液状のパッシベ
ーション材で覆われた後、液状のパッシベーション材を
硬化させ、シリコンウエハの周縁部をパッシベーション
膜で被覆することを特徴とする半導体装置の製造方法。
1. A method of manufacturing a semiconductor device in which a peripheral portion of a disk-shaped silicon wafer on which at least one pn junction is formed is covered with a passivation film and is housed in a package, the peripheral portion of the silicon wafer is provided. Is surrounded by an injection mold for passivation, the injection mold is placed upright, an injection port for injecting the liquid passivation material into the injection mold, and an outlet for taking out the liquid passivation material are provided. Then, the outlet is placed on the upper side, the liquid passivation material is injected from the injection port, the liquid passivation material is filled upward from the bottom of the injection mold, and bubbles mixed in the liquid passivation material are taken out from the outlet, After the peripheral edge of the silicon wafer is covered with the liquid passivation material, the liquid The method of manufacturing a semiconductor device comprising coating the peripheral portion of the wafer with a passivation film.
【請求項2】パッシベーション材がシリコーンゴムであ
ることを特徴とする請求項1記載の半導体装置の製造方
法。
2. The method according to claim 1, wherein the passivation material is silicone rubber.
【請求項3】注入型の傾斜角度が重力方向に対して0〜
45°とすることを特徴とする請求項1記載の半導体装
置の製造方法。
3. The angle of inclination of the injection mold is 0 to the direction of gravity.
2. The method according to claim 1, wherein the angle is 45 [deg.].
JP23164596A 1996-09-02 1996-09-02 Manufacture of semiconductor device Pending JPH1074752A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23164596A JPH1074752A (en) 1996-09-02 1996-09-02 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23164596A JPH1074752A (en) 1996-09-02 1996-09-02 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH1074752A true JPH1074752A (en) 1998-03-17

Family

ID=16926752

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23164596A Pending JPH1074752A (en) 1996-09-02 1996-09-02 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH1074752A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110223909A (en) * 2019-05-29 2019-09-10 浙江荷清柔性电子技术有限公司 A kind of crystal round fringes processing method and wafer assembly

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110223909A (en) * 2019-05-29 2019-09-10 浙江荷清柔性电子技术有限公司 A kind of crystal round fringes processing method and wafer assembly
CN110223909B (en) * 2019-05-29 2024-03-26 浙江荷清柔性电子技术有限公司 Wafer edge processing method and wafer assembly

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