CN110222366A - A kind of output impedance matching networks design method inhibiting function with higher harmonics - Google Patents
A kind of output impedance matching networks design method inhibiting function with higher harmonics Download PDFInfo
- Publication number
- CN110222366A CN110222366A CN201910351890.3A CN201910351890A CN110222366A CN 110222366 A CN110222366 A CN 110222366A CN 201910351890 A CN201910351890 A CN 201910351890A CN 110222366 A CN110222366 A CN 110222366A
- Authority
- CN
- China
- Prior art keywords
- network
- multistage
- design
- value
- shape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The invention discloses a kind of output impedance matching networks design methods for inhibiting function with higher harmonics, by being designed using multistage T-network, under the premise of not increasing circuit complexity, more design freedoms are provided to engineering staff, in restriction with to reach more preferably harmonic inhibition capability, realizing the purpose that power amplification efficiency is promoted within the scope of interior gain flatness.
Description
Technical field
The present invention relates to the technical field of RF IC more particularly to it is a kind of with higher harmonics inhibit function it is defeated
Impedance matching network design method out.
Background technique
Radio-frequency power amplifier (Radio Frequency Power Amplifier, RFPA), which is located in communication system, to be sent out
The end of machine is penetrated, effect is that small-power radiofrequency signal caused by modulation oscillator circuit is carried out to multistage amplification, defeated when meeting
After power index requires out, antenna can be fed to and radiate.Therefore, as the corn module in communication system it
One, power amplifier will directly influence the important indicators such as the communication quality, bandwidth of operation, battery durable of equipment.It is huge now
In big hand-held mobile terminal market, since power amplifier is bigger compared to the other assemblies energy consumption in transceiver, the height of efficiency is past
Toward the cruise duration for determining equipment, user experience is also just affected indirectly, so, raising efficiency is the one of power amplifier product research
A hot spot also agrees with the new era theory of energy conservation and environmental protection sustainable development.
By power conservation it is found that the total output power of amplifier is equal to the summation of output end fundamental wave and each harmonic power,
Along with the heat consumption of transistor internal.To maximize the efficiency of power amplifier, the base for being assigned to load should be just improved as far as possible
Wave power reduces the interior damage of useless high-order harmonic wave ingredient and transistor.Because transistor itself is there are numerous parasitic parameters,
And they can change with the change of working environment, therefore be generally relatively inaccessible to preferably imitate for the improvement plan of interior damage power
Fruit.In comparison, the purpose for being just able to achieve higher harmonics inhibition by rationally designing output impedance matching networks, while by standard 50
Ω load matched is to the optimum impedance for meeting particular characteristic；To keep certain bandwidth, traditionally we utilize multistage down conversion
Low pass L-network is constructed.
First to carry out necessary explanation to single-unit L shape (dual-element) network convenient for analysis:
As shown in Figure 1, the L shape match circuit being inserted into dashed box can will load RLIt is converted into source impedance R downwardsS, electricity in parallel
Appearance can reduce RLValue, play the role of narrow-band impedance converter；Concatenated inductance then offsets the appearance generated after parallel-serial converter
It is anti-, value pure resistance R one small just is seen in source in this ways。
Impedance interconversion rate q is defined as:And there are following relationships:Q=q；
Wherein, Q is the quality factor of matching network, XnFor the impedance of respective element.To realize harmonic restraining function, usually
One small inductor of concatenation makes to correspond to humorous with capacitor common resonance at specified harmonic frequency on capacitive branch in parallel
Wave is shorted to ground, to avoid generating useless real power in load, with this raising efficiency；Since additional series inductance changes
Become the Frequency Response of original matching network, for the offset for compensating frequency, redesigns LC resonance trap by simply calculating
Circuit is to maintain original matching status, the method is as follows:
Wherein, CeqIt is LC series circuit in fundamental frequency ω0Under equivalent capacity, ωrFor harmonic frequency, fundamental frequency=
Centre frequency, ω0=2 π f0。
Inhibit the complete more piece L shape matching network design of function as shown in Figure 2 with 2,3,5 subharmonic.
Traditional higher harmonics inhibits matching process easy to use, and can first pass through Smith chart solution or preliminary calculation
Assignment is carried out with observing effect to the element in network, the later period is substituted for actually again to be had consumption element and do in conjunction with emulation last excellent
Change tuning；Due to having the characteristics that clearly process and the setting of accurate initial value, abovementioned steps can also evolve into efficient computer
Procedure treatment, this can save many design times.
But the output impedance matching networks of specific application are directed to, are generally required in impedance transformation ratio, out-of-band harmonics inhibition, net
Compromise consideration is carried out between multiple parameters such as the transmission loss (Insertion Loss) of network and occupied area, and the matching of L shape can only specify
Two in centre frequency, impedance matching ratio and Q value (bandwidth), the deficiency of design freedom is difficult to it suitable for more multiple
Miscellaneous efficient broadband multimode multi-frequency communication system.Bandwidth (BW, bandwidth)=centre frequency f0/ quality factor q.
Applied to the power amplifier of hand-held mobile terminal, output matching network needs to arrive 50 Ω load change of standard
To meet the requirement of high-output power, the matching of multiple-order low-pass L shape specifies two freedom due to being only capable of for only several ohm of small impedance
Amount, after the impedance transformation ratio of every level-one has been determined with component values selection range according to actual needs, single-unit with whole
The Q value of distribution network has also determined therewith namely traditional method can not effectively control bandwidth of operation, although using
Lowpass structures and LC resonance circuit can provide certain band stray and harmonics restraint, but for High Linear communication system,
More harsh ACPR and EVM index undoubtedly considerably increases the difficulty of conventional multi-level L shape matched design, because it can not exist simultaneously
Compromise between multiple indexs.
Summary of the invention
It is an object of the invention to overcome the deficiencies in the prior art, meet future 5G wireless communication to broadband, high efficiency and
The demand of high linearity provides a kind of output impedance matching networks design method for inhibiting function with higher harmonics.Pass through utilization
Multistage T-network is designed, and under the premise of not increasing circuit complexity, provides more designs freely to engineering staff
Degree, in restriction with to reach more preferably harmonic inhibition capability, realizing the mesh that power amplification efficiency is promoted within the scope of interior gain flatness
's.
To achieve the above object, technical solution provided by the present invention are as follows:
It is designed using multistage T shape matching network, the specific steps are as follows:
A1: according to design objective, optimal source impedance R is draftedsNumerical value then constructs traditional multistage L shape pair net
Network compares by reference；
A2: the LC resonance circuit with frequency offset compensation is designed；
A3: emulating the S21 curve of observation cascade network by schematic diagram, determines the attainable harmonics restraint of conventional method institute
Effect assesses the gap between current linear degree and design objective with interior gain flatness；
A4: according to step A3 assessment as a result, by the Q of single-unit or more piece T-network in multistage T shape matching networknValue
Setting is greater than the Q that conventional method corresponds to joint numbernValue；
A5: by the respective Q of the multistage network determinednValue and centre frequency f0Make the higher hamonic wave of short circuit processing with needs,
In conjunction with the influence of capacitance, the parameter value of all elements in network is determined；
A6: emulating the S21 curve of observation cascade network by schematic diagram, determines the method using multistage T shape matching network
The attainable harmonic suppression effect of institute with interior gain flatness；
A7: according to simulation result and index request, cascade T shape matching network is adjusted, guarantees designed output
Impedance matching network with interior Insertion Loss fluctuation under the premise of in tolerance have enough harmonics restraint surpluses with offset because
It is influenced brought by device model and simulation accuracy, mismachining tolerance；
A8: the element that step A7 optimizes all is substituted for the actual components of consumption, and to actual circuit schematic diagram
Iteration optimization tuning is executed, i.e., repeatedly step A7 is until meet all design objectives.
Further, when capacitance acquirement numerical value is big, when ignoring its influence to network, multistage described in step A4
T shape matching network is made of multiple single-unit T-networks；When capacitance obtain numerical value it is small, its influence to network cannot be ignored
When, multistage T shape matching network described in step A4 is made of single-unit T-network and a L-network.
Further, the shunt capacitance C in the single-unit T-network is divided for after two parts, on the whole, the network quilt
It is equivalent to be regarded as two back-to-back L shape circuits；
By loading RLThe interlaminated resistance R being first transformed into upwards at two capacitance connectionsI, then pass through second L shape
It is R with downward conversionS；Make also to obtain high Q value in the case where given integral transformation ratio, to realize that higher harmonics inhibits；
The Q value of network are as follows:
As given Q, transformation resistance and centre frequency f0When, R is acquired using above formulaI, then calculate total capacitance C；
Finally, remaining two inductance parameters values in network can be obtained by following relationship:
Further, in the step S8, the element that step S7 optimizes all is substituted for the actual components of consumption
When, need to carry out inductance 3 D electromagnetic emulation to establish accurate model.
Further, when multistage T shape matching network is three-level T shape matching network, it will be close to source impedance RsS3 network
Design is in impedance conversion frequency point f03, f03>f0；It will be close to source impedance RLS1 network design in impedance conversion frequency point f01, f01
<f0；By the S2 network design between S1 network and S3 network in centre frequency f0；So that the held stationary in big broadband
Gain.
Compared with prior art, the principle of this programme is as follows:
Traditional multistage L shape matching network design is changed to be designed using multistage T shape matching network.
Compared with prior art, as follows the advantages of this programme:
1. series inductance can be combined into one between two close networks in this programme, with traditional multi-stage cascade L shape
Matching network topological structure having the same only needs to dismantle consideration in analysis, so that can be outer in impedance transformation ratio, band
Compromise consideration is carried out between the performance indicators such as harmonics restraint, matching network Insertion Loss and bandwidth of operation, and does not increase any element.
2. in specified bandwidth more preferably harmonic suppression effect can be realized under the premise of meeting gain flatness, improve
The linearity and efficiency of power amplifier.
3. having the advantages that all of traditional L-type matched design, it can derive in network own by accurately calculating
The initial value of element, and it is also provided that LC resonance trap circuit.It can be designed by perceptive construction on mathematics and ADS high-frequency circuit
Tool collaboration carries out the design of efficient power amplifier output matching network, greatly shortens the time of optimization tuning.
4. having versatility and generality, it is equally applicable to Pi l network, the specific circuit design such as upper impedance transformation
In the middle.
5. gain flatness can be improved to expire by the impedance conversion frequency point of reasonable set networks at different levels according to demand
The scene of sufficient broadband application.
6. influence of the capacitance to deviation and element loss caused by impedance transformation has been comprehensively considered, according to the step of offer
It is rapid carry out matching network design can simulating actual conditions as precisely as possible, improve flow success rate.
Detailed description of the invention
Fig. 1 is traditional single-unit L shape (dual-element) network diagram；
Fig. 2 is traditional complete more piece L shape matching network schematic diagram for inhibiting function with 2,3,5 subharmonic；
Fig. 3 is the matched equivalent schematic of T shape；
Fig. 4 is the structural schematic diagram of complete three sections T shape matching network；
Fig. 5 is that traditional three-level L shape matching network and the present invention use three section T shape matching network time-harmonic wave inhibitory effects pair
Than figure；
Fig. 6 is when traditional three-level L shape matching network and the present invention use three section T shape matching networks with interior gain flatness
Comparison diagram.
Specific embodiment
The present invention is further explained in the light of specific embodiments:
The present embodiment is designed using three-level T shape matching network, the specific steps are as follows:
A1: according to design objective, optimal source impedance R is draftedsNumerical value then constructs traditional multistage L shape pair net
Network compares by reference；It should follow following rule: to guarantee the center frequency point f in bandwidth of operation0Place is calculated each
Component values are located at achievable proper range section, and the impedance transformation ratio (namely quality factor q) of single-unit L-networks at different levels is big
Cause is answered are as follows: q1≈1,q2≈1-1.5,q3≈ 1.5-2.5 (respectively corresponds S1-S3 in Fig. 2)；
A2: the LC resonance circuit with frequency offset compensation is designed；
A3: emulating the S21 curve of observation cascade network by schematic diagram, determines the attainable harmonics restraint of conventional method institute
Effect assesses the gap between current linear degree and design objective with interior gain flatness；
A4: according to step A3 assessment as a result, by the Q of single-unit or more piece T-network in three-level T shape matching networknValue
Setting is greater than the Q that conventional method corresponds to joint numbernValue；In this way, by the respective Q of the three-level network determinednValue and centre frequency f0With
The higher hamonic wave for needing to make short circuit processing, comprehensively considers the influence of capacitance, can determine the parameter of all elements in network
Value；It should be noted that S2 and S3 is structure shown in Fig. 3, the matching of two section L shapes need to be divided into and carry out element fixed value calculation, specifically
It sees below；And S1 is depending on the circumstances.
When capacitance obtains, numerical value is big, and it is T-network that when ignoring its influence to network, S1 is consistent with S2 and S3
Structure need to be divided into the matching of two section L shapes and carry out element fixed value calculation；When capacitance obtain numerical value it is small, it cannot be ignored to network
Influence when, S1 be single-unit L-network structure；
A5: by the respective Q of the multistage network determinednValue and centre frequency f0Make the higher hamonic wave of short circuit processing with needs,
In conjunction with the influence of capacitance, the parameter value of all elements in network is determined；
A6: emulating the S21 curve of observation cascade network by schematic diagram, determines the method using multistage T shape matching network
The attainable harmonic suppression effect of institute with interior gain flatness；
A7: according to simulation result and index request, cascade T shape matching network is adjusted, guarantees designed output
Impedance matching network with interior Insertion Loss fluctuation under the premise of in tolerance have enough harmonics restraint surpluses with offset because
It is influenced brought by device model and simulation accuracy, mismachining tolerance；
A8: the element that step A7 optimizes all is substituted for the actual components of consumption, wherein need to carry out inductance
3 D electromagnetic (EM) is emulated to establish accurate model；Because the quality factor of inductance is very low, this is just compared to for capacitor
Mean that it has very big loss, the influence that can not ignore can be generated to circuit performance；Finally actual circuit schematic diagram is held
Row iteration optimization tuning, i.e., repeatedly step A7 is until meet all design objectives.
A9: to realize Broadband Matching, it will be close to source impedance RsS3 network design in impedance conversion frequency point f03, f03>
f0；It will be close to source impedance RLS1 network design in impedance conversion frequency point f01, f01<f0；To be located at S1 network and S3 network it
Between S2 network design in centre frequency f0；So that in big broadband held stationary gain；It should be noted that since S1 is
It is manually set and is converted lower than the impedance carried out at centre frequency, then S1 is in perception, electricity needed for compensating for S2 in S2
Inductance value is also in similarly perceptual in the S3 S1 seen and S2 cascade network, therefore series inductance parameter value is equal to initial on the right side of setting S3
Calculated value subtracts seen inductance value.But for power amplifier output end, whole matching network looks like in capacitive, because
This needs to increase a small inductor in power amplifier output node to offset the extra capacitor in this part.
In above-mentioned steps A4, the shunt capacitance C in the single-unit T-network is divided for after two parts, on the whole, the net
Network is regarded as two back-to-back L shape circuits by equivalent；
By loading RLThe interlaminated resistance R being first transformed into upwards at two capacitance connectionsI, then pass through second L shape
It is R with downward conversionS；Make also to obtain high Q value in the case where given integral transformation ratio, to realize that higher harmonics inhibits；
The Q value of network are as follows:
As given Q, transformation resistance and centre frequency f0When, R is acquired using above formulaI, then calculate total capacitance C；
Finally, remaining two inductance parameters values in network can be obtained by following relationship:
Referring to shown in Fig. 5-6, the present embodiment can be realized more excellent in specified bandwidth under the premise of meeting gain flatness
Harmonic suppression effect, the linearity and efficiency of power amplifier can be improved.
In addition, the present embodiment can be in performances such as impedance transformation ratio, out-of-band harmonics inhibition, matching network Insertion Loss and bandwidth of operation
Compromise consideration is carried out between index, without increasing any element；Because of as shown in Figure 4, connecting between S3 and S2, between S2 and S1
Inductance can be combined into one, the present embodiment substantially with traditional three-stage cascade L shape matching network topological structure having the same,
It only needs to dismantle consideration in analysis.In this way, the present embodiment has bright under the premise of guaranteeing that implementation complexity is roughly the same
Aobvious superiority.
Furthermore the present embodiment has the advantages that all of traditional L-type matched design, it can is derived by accurately calculating
The initial value of all elements in network, and it is also provided that LC resonance trap circuit.Therefore the present embodiment can be soft by mathematics
Part MATLAB cooperates with the design for carrying out efficient power amplifier output matching network with ADS high-frequency circuit design tool, substantially reduces
Optimize the time of tuning.
Finally, the present embodiment has comprehensively considered influence of the capacitance to deviation and element loss caused by impedance transformation,
According to the step of providing carry out matching network design can simulating actual conditions as precisely as possible, improve flow success rate.
The examples of implementation of the above are only the preferred embodiments of the invention, and implementation model of the invention is not limited with this
It encloses, therefore all shapes according to the present invention, changes made by principle, should all be included within the scope of protection of the present invention.
Claims (5)
1. a kind of output impedance matching networks design method for inhibiting function with higher harmonics, which is characterized in that utilize multistage T shape
Matching network is designed, the specific steps are as follows:
A1: according to design objective, optimal source impedance R is draftedsNumerical value constructs traditional multistage L shape matching network then to make
Reference pair is shone；
A2: the LC resonance circuit with frequency offset compensation is designed；
A3: emulating the S21 curve of observation cascade network by schematic diagram, determines the attainable harmonic suppression effect of conventional method institute
With with interior gain flatness, the gap between current linear degree and design objective is assessed；
A4: according to step A3 assessment as a result, by the Q of single-unit or more piece T-network in multistage T shape matching networknValue setting is big
The Q of joint number is corresponded in conventional methodnValue；
A5: by the respective Q of the multistage network determinednValue and centre frequency f0The higher hamonic wave for making short circuit processing with needs, in conjunction with
The influence of capacitance determines the parameter value of all elements in network；
A6: emulating the S21 curve of observation cascade network by schematic diagram, determines the method institute energy using multistage T shape matching network
The harmonic suppression effect that reaches with interior gain flatness；
A7: according to simulation result and index request, cascade T shape matching network is adjusted, guarantees designed output impedance
Matching network fluctuates under the premise of in tolerance with enough harmonics restraint surpluses with interior Insertion Loss to offset because of first device
It is influenced brought by part model and simulation accuracy, mismachining tolerance；
A8: the element that step A7 optimizes all is substituted for the actual components of consumption, and actual circuit schematic diagram is executed
Iteration optimization tuning, i.e., repeatedly step A7 is until meet all design objectives.
2. a kind of output impedance matching networks design method for inhibiting function with higher harmonics according to claim 1,
It is characterized in that, when capacitance obtains, numerical value is big, and when ignoring its influence to network, multistage T shape described in step A4 is matched
Network is made of multiple single-unit T-networks；When capacitance acquirement numerical value is small, when cannot ignore its influence to network, step
Multistage T shape matching network described in A4 is made of single-unit T-network and a L-network.
3. a kind of output impedance matching networks design method for inhibiting function with higher harmonics according to claim 2,
It is characterized in that, the shunt capacitance C in the single-unit T-network is divided for after two parts, on the whole, which is regarded as by equivalent
Two back-to-back L shape circuits；
By loading RLThe interlaminated resistance R being first transformed into upwards at two capacitance connectionsI, then by second L shape match to
Down conversion is RS；Make also to obtain high Q value in the case where given integral transformation ratio, to realize that higher harmonics inhibits；
The Q value of network are as follows:
As given Q, transformation resistance and centre frequency f0When, R is acquired using above formulaI, then calculate total capacitance C；
Finally, remaining two inductance parameters values in network can be obtained by following relationship:
4. a kind of output impedance matching networks design method for inhibiting function with higher harmonics according to claim 1,
It is characterized in that, in the step S8, when the element that step S7 optimizes all is substituted for the actual components of consumption, needs pair
Inductance carries out 3 D electromagnetic emulation to establish accurate model.
5. a kind of output impedance matching networks design method for inhibiting function with higher harmonics according to claim 1,
It is characterized in that, when multistage T shape matching network is three-level T shape matching network, will be close to source impedance RsS3 network design hindering
Resistance changes Frequency point f03, f03>f0；It will be close to source impedance RLS1 network design in impedance conversion frequency point f01, f01<f0；By position
S2 network design between S1 network and S3 network is in centre frequency f0；So that in big broadband held stationary gain.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910351890.3A CN110222366B (en) | 2019-04-28 | 2019-04-28 | Design method of output impedance matching network with high harmonic suppression function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910351890.3A CN110222366B (en) | 2019-04-28 | 2019-04-28 | Design method of output impedance matching network with high harmonic suppression function |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110222366A true CN110222366A (en) | 2019-09-10 |
| CN110222366B CN110222366B (en) | 2022-08-12 |
Family
ID=67820277
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910351890.3A Active CN110222366B (en) | 2019-04-28 | 2019-04-28 | Design method of output impedance matching network with high harmonic suppression function |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110222366B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111384901A (en) * | 2020-03-14 | 2020-07-07 | 电子科技大学 | Broadband high-efficiency three-way Doherty power amplifier based on post-matching network |
| CN112953592A (en) * | 2021-01-22 | 2021-06-11 | RealMe重庆移动通信有限公司 | Radio frequency circuit, electronic equipment and transmission method of radio frequency signal |
| CN114792080A (en) * | 2022-06-24 | 2022-07-26 | 广州联星科技有限公司 | Design method of broadband power amplifier chip |
| CN115659891A (en) * | 2022-11-23 | 2023-01-31 | 荣耀终端有限公司 | Optimization method of resonant network and electronic equipment |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090167457A1 (en) * | 2005-11-10 | 2009-07-02 | The Arizona Bd Of Reg On Behalf Of The Univ Of Az | Apparatus and method of selecting components for a reconfigurable impedance match circuit |
| CN104579189A (en) * | 2015-02-04 | 2015-04-29 | 广东工业大学 | Circuit structure for improving harmonic performance of radio frequency power amplifier |
| CN104716906A (en) * | 2015-04-03 | 2015-06-17 | 广东工业大学 | Method and circuit structure for improving efficiency of wide-band radio frequency power amplifier |
| CN105631109A (en) * | 2015-12-24 | 2016-06-01 | 合肥师范学院 | Design method for radio frequency ultra-wide band high-efficiency power amplifier and circuit |
| CN105811888A (en) * | 2016-04-20 | 2016-07-27 | 广东工业大学 | Radio frequency power amplifier output match circuit structure and designing method thereof |
| CN106549638A (en) * | 2016-10-31 | 2017-03-29 | 唯捷创芯(天津)电子技术股份有限公司 | A kind of suppression harmonic wave and spuious radio-frequency power amplifier, chip and communication terminal |
| CN108718199A (en) * | 2018-07-24 | 2018-10-30 | 广东电网有限责任公司 | Antenna self-adaptive impedance matching box and matching process |
-
2019
- 2019-04-28 CN CN201910351890.3A patent/CN110222366B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090167457A1 (en) * | 2005-11-10 | 2009-07-02 | The Arizona Bd Of Reg On Behalf Of The Univ Of Az | Apparatus and method of selecting components for a reconfigurable impedance match circuit |
| CN104579189A (en) * | 2015-02-04 | 2015-04-29 | 广东工业大学 | Circuit structure for improving harmonic performance of radio frequency power amplifier |
| CN104716906A (en) * | 2015-04-03 | 2015-06-17 | 广东工业大学 | Method and circuit structure for improving efficiency of wide-band radio frequency power amplifier |
| CN105631109A (en) * | 2015-12-24 | 2016-06-01 | 合肥师范学院 | Design method for radio frequency ultra-wide band high-efficiency power amplifier and circuit |
| CN105811888A (en) * | 2016-04-20 | 2016-07-27 | 广东工业大学 | Radio frequency power amplifier output match circuit structure and designing method thereof |
| CN106549638A (en) * | 2016-10-31 | 2017-03-29 | 唯捷创芯(天津)电子技术股份有限公司 | A kind of suppression harmonic wave and spuious radio-frequency power amplifier, chip and communication terminal |
| CN108718199A (en) * | 2018-07-24 | 2018-10-30 | 广东电网有限责任公司 | Antenna self-adaptive impedance matching box and matching process |
Non-Patent Citations (1)
| Title |
|---|
| 郑瑞青 等: "应用于2G/3G移动通讯的多频多模高谐波抑制功率放大器", 《固体电子学研究与进展》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111384901A (en) * | 2020-03-14 | 2020-07-07 | 电子科技大学 | Broadband high-efficiency three-way Doherty power amplifier based on post-matching network |
| CN111384901B (en) * | 2020-03-14 | 2023-02-24 | 电子科技大学 | Broadband high-efficiency three-way Doherty power amplifier based on post-matching network |
| CN112953592A (en) * | 2021-01-22 | 2021-06-11 | RealMe重庆移动通信有限公司 | Radio frequency circuit, electronic equipment and transmission method of radio frequency signal |
| CN114792080A (en) * | 2022-06-24 | 2022-07-26 | 广州联星科技有限公司 | Design method of broadband power amplifier chip |
| CN115659891A (en) * | 2022-11-23 | 2023-01-31 | 荣耀终端有限公司 | Optimization method of resonant network and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110222366B (en) | 2022-08-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110222366A (en) | A kind of output impedance matching networks design method inhibiting function with higher harmonics | |
| KR102355260B1 (en) | Circuits and methods related to power amplifier efficiency based on multi-harmonic approximation | |
| Po et al. | A novel method for synthesizing an automatic matching network and its control unit | |
| Beltran | Class-F and inverse class-F power amplifier loading networks design based upon transmission zeros | |
| Ji et al. | Concurrent dual-band class-E power amplifier using composite right/left-handed transmission lines | |
| AlMuhaisen et al. | Wide band high-efficiency power amplifier design | |
| Mortazavi et al. | A 38 GHz inverse class-F power amplifier with 38.5% peak PAE, 16.5 dB gain, and 50 mW P sat in 0.13-µm SiGe BiCMOS | |
| CN113162554A (en) | Harmonic control-based hybrid high-efficiency power amplifier and design method thereof | |
| CN113922780A (en) | Power divider applicable to Doherty PA | |
| Kouhalvandi et al. | A review on optimization methods for designing RF power amplifiers | |
| CN102176657A (en) | Positive-feedback-broadband LNA (low noise amplifier) for millimeter wave frequency range | |
| Kouhalvandi et al. | Automated matching network modeling and optimization for power amplifier designs | |
| CN106505901B (en) | A kind of linear-resonance combined type hyperfrequency inverter | |
| Boutayeb et al. | Output matching network design for broadband class B/J power amplifier | |
| Suvarna et al. | Transformer-based tunable matching network design techniques in 40-nm CMOS | |
| CN114792080B (en) | Design method of broadband power amplifier chip | |
| CN108736833A (en) | A kind of raising compensation circuit of the high efficiency double frequency with E power-like amplifier carrier frequencies | |
| CN110224496A (en) | The optimization method of impedance matching network for field coupling wireless power transmission | |
| CN109871580A (en) | A kind of amplifier matching network design method based on simplified real frequency method | |
| CN109921807A (en) | A kind of broadband chaotic oscillating circuit | |
| Anh et al. | Design and optimization of high-efficiency resonant wireless power transfer system | |
| CN114123994A (en) | Active multi-reactance compensation output topological structure based on switch E-type mode power amplifier | |
| CN102739167A (en) | Design method for microwave amplifier | |
| CN108933569A (en) | A kind of broadband magnet coupled resonant type wireless electric energy transmission E power-like amplifier | |
| Ali et al. | Mathematical modeling of an inductive link for optimizing efficiency |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |