CN110120816A - A kind of current steering DAC switching matrix drive circuit - Google Patents
A kind of current steering DAC switching matrix drive circuit Download PDFInfo
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- CN110120816A CN110120816A CN201810109273.8A CN201810109273A CN110120816A CN 110120816 A CN110120816 A CN 110120816A CN 201810109273 A CN201810109273 A CN 201810109273A CN 110120816 A CN110120816 A CN 110120816A
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- power switch
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- voltage
- switch tube
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- 230000004913 activation Effects 0.000 abstract description 5
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 238000005516 engineering process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
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- 230000015572 biosynthetic process Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0863—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches
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- Theoretical Computer Science (AREA)
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Abstract
The invention discloses a kind of current steering DAC switching matrix drive circuits, including driver 1, driver 2, driver 3, driver 4, driving voltage Vg1, driving voltage Vg2, driving voltage Vg3, driving voltage Vg4, power switch tube MP1, power switch tube MP2, power switch tube MP3, power switch tube MP4, PMOS tube Md1, NMOS tube Md2, PMOS tube Md3, PMOS tube Md4, voltage source VDD1, voltage source VDD2, voltage Vcom, input signal Din and input signal Vin.Beneficial effects of the present invention: new activation configuration can export the low-voltage being not zero.Work is in saturation region when switching tube MP1~MP4 is connected；Noise has been isolated in the use of LDO power supply, while improving the high voltage of driver output signal, effective on-off switching tube MP1~MP4；The output impedance for improving current pump DAC improves high frequency dynamic property.
Description
Technical field
The present invention relates to high-speed, high precision D/A converter design fields, it particularly relates to a kind of current
Steering DAC switching matrix drive circuit.
Background technique
Overwhelming majority signal present in nature is all continuous analog signal, and non-discrete digital signal.Therefore,
A kind of medium is needed to erect the bridge of signal transmitting between simulation and number, and digital analog converter (DAC) exactly will
Digital signal is converted into a kind of essential interface circuit of analog signal.The high speed of Digital Signal Processing (DSP) circuit is sent out
Equally also to the performance of converter circuit, more stringent requirements are proposed for exhibition.Under many typical cases, for example, it is wired or wireless
Communication, video frequency signal processing, Direct Digital Synthesis etc., the performance of high-speed, high precision converter have been largely fixed whole
The performance of a system, especially in high speed communication field, the performance of converter possibly even becomes the bottleneck of systematic entirety energy.Cause
This, no matter in academia or industry, the research to converter performance is all hot spot all the time.
In the DAC of numerous types, the structure of current steering DAC determines its inherent high-speed, high precision characteristic.It
It is usually made of one group of current source and corresponding current switch, the current switch of difference is just as steering engine according to the signal of input
By conduct current positive or reversed-phase output.What it is due to current steering DAC output is current signal, can be directly driven negative
It carries without additionally increasing voltage buffer, while can also be by load transfer in piece at voltage output.In addition, current steer knot
Structure DAC can be produced using standard CMOS process, easy and digital circuit integration, to reduce the cost of system.
Deficiency in the prior art: since the usual output level of conventional drives is that supply voltage (Vdd) arrives ground voltage
(0), due to the diminution of process, the threshold voltage of MOS transistor is less than 1V.And when 0V, switching tube MP1~MP4
It opens.At this time for switch tube (such as MP1), its work to be made then to need to meet in saturation region:
Vcom-Vg1-|VTH1| < Vcom-Va
I.e. | VTH1| > Va-Vg1
|VTH1| > Va, as Vg1=0
When output voltage swing is 1V Vp, Va is up to 1V.At this time due to | VTH1| < 1 is unsatisfactory for above-mentioned saturation region condition.
Therefore switching tube is in linear zone when switching tube is near open state, Va, Vb to the maximum amplitude of oscillation；Switching tube in linear zone
Its output impedance wants much lower compared to saturation region, and for high speed current steering DAC, the dynamic property (such as SFDR) of high frequency treatment
For main contributions from limited output impedance, output impedance is bigger, and performance is better, therefore works in the switching tube drop of linear zone
The low output impedance of current steering DAC, so that high frequency dynamic property deteriorates；In addition, as process reduces, low pressure VDD2 drop
Low, switching PMOS tube at this time may turn off not exclusively, influence switching characteristic, reduce performance.
For the problems in the relevant technologies, currently no effective solution has been proposed.
Summary of the invention
For the problems in the relevant technologies, the present invention proposes a kind of current steering DAC switch arrays driving electricity
Road, to overcome above-mentioned technical problem present in existing the relevant technologies.
The technical scheme of the present invention is realized as follows:
According to an aspect of the invention, there is provided a kind of current steering DAC switching matrix drive circuit,
Including driver 1, driver 2, driver 3, driver 4, driving voltage Vg1, driving voltage Vg2, driving voltage Vg3, driving
Voltage Vg4, power switch tube MP1, power switch tube MP2, power switch tube MP3, power switch tube MP4, PMOS tube Md1,
NMOS tube Md2, PMOS tube Md3, PMOS tube Md4, voltage source VDD1, voltage source VDD2, voltage Vcom, input signal Din and defeated
Enter signal Vin, the voltage source VDD1 forms the voltage Vcom by current source, the voltage source VDD1 respectively with the function
Rate switching tube MP1, the power switch tube MP2, the power switch tube MP3, the power switch tube MP4 are connected, described
Input signal Din respectively corresponds to form institute by the driver 1, the driver 2, the driver 3 and the driver 4
State driving voltage Vg1, the driving voltage Vg2, the driving voltage Vg3 and the driving voltage Vg4, the driver 1 with
The power switch tube MP1 connection, the driver 2 are connect with the power switch tube MP2, the driver 3 and the function
Rate switching tube MP3 is connected, and the driver 4 is connected with the power switch tube MP4, and the power switch tube MP2
Drain terminal is connected with the drain terminal of the power switch tube MP4, the drain terminal of the power switch tube MP1 and the power switch tube
The drain terminal of MP3 is connected.
Wherein, the input signal Vin respectively with the PMOS tube Md1, the NMOS tube Md2 and the PMOS tube
The grid end of Md4 is connected, the drain terminal of the PMOS tube Md1 grid end with the drain terminal of the NMOS tube Md2 and PMOS tube Md3 respectively
It is connected, and the source ground connection of the NMOS tube Md2, the PMOS tube Md3 drain terminal are connect with the source of the PMOS tube Md4,
The source of the PMOS tube Md3 is connected with driving power LDO, and the PMOS tube Md4 drain terminal is grounded.
Further, the PMOS tube Md1 is connected with voltage source VDD2.
Further, the Vg0 is connected with the grid end of the PMOS tube Md3, the input signal Vin and the PMOS
The grid end of pipe Md4 is connected.
Further, the frequency of the voltage Vcom is 50-60Hz.
Beneficial effects of the present invention:
1, new activation configuration can export the low-voltage being not zero.Work is full when switching tube MP1~MP4 is connected
The area and.
2, noise has been isolated in the use of LDO power supply, while improving the high voltage of driver output signal, effective to turn off
Switching tube MP1~MP4.
3, the output impedance for improving current pump DAC improves high frequency dynamic property.
Detailed description of the invention
It in order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, below will be to institute in embodiment
Attached drawing to be used is needed to be briefly described, it should be apparent that, the accompanying drawings in the following description is only some implementations of the invention
Example, for those of ordinary skill in the art, without creative efforts, can also obtain according to these attached drawings
Obtain other attached drawings.
Fig. 1 is a kind of principle of current steering DAC switching matrix drive circuit according to an embodiment of the present invention
Figure；
Fig. 2 is a kind of schematic diagram of current steering DAC switching matrix drive circuit of the prior art.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art's every other embodiment obtained belong to what the present invention protected
Range.
According to an embodiment of the invention, providing a kind of current steering DAC switching matrix drive circuit.
As shown in Figs. 1-2, current steering DAC switching matrix drive circuit according to an embodiment of the present invention, packet
Include driver 1, driver 2, driver 3, driver 4, driving voltage Vg1, driving voltage Vg2, driving voltage Vg3, driving electricity
Press Vg4, power switch tube MP1, power switch tube MP2, power switch tube MP3, power switch tube MP4, PMOS tube Md1, NMOS
Pipe Md2, PMOS tube Md3, PMOS tube Md4, voltage source VDD1, voltage source VDD2, voltage Vcom, input signal Din and input letter
Number Vin, the voltage source VDD1 form the voltage Vcom by current source, and the voltage source VDD1 is opened with the power respectively
It closes pipe MP1, the power switch tube MP2, the power switch tube MP3, the power switch tube MP4 to be connected, the input
Signal Din respectively corresponds to form the drive by the driver 1, the driver 2, the driver 3, the driver 4
Dynamic voltage Vg1, the driving voltage Vg2, the driving voltage Vg3 and the driving voltage Vg4, the driver 1 with it is described
Power switch tube MP1 connection, the driver 2 are connect with the power switch tube MP2, and the driver 3 is opened with the power
Close pipe MP3 be connected, the driver 4 is connected with the power switch tube MP4, and the power switch tube MP2 drain terminal with
The power switch tube MP4 drain terminal is connected, and the power switch tube MP1 drain terminal is connected with the power switch tube MP3 drain terminal
It connects.
Wherein, the input signal Vin respectively with the PMOS tube Md1, the NMOS tube Md2 and the PMOS tube
The grid end of Md4 is connected, the drain terminal of the PMOS tube Md1 grid end with the drain terminal of the NMOS tube Md2 and PMOS tube Md3 respectively
It is connected, and the source ground connection of the NMOS tube Md2, the PMOS tube Md3 drain terminal are connect with the source of the PMOS tube Md4,
The source of the PMOS tube Md3 is connected with driving power LDO, and the PMOS tube Md4 drain terminal is grounded.
In one embodiment, the PMOS tube Md1 is connected with voltage source VDD2.
In one embodiment, the Vg0 is connected with the grid end of the PMOS tube Md3, the input signal Vin and institute
The grid end for stating PMOS tube Md4 is connected.
In one embodiment, the frequency of the voltage Vcom is 50-60Hz.
In addition, in one embodiment, such as Fig. 1: novel driving circuit, first order phase inverter is by the input signal
Vin reversely generates signal Vg0, wherein Vg0 is added to the grid end of the PMOS tube Md3 above the circuit of the second level, the input letter
Number Vin is added to the grid end of the PMOS tube Md4 below the second level.When the input signal Vin is got higher by low, Vg3 will be by height
It is lower, the PMOS tube Md3 conducting, the PMOS tube Md4 shutdown, exporting Vg voltage at this time is VLDO.When the input signal
Vin is lower by height, and Vg3 will be got higher by low, and the PMOS tube Md4 is gradually turned on, and Vg starts to reduce, as Vg is lower and lower, drop
The PMOS tube Md4 is made to enter sub-threshold region to certain voltage, the gain of the PMOS tube Md4 strongly reduces at this time, Vg drop
It is low to become slow.When Vg drops to certain voltage VL, the PMOS tube Md4 is eventually entered by area.At this point, Vg is no longer reduced,
It tends towards stability as VL.New activation configuration output high-low voltage is respectively VLDO and VL.Original structure switch is avoided simultaneously
PMOS tube is closed constantly and work is the linear zone the phenomenon that.The low level of Vg depends on the PMOS tube Md3 and PMOS tube Md4
Dimension ratio.Suitable ratio can be supplied to the most reasonable drive voltage range of switching tube, maximize the dynamic for improving DAC
Performance.The low-voltage being not zero can be exported in new activation configuration, work is being saturated when switching tube MP1~MP4 is connected
Area；Noise has been isolated in the use of LDO power supply, while improving the high voltage of driver output signal, effective on-off switching tube
MP1~MP4.The output impedance for improving current pump DAC above improves high frequency dynamic property.
In conclusion passing through driver 1, driver 2, driver 3, driving by means of above-mentioned technical proposal of the invention
Device 4, driving voltage Vg1, driving voltage Vg2, driving voltage Vg3, driving voltage Vg4, power switch tube MP1, power switch tube
MP2, power switch tube MP3, power switch tube MP4, PMOS tube Md1, NMOS tube Md2, PMOS tube Md3, PMOS tube Md4, voltage
Source VDD1, voltage source VDD2, voltage Vcom, input signal Din and input signal Vin, the voltage source VDD1 pass through current source
Form the voltage Vcom, the voltage source VDD1 respectively with the power switch tube MP1, the power switch tube MP2, described
Power switch tube MP3, the power switch tube MP4 are connected, and the input signal Din passes through the driver 1, the driving
Device 2, the driver 3, the driver 4 respectively correspond to form the driving voltage Vg1, the driving voltage Vg2, the drive
The dynamic voltage Vg3 and driving voltage Vg4, the driver 1 are connect with the power switch tube MP1, the driver 2 and institute
Power switch tube MP2 connection is stated, the driver 3 is connected with the power switch tube MP4, the driver 4 and the function
Rate switching tube MP5 is connected, and the power switch tube MP2 drain terminal is connected with the power switch tube MP4 drain terminal, the function
Rate switching tube MP1 drain terminal is connected with the power switch tube MP3 drain terminal.
Wherein, the input signal Vin respectively with the PMOS tube Md1, the NMOS tube Md2 and the PMOS tube
The grid end of Md4 is connected, the drain terminal of the PMOS tube Md1 grid end with the drain terminal of the NMOS tube Md2 and PMOS tube Md3 respectively
It is connected, and the source ground connection of the NMOS tube Md2, the PMOS tube Md3 drain terminal are connect with the source of the PMOS tube Md4,
The source of the PMOS tube Md3 is connected with driving power LDO, and the PMOS tube Md4 drain terminal is grounded.
Beneficial effects of the present invention: new activation configuration can export the low-voltage being not zero.Make switching tube MP1~
Work is in saturation region when MP4 is connected；Noise has been isolated in the use of LDO power supply, while improving the height electricity of driver output signal
Pressure, effective on-off switching tube MP1~MP4；The output impedance for improving current pump DAC improves high frequency dynamic property.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Within mind and principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (4)
1. a kind of current steering DAC switching matrix drive circuit, which is characterized in that including driver 1, driver
2, driver 3, driver 4, driving voltage Vg1, driving voltage Vg2, driving voltage Vg3, driving voltage Vg4, power switch tube
MP1, power switch tube MP2, power switch tube MP3, power switch tube MP4, PMOS tube Md1, NMOS tube Md2, PMOS tube Md3,
PMOS tube Md4, voltage source VDD1, voltage source VDD2, voltage Vcom, input signal Din and input signal Vin, the voltage source
VDD1 forms the voltage Vcom by current source, the voltage source VDD1 respectively with the power switch tube MP1, the power
Switching tube MP2, the power switch tube MP3, the power switch tube MP4 are connected, and the input signal Din passes through the drive
Dynamic device 1, the driver 2, the driver 3, the driver 4 respectively correspond to form the driving voltage Vg1, the driving
Voltage Vg2, the driving voltage Vg3 and the driving voltage Vg4, the driver 1 are connect with the power switch tube MP1,
The driver 2 is connect with the power switch tube MP2, and the driver 3 is connected with the power switch tube MP3, described
Driver 4 is connected with the power switch tube MP4, and the drain terminal of the power switch tube MP2 and the power switch tube MP4
Drain terminal be connected, the drain terminal of the power switch tube MP1 is connected with the drain terminal of the power switch tube MP3；
Wherein, the input signal Vin respectively with the PMOS tube Md1, the NMOS tube Md2 and the PMOS tube Md4
Grid end is connected, and the drain terminal of the PMOS tube Md1 is connected with the grid end of the drain terminal of the NMOS tube Md2 and PMOS tube Md3 respectively
It connects, and the source ground connection of the NMOS tube Md2, the PMOS tube Md3 drain terminal is connect with the source of the PMOS tube Md4, described
The source of PMOS tube Md3 is connected with driving power LDO, and the PMOS tube Md4 drain terminal is grounded.
2. a kind of current steering DAC switching matrix drive circuit according to claim 1, which is characterized in that
The PMOS tube Md1 is connected with voltage source VDD2.
3. a kind of current steering DAC switching matrix drive circuit according to claim 1, which is characterized in that
The Vg0 is connected with the grid end of the PMOS tube Md3, and the input signal Vin is connected with the grid end of the PMOS tube Md4
It connects.
4. a kind of current steering DAC switching matrix drive circuit according to claim 1, which is characterized in that
The frequency of the voltage Vcom is 50-60Hz.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810109273.8A CN110120816B (en) | 2018-02-05 | 2018-02-05 | Current steering DAC switch array driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810109273.8A CN110120816B (en) | 2018-02-05 | 2018-02-05 | Current steering DAC switch array driving circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110120816A true CN110120816A (en) | 2019-08-13 |
| CN110120816B CN110120816B (en) | 2024-02-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810109273.8A Active CN110120816B (en) | 2018-02-05 | 2018-02-05 | Current steering DAC switch array driving circuit |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060244709A1 (en) * | 2005-04-28 | 2006-11-02 | Che-Li Lin | Source driver and structure of adjusting voltage with speed |
| US20090066157A1 (en) * | 2006-08-05 | 2009-03-12 | Min Ming Tarng | Green Technology: Green circuit and device designs of green chip |
| US7663422B1 (en) * | 2008-09-02 | 2010-02-16 | Himax Technologies Limted | Source driving circuit for preventing gamma coupling |
| CN102571097A (en) * | 2010-12-31 | 2012-07-11 | 国民技术股份有限公司 | Voltage amplitude limiting circuit for controlling current supply switch of current steering analog-to-digital converter |
| CN104467861A (en) * | 2013-09-12 | 2015-03-25 | 富士通半导体股份有限公司 | Circuitry and methods for use in mixed-signal circuitry |
| CN106294262A (en) * | 2016-08-22 | 2017-01-04 | 上海集成电路研发中心有限公司 | A kind of LVDS drive circuit |
-
2018
- 2018-02-05 CN CN201810109273.8A patent/CN110120816B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060244709A1 (en) * | 2005-04-28 | 2006-11-02 | Che-Li Lin | Source driver and structure of adjusting voltage with speed |
| US20090066157A1 (en) * | 2006-08-05 | 2009-03-12 | Min Ming Tarng | Green Technology: Green circuit and device designs of green chip |
| US7663422B1 (en) * | 2008-09-02 | 2010-02-16 | Himax Technologies Limted | Source driving circuit for preventing gamma coupling |
| CN102571097A (en) * | 2010-12-31 | 2012-07-11 | 国民技术股份有限公司 | Voltage amplitude limiting circuit for controlling current supply switch of current steering analog-to-digital converter |
| CN104467861A (en) * | 2013-09-12 | 2015-03-25 | 富士通半导体股份有限公司 | Circuitry and methods for use in mixed-signal circuitry |
| CN106294262A (en) * | 2016-08-22 | 2017-01-04 | 上海集成电路研发中心有限公司 | A kind of LVDS drive circuit |
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| Publication number | Publication date |
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| CN110120816B (en) | 2024-02-27 |
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