CN110071705B - 发送电路以及集成电路 - Google Patents

发送电路以及集成电路 Download PDF

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Publication number
CN110071705B
CN110071705B CN201910039213.8A CN201910039213A CN110071705B CN 110071705 B CN110071705 B CN 110071705B CN 201910039213 A CN201910039213 A CN 201910039213A CN 110071705 B CN110071705 B CN 110071705B
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China
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circuit
data
effect transistor
channel field
field effect
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Chinese (zh)
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CN110071705A (zh
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铃木大辅
川井重明
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Socionext Inc
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Socionext Inc
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/017Adjustment of width or dutycycle of pulses
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Logic Circuits (AREA)
  • Pulse Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Manipulation Of Pulses (AREA)
CN201910039213.8A 2018-01-22 2019-01-16 发送电路以及集成电路 Active CN110071705B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-008321 2018-01-22
JP2018008321A JP7071621B2 (ja) 2018-01-22 2018-01-22 送信回路及び集積回路

Publications (2)

Publication Number Publication Date
CN110071705A CN110071705A (zh) 2019-07-30
CN110071705B true CN110071705B (zh) 2023-05-16

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CN201910039213.8A Active CN110071705B (zh) 2018-01-22 2019-01-16 发送电路以及集成电路

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US (1) US10666234B2 (https=)
EP (1) EP3518420B1 (https=)
JP (1) JP7071621B2 (https=)
CN (1) CN110071705B (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10833656B2 (en) * 2018-04-30 2020-11-10 Micron Technology, Inc. Autonomous duty cycle calibration
US11309876B2 (en) * 2019-11-18 2022-04-19 Macom Technology Solutions Holdings, Inc. Digitally programmable analog duty-cycle correction circuit
US11005464B1 (en) * 2020-03-26 2021-05-11 Taiwan Semiconductor Manufacturing Company, Ltd. Delay line circuit
US11658644B2 (en) * 2020-12-07 2023-05-23 Macom Technology Solutions Holdings, Inc. Programmable duty cycle distortion generator
US11632115B2 (en) * 2021-05-14 2023-04-18 Taiwan Semiconductor Manufacturing Company, Ltd. Clock synthesizer
IT202300007998A1 (it) * 2023-04-24 2024-10-24 St Microelectronics Int Nv Circuito di calibrazione del duty-cycle, trasmettitore, sistema di comunicazione e procedimento corrispondenti

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1988384A (zh) * 2005-12-21 2007-06-27 国际商业机器公司 用于差分计时的占空比校正电路和方法

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JPH04188931A (ja) * 1990-11-21 1992-07-07 Nec Corp ラインドライバ回路
US6445253B1 (en) * 2000-12-18 2002-09-03 Api Networks, Inc. Voltage-controlled oscillator with ac coupling to produce highly accurate duty cycle square wave output
US6507220B1 (en) * 2001-09-28 2003-01-14 Xilinx, Inc. Correction of duty-cycle distortion in communications and other circuits
JP2007006060A (ja) * 2005-06-23 2007-01-11 Sony Corp 集積回路、再生装置及び再生方法
US7310010B2 (en) * 2006-04-13 2007-12-18 Infineon Technologies Ag Duty cycle corrector
US7518425B2 (en) * 2007-02-05 2009-04-14 Promos Technologies Pte.Ltd Circuit and technique for adjusting and accurately controlling clock duty cycles in integrated circuit devices
JP5038738B2 (ja) * 2007-02-08 2012-10-03 株式会社東芝 デューティ調整回路
US8149978B2 (en) * 2007-03-12 2012-04-03 Nippon Telegraph And Telephone Corporation Clock/data recovery circuit
JP5231289B2 (ja) * 2009-03-02 2013-07-10 ルネサスエレクトロニクス株式会社 デューティ比補正回路及びデューティ比補正方法
JP2011254226A (ja) * 2010-06-01 2011-12-15 Renesas Electronics Corp パルス幅調整回路及びこれを用いたデューティ比補正回路
US8462906B1 (en) * 2011-09-15 2013-06-11 Altera Corporation Apparatus and methods for detection and correction of transmitter duty cycle distortion
US9143121B2 (en) * 2012-08-29 2015-09-22 Qualcomm Incorporated System and method of adjusting a clock signal
JP2016039626A (ja) * 2014-08-05 2016-03-22 富士通株式会社 半導体装置、電源供給制御回路及び電源供給制御方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1988384A (zh) * 2005-12-21 2007-06-27 国际商业机器公司 用于差分计时的占空比校正电路和方法

Also Published As

Publication number Publication date
JP7071621B2 (ja) 2022-05-19
EP3518420A1 (en) 2019-07-31
JP2019129350A (ja) 2019-08-01
US20190229712A1 (en) 2019-07-25
CN110071705A (zh) 2019-07-30
US10666234B2 (en) 2020-05-26
EP3518420B1 (en) 2025-10-15

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