CN110059816A - A kind of neural network element circuit based on memristor - Google Patents
A kind of neural network element circuit based on memristor Download PDFInfo
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Abstract
The invention discloses a kind of neural network element circuits based on memristor in nerual network technique field, it is intended to which it is slow to solve the existing neural network computing process speed based on hardware devices such as traditional CPU, GPU, FPGA, ASIC, the high problem of power consumption.Neural network element circuit based on memristor, including memristor processing circuit, subtraction circuit and weight computing circuit;Memristor processing circuit is weighted operation to the voltage signal that transmission is come in, and exports the voltage signal being weighted;Information word after memristor processing circuit is weighted by subtraction circuit carries out subtraction, and the effective information member of acquisition is sent into weight computing circuit;Subtraction circuit treated information word is added by weight computing circuit, and passes to next stage element circuit.For memristor device in the present invention is compared to transistor, have two simpler end structures, convenient for integrated, conversion speed faster, power consumption it is lower and can be compatible with traditional cmos device.
Description
Technical field
The invention belongs to nerual network technique fields, and in particular to a kind of neural network element circuit based on memristor.
Background technique
Memristor is a kind of non-linear two-terminal device for indicating magnetic flux and charge relationship, the dimension with resistance, but resistance value
The quantity of electric charge by flowing through it determines, therefore has the function of the quantity of electric charge that memory flows through.Memristor is as a kind of novel electronics
Device has simpler two end structure relative to traditional CMOS technology, therefore has stronger expand to a certain extent
Malleability and 3D stack ability, and high density storage can be realized using cross array structure.The small size having due to memristor
Feature so that speed of the electronics in memristor faster, have lower power consumption and can be compatible with traditional cmos device.Together
When, the distinctive resistance value abundant of memristor and nerve synapse are very much like, and synaptic plasticity refers to that the bonding strength of cynapse can be with
Different stimulations cause the Ion transfer in presynaptic membrane to postsynaptic membrane or flow back into presynaptic membrane and reinforcement gradually
Or weaken.Equally, the resistance value of memristor under extraneous stimulation also due to the migration of the orientation of inner ion under voltage and
It is gradually tuned, has greatly similitude with biology plasticity outstanding, therefore have biggish application in terms of neural network
Prospect.The feature of the cynapse similitude, non-volatile, scalability, nano-grade size and the low-power consumption that have due to memristor etc.,
Memristor is expected to become novel artificial electron's cynapse and play a role in terms of the building of bionic neural network, therefore, memristor
Device resistance is difficult to integrate into neural network because negative resistance state cannot be presented also becomes urgent problem.
Artificial neural network is to be handled using special hardware circuit neural network algorithm.Neural network at present
Hardware realization is the hardware devices such as traditional CPU, GPU, FPGA, the ASIC relied on, however, the neural network of these hardware devices
Speed is slow in calculating process, and power consumption is high, and more and more large-scale artificial neural network proposes hardware and its performance stringenter
Requirement.
Summary of the invention
The purpose of the present invention is to provide a kind of neural network element circuit based on memristor, to solve in the prior art
Neural network computing process speed based on hardware devices such as traditional CPU, GPU, FPGA, ASIC is slow, the high problem of power consumption, simultaneously
The present invention, which provides a kind of memristor, can be presented the circuit connecting mode of negative resistance state, and it is negative because that cannot present to solve memristor resistance
Resistance state and the problems in be difficult to integrate into neural network.
In order to achieve the above objectives, the technical scheme adopted by the invention is that: a kind of neural network unit based on memristor
Circuit, including memristor processing circuit, subtraction circuit and weight computing circuit;The memristor processing circuit to transmit into
The voltage signal come is weighted operation, and exports the voltage signal being weighted;The subtraction circuit handles memristor
Voltage signal after circuit is weighted carries out operation, and the effective information member of acquisition is sent into weight computing circuit;It is described
Subtraction circuit treated information word is added by weight computing circuit, and passes to next stage element circuit.
The memristor processing circuit includes multiple memristor resistance, the corresponding power of the positive resistance state and negative resistance state of memristor resistance
The positive value and negative value of value.
The electric current that voltage input end generates in the memristor processing circuit passes through connection two respectively and opposite polarity recalls
Device branch is hindered, on every road Tiao Zhi, respectively connection one is opposite polarity close to the memristor of voltage input end with this branch again
It is grounded after memristor, exports the voltage value for two memristors being connected with ground terminal.
The voltage value of the memristor processing circuit output is the voltage for weighting each resulting phase plus item.
Weight corresponding to the memristor processing circuit is (- 1,1).
The effective information member is the weight unit containing positive negative term obtained by subtracter operation.
The weight computing circuit is in-phase adder or reverse phase adder.
Compared with prior art, advantageous effects of the invention:
(1) for the memristor device in the present invention is compared to transistor, has simpler two end structure, convenient for collection
At, conversion speed faster, power consumption it is lower and can be compatible with traditional cmos device;
(2) for the memristor used in the present invention as the novel resistive device in two ends, resistance can be by the continuous of voltage
Modulation, therefore when receiving stimulation, can continuously it change with the variation resistance value of voltage, and current-responsive is by stored charge
Influence and the synaptic plasticity that shows can show to obtain different voltage values to different stimulations in this circuit;
(3) heretofore described element circuit, can be in different thorns due to internal memristor resistance value modulating action
It is modulated to different weight states under swashing, compared to traditional binary neural network, sound more abundant can be obtained
It answers, to more efficiently carry out information processing;
(4) The present invention gives the circuit connecting modes that negative resistance state can be presented in a kind of memristor, solve memristor electricity
Resistance is difficult to integrate into the problems in neural network because negative resistance state cannot be presented.
Detailed description of the invention
Fig. 1 is a kind of memristor processing electricity of neural network element circuit based on memristor provided in an embodiment of the present invention
Road schematic diagram;
Fig. 2 is a kind of subtracter signal of neural network element circuit based on memristor provided in an embodiment of the present invention
Figure;
Fig. 3 is a kind of weight computing circuit of neural network element circuit based on memristor provided in an embodiment of the present invention
Schematic diagram;
Fig. 4 is a kind of neural network element circuit schematic diagram based on memristor provided in an embodiment of the present invention;
Fig. 5 is a kind of neural network of neural network element circuit composition based on memristor provided in an embodiment of the present invention
Model schematic.
Specific embodiment
The invention will be further described below in conjunction with the accompanying drawings.Following embodiment is only used for clearly illustrating the present invention
Technical solution, and not intended to limit the protection scope of the present invention.
As shown in figure 4, the neural network element circuit based on memristor, including memristor processing circuit, subtraction circuit
And weight computing circuit;The voltage signal that memristor processing circuit comes in transmission is weighted operation, and exports by adding
The voltage signal of power;Voltage signal after memristor processing circuit is weighted by subtraction circuit carries out operation, and will obtain
The effective information member obtained is sent into weight computing circuit;Subtraction circuit treated information word is added by weight computing circuit 3, and
Pass to next stage element circuit.
As shown in Figure 1, memristor processing circuit is interconnected to constitute by a certain number of memristors, the resistance value energy of memristor
Reach the voltage signal modulation by being applied to memristor both ends.In this nerve network circuit, since weight is deposited in neural network
In both positive and negative weight, according to the principle that memristor resistance is modulated, generated in this circuit by control voltage input end
Electric current passes through two opposite polarity memristor branches of connection respectively, on every road Tiao Zhi, respectively connects one and this branch again
The opposite polarity memristor of memristor of close voltage input end is simultaneously grounded, and exports the electricity for two memristors being connected with ground terminal
Pressure value solves the problems, such as the positive and negative of weight.As shown in Figure 1, in the present embodiment, memristor M1, M5 are two and opposite polarity recall
Device is hindered, while memristor M2 is opposite with M1 polarity, memristor M4 and M5 polarity are on the contrary, memristor M3 is and the memristor of near end two
The memristor of device parallel connection, exports its both end voltage.When input is positive voltage VinWhen, M5 is low resistance state, therefore between M4 and M5
Current potential is positive potential;M1 is high-impedance state, therefore the current potential between M1 and M2 is zero potential, and output at this time is negative value.This circuit
Connection type efficiently solves memristor resistance and the problems in negative resistance state cannot be presented and be difficult to integrate into neural network.Work as beginning
When applying signal, the resistance value of memristor M1 and memristor M4 are in low resistance (Ron) state, the resistance of memristor M2 and memristor M5
Value is in high resistance (Roff) state when input stimulus signal be VinWhen, memristor processing circuit can obtain handling letter accordingly
Breath member
Vo1=+u1 (1)
Or Vo1=-u1 (2)
In formula, Vo1 is the output signal of memristor processing circuit ,+u1Indicate defeated by memristor processing circuit in actual circuit
Positive voltage signal out;-u1Indicate the positive voltage or negative voltage signal exported in actual circuit by memristor processing circuit;u1
Value by stimulus signal VinAnd the modulated resistance state of memristor determines, realizes the weighting in neural network to information word.Together
Reason, passes through the output signal V of the available memristor processing circuit of the above methodo2。
As shown in Fig. 2, subtraction circuit is located at the output end of memristor processing circuit, it is input to the memristor network port
Voltage value, that is, stimulus signal, which handles by the weighting of memristor processing circuit and is sent into subtracter, carries out operation, obtains memristor processing
The voltage value of circuit output end facilitates subsequent neural network sum operation.
By V0The signal of 1 input, amplification factor R3/R1, and with output end uoOpposite in phase, so
uo=-R3/R1×V01 (3)
In formula, uoIndicate the output signal of subtracter, V01 indicates the electric potential signal of the lower end of M3 in memristor processing circuit,
R3Indicate the feedback resistance of subtracter part, R1It indicates in input signal V0The resistance of 1 branch.
By V0The signal of 2 inputs, amplification factor areAnd with output end uoPhase is identical, so
In formula, uoIndicate the output signal of subtracter, V02 indicate the electric potential signal of the upper end of M3 in memristor processing circuit,
R4Indicate the ground resistance of non-inverting input terminal, R2It indicates in input signal V0The resistance of 2 branches, R3Indicate the anti-of subtracter part
Feed resistance, R1It indicates in input signal V0The resistance of 1 branch.
Work as R1=R2=R3=R4When,
uo=V02-V01 (5)
In formula, uoIndicate the output signal of subtracter, V01 indicates the voltage signal of the lower end of M3 in memristor processing circuit,
V02 indicate the electric potential signal of the upper end of M3 in memristor processing circuit.
As shown in figure 3, weight computing circuit is located at the next stage of subtraction circuit, for connecting different subtraction circuits
Output end exports after being added to the weighted current stimulation signal for being input to neural network.Weight computing circuit
In-phase adder or reverse phase adder can be used, the present embodiment uses in-phase adder.
For adder circuit:
It is available by " empty open circuit ":
In formula, u-Indicate that the voltage of amplifier reverse input end, R1 are the ground resistance of reverse input end, u is adder
Output signal, R3 are the feedback resistance of adder.
That is:
Equally, for u+Then have:
Arrangement obtains:
In formula, u+Indicate that the voltage of adder non-inverting input terminal, V1, V2 respectively indicate after the weighting that adder obtains not
Same voltage signal values, R2, R4 respectively indicate the resistance of input signal V1, V2 branch road.
According to " imaginary short " principle, u+=u-。
It is available:
As R1=R2=R3=R4, then
U=V1+V2 (11).
Neural network element circuit overall structure based on memristor as shown in figure 4, left end is memristor processing circuit,
It is responsible for being weighted the stimulus signal that neural network inputs operation, the voltage value of output is to weight each resulting phase plus item
Voltage.Centre is subtraction circuit, calculates the voltage difference at memristor both ends, and output result is weighted containing just
The weight unit of negative term.Right end is a weight computing circuit, is added, is had primarily with respect to weighted information
The processing to multiple signals is realized in the integration of effect.
Based on the neural network element circuit structure set forth above based on memristor, below by one 2 × 2 power
Illustrate specific working mode and the institute of the neural network element circuit based on memristor for the neural network of value matrix
The effect of acquirement.
2 × 2 weight matrixs contain 4 memristor weight circuits, and each memristor weight circuit corresponds in weight matrix
A weight, according to memory resistor characteristic, weight range corresponding to memristor weight circuit is (- 1,1).
Four stimulus signals are input to memristor processing circuit, and operation can be weighted to signal by processing, by
In the high low resistance state and directionality of memristor, two voltages can be exported at the memristor both ends of memristor processing circuit network
Value.Further it is output to the subtraction circuit of next stage.
The voltage value of 4 subtraction circuits output is uniformly connected to weight processing circuit, by 4 weighted voltages of input
The result output that signal phase adduction will add up.
Neural network element circuit of the present invention based on memristor can be real by cascade system as shown in Figure 5
The building of existing multilayer neural network model.
Memristor processing circuit can will correspond to the different weights in neural network, weight to different voltage signals
And primary unit circuit transmitting downwards;The signal of subtraction circuit output is the information word after memristor network is weighted,
And it is sent into the weight computing circuit of next stage;Weight computing circuit can information word be added by treated, is carried out effective whole
It closes, realizes the processing to multiple signals.It can be by cascading complete realization neural network to the processing function of information.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, without departing from the technical principles of the invention, several improvement and deformations can also be made, these improvement and deformations
Also it should be regarded as protection scope of the present invention.
Claims (7)
1. a kind of neural network element circuit based on memristor, characterized in that including memristor processing circuit, subtraction circuit
And weight computing circuit;
The memristor processing circuit is weighted operation to the voltage signal that transmission is come in, and exports the voltage letter being weighted
Number;
Voltage signal after memristor processing circuit is weighted by the subtraction circuit carries out operation, and having acquisition
It imitates information word and is sent into weight computing circuit;
Subtraction circuit treated information word is added by the weight computing circuit, and passes to next stage element circuit.
2. the neural network element circuit according to claim 1 based on memristor, characterized in that the memristor processing
Circuit includes multiple memristor resistance, and the positive resistance state and negative resistance state of memristor resistance correspond to the positive value and negative value of weight.
3. the neural network element circuit according to claim 2 based on memristor, characterized in that the memristor processing
The electric current that voltage input end generates in circuit passes through two opposite polarity memristor branches of connection respectively, on every road Tiao Zhi,
Respectively connection one is grounded after the opposite polarity memristor of memristor of voltage input end with this branch again, is exported and is grounded
The voltage value of two connected memristors of end.
4. the neural network element circuit according to claim 1 based on memristor, characterized in that the memristor processing
The voltage value of circuit output is the voltage for weighting each resulting phase plus item.
5. the neural network element circuit according to claim 1 based on memristor, characterized in that the memristor processing
Weight corresponding to circuit is (- 1,1).
6. the neural network element circuit according to claim 1 based on memristor, characterized in that the effective information member
For the weight unit containing positive negative term obtained by subtracter operation.
7. the neural network element circuit according to claim 1 based on memristor, characterized in that the weight operation electricity
Road is in-phase adder or reverse phase adder.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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CN110443356A (en) * | 2019-08-07 | 2019-11-12 | 南京邮电大学 | A kind of current mode neural network based on more resistance state memristors |
CN111291879A (en) * | 2020-03-29 | 2020-06-16 | 湖南大学 | Signal generating device with habituation and sensitization and adjusting method |
CN113178219A (en) * | 2021-04-08 | 2021-07-27 | 电子科技大学 | Be applied to memristor sense of image recognition field and save integrative circuit structure of calculating |
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CN106845634A (en) * | 2016-12-28 | 2017-06-13 | 华中科技大学 | A kind of neuron circuit based on memory resistor |
CN109460818A (en) * | 2018-09-25 | 2019-03-12 | 电子科技大学 | A kind of multilayer neural network design method based on memristor bridge and array |
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CN106845634A (en) * | 2016-12-28 | 2017-06-13 | 华中科技大学 | A kind of neuron circuit based on memory resistor |
CN109460818A (en) * | 2018-09-25 | 2019-03-12 | 电子科技大学 | A kind of multilayer neural network design method based on memristor bridge and array |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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CN110443356A (en) * | 2019-08-07 | 2019-11-12 | 南京邮电大学 | A kind of current mode neural network based on more resistance state memristors |
CN110443356B (en) * | 2019-08-07 | 2022-03-25 | 南京邮电大学 | Current type neural network based on multi-resistance state memristor |
CN111291879A (en) * | 2020-03-29 | 2020-06-16 | 湖南大学 | Signal generating device with habituation and sensitization and adjusting method |
CN111291879B (en) * | 2020-03-29 | 2023-08-22 | 湖南大学 | Signal generating device with habit and sensitization |
CN113178219A (en) * | 2021-04-08 | 2021-07-27 | 电子科技大学 | Be applied to memristor sense of image recognition field and save integrative circuit structure of calculating |
CN113178219B (en) * | 2021-04-08 | 2023-10-20 | 电子科技大学 | Memristor sense-memory integrated circuit structure applied to image recognition field |
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