CN113178219B - Memristor sense-memory integrated circuit structure applied to image recognition field - Google Patents
Memristor sense-memory integrated circuit structure applied to image recognition field Download PDFInfo
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Abstract
The invention belongs to the technical field of semiconductor devices and integrated circuits, provides a memristor sensing and memory integrated circuit structure applied to the field of image recognition, and aims to realize the complete process of image information sensing, memory and operation by utilizing a memristor with photoelectric characteristics and memory characteristics to carry out monolithic integration with a CMOS integrated circuit. The invention fully utilizes the photoelectric characteristic and the storage characteristic of the memristor, takes the memristor as an image information sensing device and a storage unit, combines corresponding operation circuit modules, and realizes the circuit function modules of sensing, storage and operation which are integrated on a single chip at the same time; meanwhile, the invention also combines a diode and a MOS transistor to optimize the circuit structure. In summary, the memristor sensing and memory integrated circuit structure applied to the image recognition field can be used in the application fields of image sensing, image recognition and the like, and has the characteristics of small volume, high speed, low power consumption, high integration level, low cost and strong anti-interference capability.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices and integrated circuits, in particular relates to a circuit structure for carrying out monolithic integration by utilizing a memristor with photoelectric characteristics and storage characteristics and a CMOS integrated circuit, and particularly provides a memristor sensing and storing integrated circuit structure applied to the field of image recognition.
Background
At present, the development situation of the artificial intelligence technology is very rapid, and the image recognition based on the artificial intelligence technology is also developed to a great extent. Image recognition technology refers to technology for processing, analyzing and understanding images by using a computer to recognize targets and objects in various modes, and is currently applied to various fields such as automatic driving, face recognition, digital recognition, etc.; therefore, the image recognition technology is taken as an important expandable research project, the value of the image recognition technology is reflected in various aspects, the problems of the image recognition technology in application are researched, the further development of the image recognition technology is promoted, and the image recognition technology is favorably applied to more fields.
At present, a common image recognition technology is a CMOS image sensor technology and mainly comprises a CMOS image sensor chip, an operation unit and a storage unit; the image recognition process mainly comprises three stages: image acquisition, image processing and image recognition; the image acquisition is mainly carried out by using a CMOS image sensor chip, the image processing and image recognition processes are mainly carried out by calculating and processing image information acquired by the CMOS image sensor through a computer software layer, namely an operation unit, and a storage unit is used for storing the image information between the CMOS image sensor chip and the operation unit. Although, the development of CMOS image sensor technology is mature; however, the CMOS image sensor chip, the operation unit, and the memory unit are all independent circuit blocks, and this von neumann structure will result in low operation speed, large power consumption, and low circuit integration.
Disclosure of Invention
The invention aims to provide a memristor sensing and storing integrated circuit structure applied to the field of image recognition, fully utilizes the photoelectric characteristic and the storage characteristic of a memristor, takes the memristor as an image information sensing device and a storage unit, combines corresponding operation circuit modules, and realizes the circuit function modules of simultaneously integrating sensing, storage and operation on a single chip; and, the optimization of the circuit structure is further performed by combining the diode and the MOS transistor. The memristor sensing and storing integrated circuit structure can be used in the application fields of image sensing, image recognition and the like, and has the characteristics of small volume, high speed, low power consumption, high integration level, low cost and strong anti-interference capability.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
a memristor sensing and storing integrated circuit structure applied to the field of image recognition comprises a memristor array module, an external erasing circuit module and an operation circuit module; it is characterized in that the method comprises the steps of,
the memristor array module comprises a positive weight memristor array module and a negative weight memristor array module, and the positive weight memristor array module and the negative weight memristor array module have the same structure and all comprise M multiplied by N memristors distributed in an array; in the positive-weight memristor array module, memristorsIs connected to the input row line RL m The upper and second terminals are connected to the output column line +.>Applying; in the negative weight memristor array module, memristors are +.>Is connected to the input row line RL m The upper and second terminals are connected to the output column line +.>Applying; the memristor->And memristor->Correspondingly arranged to form a group of memristors together; the input row line RL m Connected to input voltage V in,m ，n＝1,2,...,N，m＝1,2,...,M；
The external erasing circuit module is coupled to two ends of each memristor in the memristor array module;
the arithmetic circuit module includes: each operation unit consists of a first current-to-voltage circuit module, a second current-to-voltage circuit module and a subtracting circuit module; wherein, for the nth operation unit, the input end of the first current-to-voltage circuit module is connected with the output column lineThe input end of the second current-to-voltage circuit module is connected with the output column line>The outputs of the first current-to-voltage circuit module and the second current-to-voltage circuit module are respectively input into a subtracting circuit module, and the output end of the subtracting circuit module is used as the output end of the memristor inductance-storage integrated circuit structure, and N output ends are provided.
Further, the positive-weight memristor array module further includes m×n diodes distributed with the memristors, where the diodesIs connected to the memristor +>Is a first terminal, diode->The positive electrode of (a) is connected to the row line RL m Applying; the negative weight memristor array module further comprises M multiplied by N diodes which are distributed with the memristors, wherein the diodes are arranged in the same wayIs connected to the memristor +>Is a first terminal, diode->The positive electrode of (a) is connected to the row line RL m And (3) upper part.
Further, the positive-weight memristor array module further includes m×n MOS transistors distributed with the memristors, where the MOS transistorsIs connected to the source of the memristor +>Is a MOS transistor +.>Is connected to the row line RL m On, MOS transistor->Gate connection control signal +.>The negative weight memristor array module further comprises M multiplied by N MOS transistors which are distributed with the memristors, wherein the MOS transistors are +.>Is connected to the source of the memristor +>Is a MOS transistor +.>Is connected to the drain of the row line RL m On, MOS transistor->Gate connection control signal of (2)
Furthermore, the image recognition process of the memristor sense-in-sense integrated circuit structure applied to the image recognition field comprises the following steps of:
step 1, initializing a circuit structure;
setting the initial states of all memristors in the memristor array module as a high-resistance state Z, setting the number of image categories as N, and setting the size of an image to be identified as M multiplied by M;
aiming at the positive weight memristor array module, the external erasing circuit module applies preset forward voltage to the two ends of each memristor, so that each memristor is written from a high resistance state to a corresponding preset low resistance state initial value g '' m,n ：
The initial output currents of all output column lines in the positive weight memristor array block are:
similarly, the output currents of all output column lines in the negative weight memristor array module are:
the current-to-voltage circuit module in the operation circuit module respectively converts the sensing current of the positive and negative weight memristor array module into a voltage signal, and the sensing current is sequentially as follows:
and the subtraction circuit module outputs the operation result:
the output operation result is an initial operation value for the image recognition process, which is obtained after the circuit is initialized;
step 2, image information sensing;
adopting a memristor array module as an image sensor array;
aiming at the positive weight memristor array module, when image information is input, the conductance of the memristors at corresponding positions is changed into a low-resistance state sensing value g' m,n ：
The output currents of all output column lines in the positive weight memristor array module are:
similarly, the output currents of all output column lines in the negative weight memristor array module are:
the current-to-voltage circuit module in the operation circuit module respectively converts the sensing current of the positive and negative weight memristor array module into a voltage signal, and the sensing current is sequentially as follows:
and the subtraction circuit module outputs the operation result:
the output operation result is an identification operation value obtained after the circuit finishes image information sensing;
step 3, image recognition;
outputting an initial operation value obtained after the circuit is initialized and an identification operation value obtained after the image sensing is completed to a subsequent circuit, and storing and operating an operation result obtained by the subsequent circuit for two times, wherein the operation rule is as follows:
the above operation result V out1 ～V outN And the image category corresponding to the maximum value in the image is the final image recognition result.
In the memristor array module, the device parameters of all memristors are the same, the device parameters of all diodes are the same, and the device parameters of all MOS transistors are the same. In the invention, the storage rule of the weight is as follows: each memristor device may store an n-bit weight; if the weight is 0, the memristor maintains a high resistance state Z, otherwise, the memristor is in a lower resistance state g'; and the conductivity (inverse of resistance) value of the memristor is in direct proportion to the prior known weight value, the larger the weight value is, the higher the conductivity value of the memristor is, the smaller the weight value is, and the lower the conductivity value of the memristor is. In addition, as positive and negative weights exist, the positive weight memristor array module and the negative weight memristor array module are designed to jointly form an M multiplied by N group memristor group; for each group of memristor groups, when the weight is positive, the bit weight is stored in the corresponding positive weight memristor array module, the corresponding weight in the negative weight memristor array module is 0, when the weight is negative, the bit weight is stored in the corresponding negative weight memristor array module, the corresponding weight in the positive weight memristor array module is 0, and when the weight is 0, the weights of the positive and negative memristor array modules are both 0.
The invention has the beneficial effects that:
the memristor is used as a nano-sized two-end nonvolatile device, has a storage characteristic, the resistance of the memristor can be changed according to the voltage applied to two ends, and the resistance of a plurality of states is stored and corresponds to the weight of a plurality of sizes, and the characteristic provides possibility for realizing a storage function; meanwhile, the memristor also has a photoelectric effect, wherein the photoelectric effect is embodied in that the resistance value of the memristor is reduced along with illumination, and the stronger the illumination intensity is, the lower the resistance value of the memristor is, so that the photoelectric characteristic of the memristor can be used as an image sensing device, and the memristor can be used for replacing a traditional CMOS image sensor, so that the image information sensing process is realized; meanwhile, the storage characteristics of the memristors and related operation circuits are combined, so that the complete process of image information sensing, storage and operation of a single chip is realized.
Based on the above, the invention provides a memristor sense-save-all-in-one circuit structure applied to the field of image recognition, the circuit functions of image information sensing and storage are realized by utilizing the photoelectric effect and storage characteristic of the memristor, and the CMOS sense-save-all-in-one circuit array structure integrating the memristor is realized by combining the corresponding operation circuit.
Drawings
FIG. 1 is a schematic diagram of a memristor sense-computation integrated circuit structure applied to the field of image recognition in embodiment 1 of the present invention.
FIG. 2 is a schematic diagram of a memristor sense-computation integrated circuit structure applied to the field of image recognition in embodiment 2 of the present invention.
FIG. 3 is a schematic diagram of a memristor sense-computation integrated circuit structure applied to the field of image recognition in embodiment 3 of the present invention.
Fig. 4 is a schematic circuit diagram of the arithmetic circuit module according to embodiments 1 to 3 of the present invention.
FIG. 5 is a schematic diagram of the optoelectronic characteristics of a memristor.
FIG. 6 is a schematic diagram of a storage characteristic of a memristor.
FIG. 7 is a schematic diagram of the memristor of the present disclosure to implement sensing, storage, and operation functions, respectively.
FIG. 8 is a schematic diagram of a memristor cell in the memristor array block of FIG. 1.
FIG. 9 is a schematic diagram of a memristor cell in the memristor array block of FIG. 2.
FIG. 10 is a schematic diagram of a memristor cell in the memristor array block of FIG. 3.
Detailed Description
The invention will be described in further detail with reference to the drawings and examples.
The invention provides a memristor-based sensing and storing integrated circuit structure applied to the field of image recognition, which utilizes the photoelectric characteristic and the storage characteristic of a memristor to use the memristor as a photoelectric conversion sensing device and a weight storage device and then matches with a corresponding operation circuit module, thereby realizing the sensing, storage and operation of image information, and simultaneously having higher sensing speed, higher integration level, higher recognition rate and lower power consumption.
Example 1
The embodiment provides a memristor sensing and storing integrated circuit structure applied to the field of image recognition, as shown in fig. 1; the method specifically comprises the following steps: the memristor array module, the external erasing circuit module and the operation circuit module, wherein,
the memristor array module comprises two positive weight memristor array modules and negative weight memristor array modules which are completely identical in structure and are in the same position in space and have the scale of M multiplied by N, and the positive weight memristor array modules and the negative weight memristor array modules are respectively used for storing externally input positive weights and negative weights; the positive weight memristor array module comprises M×N memristors, wherein the memristorsIs connected to the input row line RL m The upper and second terminals are connected to the output column line +.>Upper input row line RL m Connected to input voltage V in,m The method comprises the steps of carrying out a first treatment on the surface of the n=1, 2, N, m=1, 2,; the negative weight memristor array module comprises M multiplied by N memristors, wherein the memristors are +.>Is connected to the input row line RL m The upper and second terminals are connected to the output column line +.>Applying; and, the memristor +.>And memristor->Correspondingly forming a group of memristors;
the external erasing circuit module is coupled to two ends of each memristor in the memristor array module, and the initial resistance of the memristor is written by applying forward voltages with different magnitudes to the two ends of the memristor, so that the initial resistance of the memristor corresponds to the positive and negative weight of the external input; after the circuit array completes image recognition, the memristor is reset by applying the same reverse voltage to the two ends of the memristor, so that the memristor is restored to a high-resistance state, which is equivalent to resetting the previous input image information, and simultaneously, all weights are set to zero;
the operation circuit module consists of two current-to-voltage circuit modules and a subtracting circuit module, as shown in fig. 4; the current-to-voltage circuit module is composed of an operational amplifier and a corresponding feedback resistor and is used for converting an electric signal into a voltage signal; the subtracting circuit module is composed of an operational amplifier and a corresponding feedback resistor, and can be used for subtracting the operation result of the current-to-voltage circuit module in the positive weight memristor array module from the operation result of the current-to-voltage circuit module in the negative weight memristor array module, wherein the operation result is an intermediate result of image recognition;
further, as shown in fig. 4, the circuit structure of the operation circuit module includes: first, second and third operational amplifiers 11, 12, 19, first, second and third feedback resistors 15, 16, 23, first and second input resistors 21, 22, anda ground resistor 20; the operational amplifier 11 and the feedback resistor 15 constitute a current-to-voltage circuit module, the operational amplifier 12 and the feedback resistor 16 constitute a current-to-voltage circuit module, and the operational amplifier 19, the input resistor 21, the input resistor 22, the feedback resistor 23, and the ground resistor 20 constitute a basic subtraction circuit module. Because the low frequency amplification factor of the operational amplifier is large, the operational amplifier can be approximately considered to have the characteristics of 'virtual short', 'virtual break', i.e. the voltages at the inverting input terminals of the operational amplifiers 11 and 12 are also approximately GND; at this time, the output voltage 17 of the operational amplifier 11 is V p ：
|V p |＝Ip·R 15
Similarly, the output voltage 18 of the operational amplifier 12 is V n ：
|V n |＝In·R 16
While the subtracting circuit module outputs the output voltage V of the positive matrix module p And output voltage V of negative matrix module n Subtracting to obtain output voltage:
|V out |＝V p -V n
the obtained operation output voltage 24 is V out The output voltage 24 is the intermediate result of the whole circuit structure for identifying the image information.
Further, as shown in fig. 8, the memristor unit structure in the memristor array module mainly comprises a memristor 5, an external erasing circuit module 1, a row line 6 and a column line 7, wherein the external erasing circuit module 1 comprises a first conduction switch 3 and a second conduction switch 4 of the erasing voltage signal generating circuit module 2; the initial value writing flow of the memristor 5 is as follows: when the memristor 5 is required to be programmed, the external erasing circuit module 1 only selects the memristor 5, and other memristors connected with the row line 6 and the column line 7 are not selected, at the moment, the on switches 3 and 4 are opened, the voltage signal generating circuit module 2 generates a forward voltage with a duration of microsecond magnitude and a certain magnitude to act on two ends of the memristor, at the moment, the memristor is programmed to a low resistance state, and the resistance value is changed from MΩ to kΩ magnitude and is equivalent to a common resistance; after programming operation is completed, the voltage signal generating circuit module 2 does not output programming voltage signals any more, the on switches 3 and 4 are disconnected, and initial memristor programming work is completed.
In terms of working principle:
the photoelectric characteristics of the memristor are shown in fig. 5, which shows the relationship between illumination intensity and conductance of the photoelectric effect of the memristor; as can be seen from the graph, the initial state of the memristor is the high-resistance state Z, and the magnitude of the conductance value of the memristor increases with the increase of the illumination intensity; when the external illumination intensity is L 0 When the memristor has a conductance value of g'; when the external illumination intensity rises to L 1 When the conductance value of the memristor rises to g'; the relationship of illumination intensity to conductance magnitude of the memristor's photoelectric effect is approximately a linear relationship.
The storage characteristics of the memristor are shown in fig. 6, which shows a waveform diagram of voltages at two ends of the memristor and conductance values of the memristor when the memristor is written and erased; as can be seen, the initial state of the memristor is the high-resistance state Z, and the conductance value is about 0; when a forward voltage Vpe is applied across the memristor, the memristor is programmed to a lower resistance state, the conductance value rises to g', the magnitude of the conductance value of the memristor is related to the duration of the forward voltage, and the longer the duration of the forward voltage, the more (g ") the conductance value rises; when the memristor conductance value needs to be erased, only one reverse voltage with longer duration is needed to be applied to the two ends of the memristor, namely the memristor returns to the low-resistance state Z.
Based on the photoelectric characteristic and the storage characteristic of the memristor, the principle of the memristor unit designed by the invention to respectively realize the functions of a sensing circuit, a storage circuit and an operation circuit is schematically shown in fig. 7; as can be seen, the initial state of the memristor is the high-resistance state Z, and the conductance value is about 0; when the memristor is written, a forward voltage Vpe is applied to two ends of the memristor, so that the memristor is written to a certain lower resistance state g', namely, an initial weight is stored by the memristor; then, the memristor is exposed for a certain time, so that the memristor senses the external illumination intensity information, and the conductance value of the memristor rises to g', namely, sensing is realized; then a certain voltage Vin is input at two ends of the memristor, so that the memristor can be connectedThe corresponding input voltage operation obtains the current I flowing through the memristor RRAM And I RRAM The magnitude of (2) is in direct proportion to the magnitude of the conductance value G, namely, the operation is realized; output current I obtained by memristor unit RRAM And sending the result to a subsequent circuit for further operation.
In the invention, the storage rule of the weight is as follows: each memristor device may store an n-bit weight; if the weight is 0, the memristor maintains a high resistance state Z, otherwise, the memristor is in a lower resistance state g'; and the conductivity (inverse of resistance) value of the memristor is in direct proportion to the prior known weight value, the larger the weight value is, the higher the conductivity value of the memristor is, the smaller the weight value is, and the lower the conductivity value of the memristor is. In addition, as positive and negative weights exist, the positive weight memristor array module and the negative weight memristor array module are designed to jointly form an M multiplied by N group memristor group; for each group of memristor groups, when the weight is positive, the bit weight is stored in the corresponding positive weight memristor array module, the corresponding weight in the negative weight memristor array module is 0, when the weight is negative, the bit weight is stored in the corresponding negative weight memristor array module, the corresponding weight in the positive weight memristor array module is 0, and when the weight is 0, the weights of the positive and negative memristor array modules are both 0.
Furthermore, the specific working principle of the memristor sensing and storing integrated circuit structure applied to the image recognition field in the embodiment is as follows:
firstly, writing an initial weight into each memristor in a positive weight memristor array module and a negative weight memristor array module by an external erasing circuit module; taking a positive matrix module as an example, the writing process is as follows: all default states of the memristor array are high-resistance states Z, and the memristor is written from the high-resistance states to different low-resistance state initial values g 'by applying forward voltages with different magnitudes to two ends of the memristor' m,n The writing of the initial weight is completed, and the initial weight (conductance) of M multiplied by N memristors in the positive weight memristor array module is expressed as a matrix:
in the positive weight memristor array module, due to the input row line RL m Connected to input voltage V in,m At this time, output the column lineThe output of (2) is flow through memristor +.>The initial current of the positive weighted memristor array module is represented by a matrix as:
and similarly, the initial current of the negative-weight memristor array module is expressed as a matrix:
and the current-to-voltage circuit module in the operation circuit module respectively converts the sensing current of the positive and negative weight memristor array module into a voltage signal, and the sensing current is sequentially as follows:
and subtracting the latter by a subtracting circuit module to obtain an initial operation value result of image recognition:
then, using the photoelectric effect of the memristor as an image sensor device for sensing external light intensity information and converting the external light intensity information into corresponding conductivity values; when image information is input from the outside, the illumination intensity sensed by each memristor is different, so that the conductivity value of each memristor is different, and finally, the sensing weight (conductivity) of M multiplied by N memristors in the positive weight memristor array module at the moment is expressed as follows by a matrix:
and then the sensing current of the positive weight memristor array module after sensing the external light intensity information is obtained as follows:
the representation of the negative weight memristor array module after the sensing of the external light intensity information is obtained by the same method is as follows:
the current-to-voltage circuit module in the operation circuit module respectively converts the sensing current of the positive and negative weight memristor array module into a voltage signal, and the sensing current is sequentially as follows:
and the subtraction circuit module outputs the operation result, and the operation value result after the image information is sensed is obtained as follows:
outputting an initial operation value obtained after the circuit is initialized and an identification operation value obtained after the image sensing is completed to a subsequent circuit, and respectively storing and performing subsequent operation on operation results obtained by the subsequent circuit for two times, wherein the operation rules are as follows:
the V is out1 ～V outN And the image category corresponding to the maximum value in the image is the final image recognition result.
Since there are both positive and negative matrix modules, the weight storage rule according to claim 3: if the initial weight input from the outside is positive, the bit weight is stored in the corresponding positive weight memristor array module, and the corresponding weight in the negative weight memristor array module is 0, i.e. the memristor resistance at the corresponding position in the positive weight module is written into the low resistance state g at this time 0 The memristor resistance value at the corresponding position in the negative weight module keeps a high resistance state Z; similarly, if the initial weight input from the outside is negative, the bit weight is stored in the corresponding negative weight memristor array module, and the corresponding weight in the positive weight memristor array module is 0, i.e. the memristor resistance at the corresponding position in the negative weight module is written into the low resistance state g 0 And the memristor resistance value at the corresponding position in the positive weight module keeps a high resistance state Z.
Example 2
The embodiment provides a memristor sensing and storing integrated circuit structure applied to the field of image recognition, as shown in fig. 2; as an improvement of the circuit structure shown in fig. 1, compared with the circuit structure in embodiment 1, on the basis of each memristor unit structure, a diode is connected in series, namely, the cathode of the diode is connected with the first end of the memristor, and the anode of the diode is connected with a row line RL; the memristor cell structure is shown in fig. 9.
Because the circuit structure in embodiment 1 has the problem of crosstalk between lines, when the memristors are in a low-resistance state, a voltage signal on one row line RL is transferred to the connected column lines CL through the memristors, and when the memristors connected to the same column line CL have a plurality of low-resistance states, the voltage on the same column line CL is affected by the plurality of row lines RL, so that the circuit precision is affected, and even a functional error occurs in which current flows back from the column line CL to the row line RL; therefore, the unidirectional conductivity of the diodes connected in series is utilized to ensure that the phenomenon of current backflow does not occur, thereby improving the performance and accuracy of the circuit; the specific operation principle of the circuit is the same as in embodiment 1.
Example 3
The embodiment provides a memristor sensing and storing integrated circuit structure applied to the field of image recognition, as shown in fig. 3; as an improvement of the circuit structure shown in fig. 1, compared with the circuit structure in embodiment 1, on the basis of each memristor unit structure, a MOS transistor is connected in series, namely, the source electrode of the MOS transistor is connected to the first end of the memristor, the drain electrode of the MOS transistor is connected to the row line RL, and the gate electrode of the MOS transistor is connected to a control signal; the memristor cell structure is shown in fig. 10.
In the circuit structure, when the control signal of the MOS transistor is at a high level, the MOS transistor is opened, and the memristor works normally; when the control signal of the MOS transistor is at a low level, the MOS transistor is turned off, so that the error influence caused by crosstalk between wires can be reduced, and current backflow can be avoided. Furthermore, when the external erasing circuit module writes the initial weight into the positive and negative weight memristor array module, the initial state of the memristor array is all in a high resistance state Z, and the control signals of the MOS transistors are all set to be in a high level, so that all the MOS transistors are turned on, and then writing is performed; the specific operation principle of the circuit is the same as in embodiment 1.
While the invention has been described in terms of specific embodiments, any feature disclosed in this specification may be replaced by alternative features serving the equivalent or similar purpose, unless expressly stated otherwise; all of the features disclosed, or all of the steps in a method or process, except for mutually exclusive features and/or steps, may be combined in any manner.
Claims (3)
1. A memristor sensing and storing integrated circuit structure applied to the field of image recognition comprises a memristor array module, an external erasing circuit module and an operation circuit module; it is characterized in that the method comprises the steps of,
the memristor array module comprises a positive weight memristor array module and a negative weight memristor array module,the positive weight memristor array module and the negative weight memristor array module have the same structure and all comprise M multiplied by N memristors distributed in an array; in the positive-weight memristor array module, memristorsIs connected to the input row line RL m The upper and second terminals are connected to the output column line +.>Applying; in the negative weight memristor array module, memristors are +.>Is connected to the input row line RL m The upper and second terminals are connected to the output column line +.>Applying; the memristor->And memristor->Correspondingly arranged to form a group of memristors together; the input row line RL m Connected to input voltage V in,m ，n＝1,2,...,N，m＝1,2,...,M；
The external erasing circuit module is coupled to two ends of each memristor in the memristor array module;
the arithmetic circuit module includes: each operation unit consists of a first current-to-voltage circuit module, a second current-to-voltage circuit module and a subtracting circuit module; wherein, for the nth operation unit, the input end of the first current-to-voltage circuit module is connected with the output column lineThe input end of the second current-to-voltage circuit module is connected with the output column lineThe output ends of the subtracting circuit module are used as the output ends of a memristor sense-memory integrated circuit structure, and N output ends are provided;
the image recognition process of the memristor sensing and storing integrated circuit structure applied to the image recognition field comprises the following steps of:
step 1, initializing a circuit structure;
setting the initial states of all memristors in the memristor array module as a high-resistance state Z, setting the number of image categories as N, and setting the size of an image to be identified as M multiplied by M;
aiming at the positive weight memristor array module, the external erasing circuit module applies preset forward voltage to the two ends of each memristor, so that each memristor is written from a high resistance state to a corresponding preset low resistance state initial value g '' m,n ：
The initial output currents of all output column lines in the positive weight memristor array block are:
similarly, the output currents of all output column lines in the negative weight memristor array module are:
the current-to-voltage circuit module in the operation circuit module respectively converts the sensing current of the positive and negative weight memristor array module into a voltage signal, and the sensing current is sequentially as follows:
and the subtraction circuit module outputs the initial operation value after the circuit initialization:
step 2, image information sensing;
adopting a memristor array module as an image sensor array;
aiming at the positive weight memristor array module, when image information is input, the conductance of the memristors at corresponding positions is changed into a low-resistance state sensing value g' m ′ ,n ：
The output currents of all output column lines in the positive weight memristor array module are:
similarly, the output currents of all output column lines in the negative weight memristor array module are:
the current-to-voltage circuit module in the operation circuit module respectively converts the sensing current of the positive and negative weight memristor array module into a voltage signal, and the sensing current is sequentially as follows:
and the subtraction circuit module output circuit finishes the recognition operation value obtained after the image information is sensed:
step 3, image recognition;
outputting the initial operation value and the identification operation value to a subsequent circuit for storage and operation, wherein the operation rules are as follows:
wherein V is out1 ～V outN And the image category corresponding to the maximum value in the image is the final image recognition result.
2. The memristor sense-in-sense integrated circuit structure applied to the image recognition field as set forth in claim 1, wherein the positive-weight memristor array module further comprises m×n diodes distributed with memristors, wherein the diodesIs connected to the memristor +>Is a first terminal, diode->The positive electrode of (a) is connected to the row line RL m Applying; the negative weight memristor array module further comprises M multiplied by N diodes which are distributed with the memristors, wherein the diodes are +.>Is connected to the memristor +>Is a first terminal, diode->The positive electrode of (a) is connected to the row line RL m And (3) upper part.
3. The memristor sense-in-sense integrated circuit structure applied to the image recognition field as set forth in claim 1, wherein the positive-weight memristor array module further comprises m×n MOS transistors distributed with the memristors, wherein the MOS transistorsIs connected to the source of the memristor +>Is a MOS transistor +.>Is connected to the row line RL m On, MOS transistor->Gate connection control signal +.>The negative weight memristor array module further comprises M multiplied by N MOS transistors which are distributed with the memristors, wherein the MOS transistors are +.>Is connected to the source of the memristor +>Is a MOS transistorIs connected to the drain of the row line RL m On, MOS transistor->Gate connection control signal +.>
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