CN110071721A - A kind of analog-digital converter - Google Patents
A kind of analog-digital converter Download PDFInfo
- Publication number
- CN110071721A CN110071721A CN201910322520.7A CN201910322520A CN110071721A CN 110071721 A CN110071721 A CN 110071721A CN 201910322520 A CN201910322520 A CN 201910322520A CN 110071721 A CN110071721 A CN 110071721A
- Authority
- CN
- China
- Prior art keywords
- analog
- comparator
- digital converter
- amplifier
- memristor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
The invention discloses a kind of analog-digital converters of analog/digital conversion technical field, it is intended to solve Hopfeild network weight in the prior art and realize the technical problems such as difficult, oversized, weight fixation can not change.A kind of analog-digital converter, including memristor array A ~ D, comparator A ~ D, amplifier A ~ D, the memristor array A ~ D are for determining neuron/analog signal weight；Memristor array A ~ D analog signal exported is converted to digital signal by the comparator A ~ D；Amplifier A ~ the D amplifies comparator A ~ D digital signal exported.A kind of analog-digital converter provided by the invention can according to need the conductance by changing memristor to change the weight of memristor array, and the change of weight is easier to realize；The abundant resistance state of memristor can provide conductance resistance state more abundant for neural network；Conversion accuracy is higher, and volume is smaller.
Description
Technical field
The invention belongs to analog/digital conversion technical fields, and in particular to a kind of analog-digital converter.
Background technique
Hopfield network can convert analog signals into digital form, realize associative memory, signal estimation and combination
It optimizes, the method for realizing the first pole signal processing similar to human retina.Simple analog-digital converter is by some single layer minds
It is formed through member, receives analog signal input, and generate digital signal output；Such neuron constitute it is a kind of adaptively and
The processing network of distributivity.These neurons are made of voltage comparator and feedback resistance, and voltage comparator drives analog-converted
Device or follower, feedback resistance all connect the simulation output in inverter or follower and between comparators.With reference to and simulation it is defeated
Enter voltage driving neural network, comparator of the numeral output in network.Hopfield network has learning ability, passes through
It is (anti-using optional comparator-inverter/comparator-follower scheme, conductance node layout scheme between input comparator
Feed the inverse of resistance) and position sequentially read device, thus using different adaptive learning rules.But mould in the prior art
There are Hopfeild network weights to realize the problems such as difficult, oversized, weight fixation can not change for number converter.
Memristor, full name memory resistor (Memristor).It is the circuit devcie for indicating magnetic flux and charge relationship.Memristor
Device have resistance dimension, but with resistance unlike, the resistance value of memristor is determined by the charge for flowing through it.Therefore, pass through survey
Determine the resistance value of memristor, can know the quantity of electric charge for flowing through it, to play the role of remembering charge.Depositing at random based on memristor
Integrated level, power consumption, the read or write speed of reservoir will be more superior than traditional random access memory.In addition, memristor is that hardware is real now
The best way of existing artificial neural network cynapse.Due to the nonlinear wind vibration of memristor, chaos circuit can produce, thus
Also there are many applications in secret communication.
The electric conductivity value consecutive variations of memristor, and resistance state is abundant, resistance can change according to device memristor changes of function.
Compared to the implementation of existing Hopfeild neural network, the analog-digital converter based on memristor Hopfeild neural network
Have the function of can be realized abundant weight, additionally have nano-grade size, structure is simple, can by crossbar array with
And 3D is stacked and is realized high integration.
Summary of the invention
The purpose of the present invention is to provide a kind of analog-digital converters, real to solve Hopfeild network weight in the prior art
The problems such as existing difficult, oversized, weight fixation can not change.
In order to achieve the above objectives, the technical scheme adopted by the invention is that: a kind of analog-digital converter, including memristor array
A~D, comparator A~D, amplifier A~D, the memristor array A~D are used for fixed weight；Comparator A~the D will recall
The analog signal of resistance device array A~D output is converted to digital signal；The number that the amplifier A~D exports comparator A~D
Signal amplifies.
Memristor array A~D row-column configuration having the same.
The weight of the comparator A~D is determined that the formula embodied is by the weight of memristor array
Ii=2iM-22i-1, i=1,2,3,4
Wherein, IiFor the current value size for flowing through i-th of signal input part, M is the peak value of input signal.
Amplifier A~D amplification factor having the same.
The output end of the memristor array A~D is all connected to the positive input of corresponding comparator A~D.
The output end of the comparator A~D is connected respectively to the reverse input end of corresponding amplifier A~D.
The output end order of the amplifier A~D is identical as the output end order of corresponding memristor array A~D.
The output port sequence of the comparator A~D is identical as the output end order of corresponding memristor array A~D.
The level that the output end of the amplifier A~D is exported, for judgment criteria, is considered binary system greater than zero with positive and negative
Number 1 is considered binary number 0 less than zero.
Comparator A~the D and amplifier A~D uses identical operational amplifier chip.
Compared with prior art, advantageous effects of the invention:
(1) a kind of analog-digital converter provided by the invention, which can according to need, is recalled by the conductance for changing memristor to change
The weight of device array is hindered, weight is easier to realize compared with prior art；
(2) compared with prior art, the abundant resistance state of memristor can be nerve to a kind of analog-digital converter provided by the invention
Network provides conductance resistance state more abundant；
(3) a kind of analog-digital converter provided by the invention conversion accuracy compared with existing electric resistance array is higher, and volume is more
It is small.
Detailed description of the invention
Fig. 1 is a kind of analog-digital converter structure schematic diagram provided in an embodiment of the present invention；
Fig. 2 is a kind of memristor array structure schematic diagram of analog-digital converter provided in an embodiment of the present invention；
Fig. 3 is a kind of comparator configuration schematic diagram of analog-digital converter provided in an embodiment of the present invention；
Fig. 4 is a kind of amplifier architecture schematic diagram of analog-digital converter provided in an embodiment of the present invention.
Specific embodiment
The invention will be further described below in conjunction with the accompanying drawings.Following embodiment is only used for clearly illustrating the present invention
Technical solution, and not intended to limit the protection scope of the present invention.
As shown in Figure 1, the present invention includes three parts, respectively memristor array A~D, comparator A~D, amplifier A~
D.Memristor array A~D is successively connect with comparator A~D, and comparator A~D is successively connect with amplifier A~D.
As shown in Fig. 2, each memristor array structure is identical, ranks distribution mode having the same, memristor array is used
In fixed weight, the electric conductivity value of each memristor infall is determined by the weight of corresponding memristor, and conductance illustrates each mind
Through strong weight.The setting needs combination of the weight of each intersection memristor, which can be fixed on resistance state and line, in memristor array instructs
Practice result to comprehensively consider.Each of memristor array A~D contains 5 memristor units.As shown in Figure 2 and Figure 3, memristor array
In one end of each memristor unit connect together and link together with corresponding comparator, i.e. memristor array A~D's
Output end vo ut1~4 are connect with positive input Vin1~4 of comparator respectively.Changed by changing the conductance of memristor
The weight of memristor array, to change the conductance of respective comparator over the ground.
As shown in Figure 3, Figure 4, the number of comparator is equal with the number of the number of memristor array and amplifier, each to compare
Model compared with electronic component, operational amplifier at the circuit structure of device, same position is identical.The output of comparator A~D
End Vout5~8 are connected respectively to inverting input terminal Vin5~8 of corresponding amplifier A~D；The negative input end of comparator is grounded；Porcelain
The capacitance of chip capacitor C1, C2, C3, C4 are 10nf.Comparator is for constituting based on memristor Hopfeild neural network
Numeral output.The weight of comparator A~D is determined that the formula embodied is by the weight of memristor array
Ii=2iM-22i-1, i=1,2,3,4
Wherein, IiFor the current value size for flowing through i-th of signal input part, M is the peak value of input signal.Certain moment compares
The voltage that device is compared is the weight of reference voltage shared by the analog signal inputted and corresponding memristor array.Comparator A
The circuit diagram of~D is as shown in Figure 3.
As shown in figure 4, in the circuit of amplifier A~D the resistance value of resistance R1, R3, R5, R7 it is equal be 1k Ω, resistance R2,
The equal resistance value of R4, R6, R8 is 10k Ω, and the amplification factor of each amplifier is consistent, the output port sequence of amplifier with than
Compared with the output port sequence of device, the output sequence of memristor array is consistent, the output result of amplifier is analog-to-digital conversion
The final result of device output.
As a further optimization solution of the present invention, the comparator A~D, amplifier A~D are all made of OP07 operation and put
Big device chip.
Below with reference to concrete application, workflow of the invention is explained:
One has 4 memristor arrays, and the Hopfeild neural network of 4 output units is as shown in Fig. 2, each memristor
Resistance value of the device after training is as shown in table 1, meets the resistance value condition as Hopfeild neural network analog-digital converter.
Memristor resistance value table after the training of table 1
When analog signal is input in memristor array, analog signal will be successively by the weight of each memristor array
The component of identified reference voltage is compared, in view of the circuit input-output characteristic of comparator in the present invention, when simulation is believed
Comparator will export a minus level signal when number being greater than reference voltage component, this level signal will be by
It is input to the reverse input end of the reversed proportional amplifier of rear class, after amplification factor is ten times of reversed proportional amplifier,
This level will answer the size of analog input signal with positive logical inverse, that is to say, that when analog signal is greater than reference voltage
Component, corresponding amplifier out will export one be greater than zero level.When analog signal is less than point of reference voltage
Amount, corresponding amplifier out will export a minus level.In the present invention, power determined by memristor array
Value is once to increase from A to D, therefore analog signal will successively the reference voltage component increasing with amplitude be compared
Compared with.The level that amplifier A~D is exported is converted into binary coding with zero for boundary, is as based on memristor Hopfield
The digital output results of the analog-digital converter of neural network.Table 2 is the input analog signal and output number of this analog-digital converter
The correspondence table of word signal.
The corresponding table of table 2 input analog signal and output digit signals
| Input voltage (V) | Export binary code |
| 0~0.2855 | 0 |
| 0.2855~0.4003 | 1000 |
| 0.4003~0.571 | 1100 |
| 0.571~1 | 1110 |
| ≥1 | 1111 |
The function of the correlation module and its realization that are related in the present invention be improved hardware and its device of composition,
Conventional in the prior art computer software programs or related agreement are carried on device or system to achieve that, are not to existing
Computer software programs or related agreement in technology improve.For example, improved computer hardware system still can be with
The specific function of the hardware system is realized by loading existing operation system of software.It is understood, therefore, that of the invention
Innovation be improvement to hardware module in the prior art and its connection syntagmatic, rather than be only to hardware module
In for the improvement of realizing the software carried in relation to function or agreement.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, without departing from the technical principles of the invention, several improvement and deformations can also be made, these improvement and deformations
Also it should be regarded as protection scope of the present invention.
Claims (10)
1. a kind of analog-digital converter, characterized in that including memristor array A ~ D, comparator A ~ D, amplifier A ~ D,
The memristor array A ~ D is used for fixed weight；
Memristor array A ~ D analog signal exported is converted to digital signal by the comparator A ~ D；
Amplifier A ~ the D amplifies comparator A ~ D digital signal exported.
2. analog-digital converter according to claim 1, characterized in that memristor array A ~ D ranks having the same
Structure.
3. analog-digital converter according to claim 1, characterized in that the weight of the comparator A ~ D is by memristor array
Weight determine that the formula embodied is
Wherein,To flow throughThe current value size of a signal input part,For the peak value of input signal.
4. analog-digital converter according to claim 1, characterized in that amplifier A ~ D amplification factor having the same.
5. analog-digital converter according to claim 1, characterized in that the output end of the memristor array A ~ D is all connected with
To the positive input of corresponding comparator A ~ D.
6. analog-digital converter according to claim 1, characterized in that the output end of the comparator A ~ D is connected respectively to
The reverse input end of corresponding amplifier A ~ D.
7. analog-digital converter according to claim 1, characterized in that the output end order of the amplifier A ~ D with it is corresponding
Memristor array A ~ D output end order it is identical.
8. analog-digital converter according to claim 1, characterized in that the output port of comparator A ~ D sequence with it is right
The output end order of the memristor array A ~ D answered is identical.
9. analog-digital converter according to claim 1, characterized in that the electricity that the output end of the amplifier A ~ D is exported
It puts down with positive and negative as judgment criteria, binary number 1 is considered greater than zero, binary number 0 is considered less than zero.
10. analog-digital converter according to claim 1, characterized in that the comparator A ~ D and amplifier A ~ D uses phase
Same operational amplifier chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910322520.7A CN110071721A (en) | 2019-04-22 | 2019-04-22 | A kind of analog-digital converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910322520.7A CN110071721A (en) | 2019-04-22 | 2019-04-22 | A kind of analog-digital converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110071721A true CN110071721A (en) | 2019-07-30 |
Family
ID=67368297
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910322520.7A Withdrawn CN110071721A (en) | 2019-04-22 | 2019-04-22 | A kind of analog-digital converter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110071721A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112511166A (en) * | 2020-11-27 | 2021-03-16 | 西安交通大学 | High-precision rapid ADC (analog-to-digital converter) based on memristor neural network and analog-to-digital conversion method |
| CN113541691A (en) * | 2021-08-13 | 2021-10-22 | 西南交通大学 | Parallel transfer analog-to-digital converter and method based on threshold voltage type memristor array |
-
2019
- 2019-04-22 CN CN201910322520.7A patent/CN110071721A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112511166A (en) * | 2020-11-27 | 2021-03-16 | 西安交通大学 | High-precision rapid ADC (analog-to-digital converter) based on memristor neural network and analog-to-digital conversion method |
| CN112511166B (en) * | 2020-11-27 | 2022-12-09 | 西安交通大学 | High-precision rapid ADC (analog-to-digital converter) based on memristor neural network and analog-to-digital conversion method |
| CN113541691A (en) * | 2021-08-13 | 2021-10-22 | 西南交通大学 | Parallel transfer analog-to-digital converter and method based on threshold voltage type memristor array |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110209375B (en) | Multiply-accumulate circuit based on radix-4 coding and differential weight storage | |
| CN105160401A (en) | WTA neural network based on memristor array and application thereof | |
| CN110071721A (en) | A kind of analog-digital converter | |
| CN110378475A (en) | A kind of neuromorphic counting circuit based on multi-bit parallel binary system cynapse array | |
| CN113157034B (en) | High-linearity nerve form calculation circuit realized by passive voltage stabilizing circuit | |
| CN111144558A (en) | Multi-bit convolution operation module based on time-variable current integration and charge sharing | |
| Verleysen et al. | An analog VLSI implementation of Hopfield's neural network | |
| CN113949385B (en) | Analog-to-digital conversion circuit for RRAM (resistive random access memory) storage and calculation integrated chip complement quantization | |
| CN110059816B (en) | Memristor-based neural network unit circuit | |
| CN115630693A (en) | Memristor self-learning circuit based on Elman neural network learning algorithm | |
| CN101978604B (en) | Flash analog-to-digital converter | |
| CN110428049A (en) | A kind of voltage-type neural network and its operating method based on polymorphic memristor | |
| CN110163364B (en) | Neural network unit circuit based on memristor bridge synapse | |
| CN111611529A (en) | Current integration and charge sharing multi-bit convolution operation module with variable capacitance capacity | |
| CN116468090A (en) | Hardware convolutional neural network model based on memristor realization | |
| CN111639757A (en) | Simulation convolution neural network based on flexible material | |
| CN114861902A (en) | Processing unit, operation method thereof and computing chip | |
| CN109255437B (en) | A kind of memristor nerve network circuit of flexibly configurable | |
| Li et al. | A compact and accelerated spike-based neuromorphic VLSI chip for pattern recognition | |
| Chen et al. | CMOS PWM VLSI implementation of neural network | |
| Leong et al. | A VLSI neural network for morphology classification | |
| Park et al. | Neurons With Captive Synaptic Devices for Temperature Robust Spiking Neural Networks | |
| Kier et al. | An MDAC synapse for analog neural networks | |
| WO2023160735A2 (en) | Operation method and operation unit | |
| Ge et al. | A mixed-signal charge-mode synapse circuit with good linearity and low power consumption |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20190730 |
|
| WW01 | Invention patent application withdrawn after publication |