CN109255437B - A kind of memristor nerve network circuit of flexibly configurable - Google Patents
A kind of memristor nerve network circuit of flexibly configurable Download PDFInfo
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Abstract
The invention proposes a kind of memristor nerve network circuits of flexibly configurable, to solve the problem of that input port extra in existing neural network influences the accuracy and increase additional energy of neural network output result.The present invention includes control circuit, signal input circuit and nerve network circuit, the input terminal of control circuit is connected with input control signal, the input terminal of signal input circuit is connected with input signal, the output end of control circuit is connected with signal input circuit, the output end of signal input circuit is connected with nerve network circuit, nerve network circuit includes memristor element, the output end output result signal of nerve network circuit.The control signal change that the present invention can be exported according to control circuit participates in the cynapse quantity in work, has saved energy consumption；The memristor nerve network circuit of flexibly configurable is run with different scales, is effectively prevented from output result and mistake occurs.
Description
Technical field
The invention belongs to the memristor neural network electricity of the technical field of digital-to-analog circuit more particularly to a kind of flexibly configurable
Road.
Background technique
HP Lab, the U.S. in 2008 delivers in the material object for carrying out producing memristor when minimal type Experiment of Electrical Circuits, achievement
On " nature " magazine.The most prominent feature of memristor is its natural nonvolatile memory function and good switching characteristic,
Non-volatile memory technologies, restructural signal processing circuit, artificial neural network, secret communication, analog circuit, artificial intelligence
The fields such as computer, biobehavioral simulation have huge application potential.
The research work of artificial neural network is several times risen and fallen since earlier 1900s.In the 1980s, backpropagation
Algorithm be used to train multilayer perceptron, and neural network is made to radiate vigour again.The it is proposed of deep learning concept in 2006 is mind
New upsurge has been pushed in research through network to.2016, world-renowned enclose is defeated by the AlphaGo program that Google develops
Chess player Li Shishi.
Up to the present, artificial neural network depends on software realization.But needed for the neural network of software realization
The calculation amount wanted is very huge, and energy consumption is also very high.Due to memristor resistance value changeability and non-volatile be very similar to nerve
The characteristic of cynapse in network, and memristor can integrated level it is very high, the speed of service is also very fast, so with the mode of hardware
Realize that the artificial neural network of electronic type becomes a new hot spot of current research.
Many scholars propose a variety of different memristor arrays to realize the artificial neural network based on memristor, but these
All input ports of network are all placed in signal reception state simultaneously in work.Therefore, when change is not added using same
The network of sample may be because of receiving come the input port that when realizing small-scale neural network function relatively, temporarily takes less than
Some unexpected interference signals, to influence the accuracy of neural network output result.In addition, though certain input ports are temporary
It takes less than, but the electronic synapse actually in network is still within power consumption state, increases some additional energy consumptions in this way.And this
The memristor neural network of the disclosed flexibly configurable of invention solves these limitations.
Summary of the invention
The accuracy of neural network output result is influenced for input port extra in existing neural network, and increases volume
The technical issues of outer energy consumption, the present invention propose a kind of memristor nerve network circuit of flexibly configurable, can be configured flexibly ginseng
With to the cynapse quantity in work.
In order to achieve the above object, the technical scheme of the present invention is realized as follows: a kind of memristor mind of flexibly configurable
Through lattice network, including control circuit, signal input circuit and nerve network circuit, the input terminal and input control of control circuit
Signal is connected, and the input terminal of signal input circuit is connected with input signal, output end and signal the input electricity of control circuit
Road is connected, and the output end of signal input circuit is connected with nerve network circuit, and nerve network circuit includes memristor element, mind
Output end output result signal through lattice network.
The signal input circuit includes three input terminals, three output ends and three control terminals, signal input circuit
Three input terminals receive three input signals respectively；The nerve network circuit includes three input terminals and an output end, mind
Three input terminals through lattice network connect one to one with three output ends of signal input circuit respectively, nerve network circuit
Output end output activation voltage；The control circuit includes two input terminals and three output control terminals, two input terminals point
Not Jie Shou two input control signals, three output control terminals respectively with three control terminals of signal input circuit correspond connect
It connects.
The signal input circuit includes metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3, metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3's
Drain electrode is separately connected three input signals, metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3Source electrode respectively with nerve network circuit three
A input terminal connects one to one, metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3Grid and control circuit three output control terminals
It is connected.
The nerve network circuit includes weighted sum circuit, phase inverter and operational amplifier OP3, input control signal with
Weighted sum circuit is connected, and weighted sum circuit is connected with phase inverter, phase inverter and operational amplifier OP3It is connected, transports
Calculate amplifier OP3Output result signal；Weighted sum circuit includes memristor element.
The memristor element includes memristor M1, memristor M2With memristor M3, weighted sum circuit further includes resistance R1It is put with operation
Big device OP1, memristor M1, memristor M2With memristor M3The pole MINUS respectively with the metal-oxide-semiconductor F of signal input circuit1, metal-oxide-semiconductor F2And MOS
Pipe F3Source electrode connect one to one, memristor M1, memristor M2With memristor M3The pole PLUS be all connected with operational amplifier OP1Reverse phase it is defeated
Enter end, resistance R1One end and operational amplifier OP1Inverting input terminal be connected, resistance R1The other end and operational amplifier
OP1Output end be connected, operational amplifier OP1Non-inverting input terminal ground connection；The phase inverter includes resistance R2, resistance R3With
Operational amplifier OP2, operational amplifier OP1Output end and resistance R2It is connected, resistance R2Respectively with resistance R3And operation amplifier
Device OP2Inverting input terminal be connected, resistance R3With operational amplifier OP2Output end be connected, operational amplifier OP2It is same
Phase input end grounding；Operational amplifier OP2Output end and operational amplifier OP3Non-inverting input terminal be connected, operational amplifier
OP3Reverse inter-input-ing ending grounding.
The control circuit includes or door D1, buffered gate D2With with door D3Or door D1Two input terminals be separately connected input
Control signal I0And I1Or door D1Output end and signal input circuit in metal-oxide-semiconductor F1Grid be connected；Buffered gate D2Input
End connection input control signal I0Or buffered gate D2Output end and signal input circuit in metal-oxide-semiconductor F2Grid be connected；With
Door D3Two input terminals be respectively used to receive input control signal I0And I1, with door D3Output end and signal input circuit
Metal-oxide-semiconductor F2Grid be connected.
Beneficial effects of the present invention: the controller of design can generate corresponding control signal according to the requirement of input signal,
To control the scale of neural network；A kind of memristor neural network structure that scale is controllable is devised, it can be according to control
The control signal change of device output participates in the quantity of the cynapse in work；The memristor nerve net of flexibly configurable of the invention
When network circuit is with different scale operations, output result can be effectively prevented from and mistake occur；By adjusting participating in work
Cynapse quantity, to save energy consumption.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the principle of the present invention figure.
Fig. 2 is the circuit diagram of signal input circuit shown in Fig. 1.
Fig. 3 is the circuit diagram of nerve network circuit shown in Fig. 1.
Fig. 4 is the circuit diagram of control circuit shown in Fig. 1.
Fig. 5 is the circuit diagram of Fig. 1.
Fig. 6 is the simulation result schematic diagram of circuit shown in Fig. 5.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under that premise of not paying creative labor
Embodiment shall fall within the protection scope of the present invention.
As shown in Figure 1, a kind of memristor nerve network circuit of flexibly configurable, including control circuit, signal input circuit
And nerve network circuit, the input terminal of control circuit are connected with input control signal, the input terminal of signal input circuit with it is defeated
Enter signal to be connected, the output end of control circuit is connected with signal input circuit, the output end and nerve of signal input circuit
Lattice network is connected, and nerve network circuit includes memristor element, the output end output result signal of nerve network circuit.Signal
Input circuit is used to the signal received be sent to nerve network circuit；Nerve network circuit inputs electricity for handling from signal
Then the signal that road receives exports the output signal of an expression result；Control circuit is used to be wanted according to the signal received
It asks, control can be sent to the quantity of the signal of nerve network circuit, to control the cynapse quantity for participating in work.
Signal input circuit include three input terminals, three output ends and three control terminals, three of signal input circuit
Input terminal receives three input signals respectively；The nerve network circuit includes three input terminals and an output end, nerve net
Three input terminals of network circuit connect one to one with three output ends of signal input circuit respectively, nerve network circuit it is defeated
Outlet output activation voltage；The control circuit includes two input terminals and three output control terminals, and two input terminals connect respectively
Two input control signals are received, three output control terminals connect one to one with three control terminals of signal input circuit respectively.
As shown in Figure 2 and Figure 5, the signal input circuit includes metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3, metal-oxide-semiconductor F1、
Metal-oxide-semiconductor F2With metal-oxide-semiconductor F3Drain electrode be separately connected three input signals, metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3Source electrode respectively with
Three input terminals of nerve network circuit connect one to one, metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3Grid and control circuit
Three output control terminals be connected.That is metal-oxide-semiconductor F1Drain electrode receive input signal IN1, metal-oxide-semiconductor F2Drain electrode receive input letter
Number IN2, metal-oxide-semiconductor F3Drain electrode receive input signal IN3。
Further, nerve network circuit includes weighted sum circuit, phase inverter and operational amplifier OP3, input control
Signal is connected with weighted sum circuit, and weighted sum circuit is connected with phase inverter, phase inverter and operational amplifier OP3It is connected
It connects, operational amplifier OP3Output result signal；Weighted sum circuit includes memristor element.
As shown in figure 3, the memristor element includes memristor M1, memristor M2With memristor M3, weighted sum circuit further includes resistance
R1With operational amplifier OP1, memristor M1, memristor M2With memristor M3The pole MINUS respectively with the metal-oxide-semiconductor F of signal input circuit1、MOS
Pipe F2With metal-oxide-semiconductor F3Source electrode connect one to one.Metal-oxide-semiconductor F1Source electrode and memristor M1MINUS extremely be connected, metal-oxide-semiconductor F2Source
Pole and memristor M2MINUS extremely be connected, metal-oxide-semiconductor F3Source electrode and memristor M3MINUS extremely be connected.Memristor M1, memristor M2And memristor
M3The pole PLUS be all connected with operational amplifier OP1Inverting input terminal, resistance R1One end and operational amplifier OP1Reverse phase it is defeated
Enter end to be connected, resistance R1The other end and operational amplifier OP1Output end be connected, operational amplifier OP1Homophase input
End ground connection；The phase inverter includes resistance R2, resistance R3With operational amplifier OP2, operational amplifier OP1Output end and resistance R2
It is connected, resistance R2Respectively with resistance R3With operational amplifier OP2Inverting input terminal be connected, resistance R3And operational amplifier
OP2Output end be connected, operational amplifier OP2Non-inverting input terminal ground connection；Operational amplifier OP2Output end put with operation
Big device OP3Normal phase input end be connected, operational amplifier OP3Reverse inter-input-ing ending grounding, operational amplifier OP3Output end
The output result signal of output nerve lattice network.
Memristor M1, memristor M2, memristor M3, resistance R1With operational amplifier OP1Constitute a weighted sum circuit.Memristor M1、
Memristor M2With memristor M3Initial memristor value can according to need sets itself.Here M is taken1=5000, M2=2000, M3=
1250, R1=1000Ω.Weight row vector is [w1, w2, w3]=[R1/M1, R1/M2, R1/M3]=[0.2,0.5,0.8].Resistance R2、
Resistance R3With operational amplifier OP2A phase inverter is constituted, wherein R2=1000, R3=1000Ω.Therefore, when neural network electricity
The input signal column vector on road is [IN1', IN2', IN3'] when.Operational amplifier OP2Output be [w1, w2, w3]*[IN1',
IN2', IN3’]T.Operational amplifier OP3Positive and negative supply voltage be 1v and -1v respectively, due to operational amplifier OP3Amplification increase
Benefit is very high, so working as operational amplifier OP3Non-inverting input terminal when receiving positive voltage, operational amplifier OP3Output is 1,
As operational amplifier OP3Non-inverting input terminal when receiving negative voltage, operational amplifier OP3Output is -1.Operational amplifier
OP3Function as a neuron.
Classification task may be implemented using neural network in nerve network circuit, and the input port of nerve network circuit receives
The input signal of characterization input message, after being weighted summation to each input signal, is compared with given constant, if input
The weighted sum of signal is greater than given constant, then nerve network circuit exports a signal, indicates that this inputs characterized information category
In this classification, if the weighted sum of input signal is less than given constant, nerve network circuit exports another signal, indicates that this is defeated
Enter characterized information and belongs to another classification.
Specifically, than be used to classify if any two kinds of fruit of apple and orange.There are two input signals, and each signal has
1 and -1 two states, and its default value is -1.Be for first 1 expression shape of input it is round, -1 expression shape is not round
's；Second is inputted, 1 indicates that epidermis is smooth, and -1 indicates rough coat.The property of fruit can use vector [shape, table
Skin] it indicates.It is 1 that result is exported if if vector [1,1] is transported to the input terminal of nerve network circuit, indicates the classification knot
Fruit is apple；If network output result is -1 if vector [1, -1] is transported to the input terminal of nerve network circuit, indicating should
Classification results are oranges.
When input signal there are three when, each signal has 1 and -1 two states, and its default value is -1.For first
Input 1 expression shape be it is round, -1 indicate shape be not round；Second is inputted, 1 indicates that epidermis is smooth, and -1 indicates table
Skin is coarse；Third is inputted, 1 expression appearance there are significant depressions, and -1 expression appearance does not have significant depressions.The property of fruit can
To be indicated with vector [shape, epidermis, appearance].The network if the input terminal for vector [1,1,1] being transported to neural network
Exporting result is 1, indicates that the classification results are apples；If vector [1, -1, -1] is transported to the input terminal of neural network then
It is -1 that network, which exports result, indicates that the classification results are oranges.
The memristor neural network of nerve network circuit of the present invention is there are three input port, when realizing two with this three-terminal network
When the classification task of a input, both ends can be converted by the control circuit three-terminal network according to demand input network and run.
As shown in Figure 4 and Figure 5, the control circuit includes or door D1, buffered gate D2With with door D3Or door D1Two it is defeated
Enter end and is separately connected input control signal I0And I1Or door D1Output end and signal input circuit in metal-oxide-semiconductor F1Grid be connected
It connects；Buffered gate D2Input terminal connect input control signal I0Or buffered gate D2Output end and signal input circuit in metal-oxide-semiconductor
F2Grid be connected；With door D3Two input terminals be respectively used to receive input control signal I0And I1, with door D3Output end
With the metal-oxide-semiconductor F of signal input circuit2Grid be connected.
Control circuit passes through control metal-oxide-semiconductor F1-F3Grid can make metal-oxide-semiconductor F1-F3Source electrode and drain electrode work respectively
High impedance or low impedance state, to determine that can the input signal from drain electrode pass through metal-oxide-semiconductor F1-F3It conducts to source electrode institute
In the nerve network circuit of connection.The logic true value table of control circuit is as shown in table 1, and wherein high level indicates logic 1, low electricity
It is flat to indicate logical zero.By giving input control signal I0And I1Logical value, the corresponding output of available control circuit patrols
Value is collected, this output and metal-oxide-semiconductor F in signal input circuit shown in Fig. 21-F3Grid connect one to one, to control metal-oxide-semiconductor
Working condition.
The logic true value table of 1 control circuit of table
The input of the source electrode and nerve network circuit of each metal-oxide-semiconductor of signal input circuit of the invention connects one to one.
The grid of metal-oxide-semiconductor connects one to one in the control output end of control circuit and signal input circuit, the circuit structure such as Fig. 5 institute
Show.
When a certain fruit is classified, it is characterized in that round, epidermis is smooth.Input feature vector is two, and input column vector is
[1,1]T.This classification task is the classification of two input signals.Input control signal I in Fig. 60=5V、I1=5V indicates logic 1；
Input control signal I0=0V、I1=0V, expression patrol 0.The input control signal I of control circuit0=1、I1=0, according to truth table table 1
It knows to export O0=1, O1=1, O2=0, therefore, metal-oxide-semiconductor F1With metal-oxide-semiconductor F2In low resistance state, signal can be from there through metal-oxide-semiconductor F3Place
In high-impedance state, signal is prevented to pass through.Although input signal IN at this time3Default conditions be -1, but this value send less than mind
In lattice network, entire circuit is equivalent to the memristor neural network of one two input.The weighted sum circuit of neural network
It is weighted summation: [w1, w2]*[IN1, IN2]T=[0.2,0.5]*[1,1]T=0.7.Because of operational amplifier OP2Output be
0.7, it is greater than 0, so operational amplifier OP3Output is 1.The output of nerve network circuit is the result shows that classification results are apples.
The simulation result of the process is as shown in the waveform between 0 second to 1 second in Fig. 6.When another fruit is classified, it is characterized in that circle
Shape, rough coat, input column vector are [1, -1]T.The weighted sum circuit of neural network is weighted summation, [w1, w2]*
[IN1, IN2]T=[0.2,0.5]*[1,-1]=-0.3.Therefore operational amplifier OP2Output be -0.3, -0.3 less than 0, so
Operational amplifier OP2Output is -1.The output of nerve network circuit is the result shows that classification results are oranges.The emulation knot of the process
Fruit is as shown in the waveform between 1 second to 2 seconds in Fig. 6.
When executing three input classification tasks with this circuit, the input control signal I of control circuit0=1、I1=1, according to true
It is worth O known to table0=1, O1=1, O2=1, therefore, metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3All in low resistance state, thus signal can lead to
It crosses.Nerve network circuit is converted into the memristor neural network of three inputs.A certain fruit is classified, it is characterized in that round, table
Skin is smooth, has significant depressions.Input vector is [1,1,1]T.The weighted sum circuit of neural network is weighted summation: [w1,
w2, w3]*[IN1, IN2, IN3]T=[0.2,0.5,0.8]*[1,1,1] =1.5.Dimension, operational amplifier OP2Output be
1.5, it is greater than 0, so operational amplifier OP3Output is 1.The output of nerve network circuit is the result shows that classification results are apples.
In the simulation result such as Fig. 5 of the process, shown in the waveform between 2 seconds to 3 seconds.Another fruit is classified, it is characterized in that it is round,
Rough coat, without significant depressions, input vector is [1, -1-1].The weighted sum circuit of nerve network circuit, which is weighted, to be asked
With: [w1, w2, w3]*[IN1, IN2, IN3]T=[0.2,0.5,0.8]*[1,-1,-1] T=-1.1.Therefore operational amplifier OP2's
Output is -1.1, less than 0, so operational amplifier OP3Output is -1.The output of nerve network circuit is the result shows that classification results
It is orange.The simulation result of the process is as shown in the waveform between 3 seconds to 4 seconds in Fig. 6.
The present invention provides a kind of memristor nerve network circuits of flexibly configurable, can be according to required neural network
Scale, automatically adjustment participates in the cynapse number in work, to keep memristor neural network clever between different scales
Conversion living, improves system stability, reduces system energy consumption.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Within mind and principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (3)
1. a kind of memristor nerve network circuit of flexibly configurable, which is characterized in that including control circuit, signal input circuit and
The input terminal of nerve network circuit, control circuit is connected with input control signal, the input terminal of signal input circuit and input
Signal is connected, and the output end of control circuit is connected with signal input circuit, the output end and nerve net of signal input circuit
Network circuit is connected, and nerve network circuit includes memristor element, the output end output result signal of nerve network circuit；
The signal input circuit include three input terminals, three output ends and three control terminals, three of signal input circuit
Input terminal receives three input signals respectively；The nerve network circuit includes three input terminals and an output end, nerve net
Three input terminals of network circuit connect one to one with three output ends of signal input circuit respectively, nerve network circuit it is defeated
Outlet output activation voltage；The control circuit includes two input terminals and three output control terminals, and two input terminals connect respectively
Two input control signals are received, three output control terminals connect one to one with three control terminals of signal input circuit respectively；
The signal input circuit includes metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3, metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3Drain electrode
It is separately connected three input signals, metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3Source electrode it is defeated with three of nerve network circuit respectively
Enter end to connect one to one, metal-oxide-semiconductor F1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3Grid be connected with three output control terminals of control circuit
It connects；
The control circuit includes or door D1, buffered gate D2With with door D3Or door D1Two input terminals be separately connected input control
Signal I0And I1Or door D1Output end and signal input circuit in metal-oxide-semiconductor F1Grid be connected；Buffered gate D2Input terminal connect
Meet input control signal I0Or buffered gate D2Output end and signal input circuit in metal-oxide-semiconductor F2Grid be connected；With door D3
Two input terminals be respectively used to receive input control signal I0And I1, with door D3Output end and signal input circuit metal-oxide-semiconductor
F2Grid be connected.
2. the memristor nerve network circuit of flexibly configurable according to claim 1, which is characterized in that the neural network
Circuit includes weighted sum circuit, phase inverter and operational amplifier OP3, input control signal is connected with weighted sum circuit,
Weighted sum circuit is connected with phase inverter, phase inverter and operational amplifier OP3It is connected, operational amplifier OP3Export result letter
Number；Weighted sum circuit includes memristor element.
3. the memristor nerve network circuit of flexibly configurable according to claim 2, which is characterized in that the memristor element
Including memristor M1, memristor M2With memristor M3, weighted sum circuit further includes resistance R1With operational amplifier OP1, memristor M1, memristor M2
With memristor M3The pole MINUS respectively with the metal-oxide-semiconductor F of signal input circuit1, metal-oxide-semiconductor F2With metal-oxide-semiconductor F3Source electrode correspond connect
It connects, memristor M1, memristor M2With memristor M3The pole PLUS be all connected with operational amplifier OP1Inverting input terminal, resistance R1One end with
Operational amplifier OP1Inverting input terminal be connected, resistance R1The other end and operational amplifier OP1Output end be connected, transport
Calculate amplifier OP1Non-inverting input terminal ground connection；The phase inverter includes resistance R2, resistance R3With operational amplifier OP2, operation puts
Big device OP1Output end and resistance R2It is connected, resistance R2Respectively with resistance R3With operational amplifier OP2Inverting input terminal be connected
It connects, resistance R3With operational amplifier OP2Output end be connected, operational amplifier OP2Non-inverting input terminal ground connection；Operation amplifier
Device OP2Output end and operational amplifier OP3Non-inverting input terminal be connected, operational amplifier OP3Reverse inter-input-ing ending grounding.
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