CN109946651A - Multi-functional phased array TR chip based on three-dimension packaging structure - Google Patents
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Abstract
The invention discloses a kind of multi-functional phased array TR chip based on three-dimension packaging structure, chip radio frequency part uses high-performance gallium arsenide chips, including the single channel as four, respectively first passage CH1, second channel CH2, third channel CH3 and fourth lane CH4, four single channels are connected with one point of four power splitter, four ports respectively, each channel includes 6 numerical-control attenuator ATT, 6 be digital phase shifter PHS, low-noise amplifier LNA, driving amplifier DRV1, driving amplifier DRV2, power amplifier PA, single-pole three-throw switch SP3T, limiter Limiter；Chip logic control is made into the control circuit of multifunction chip with CMOS chip, by CMOS chip and the upside-down mounting of GaAs multifunction chip, forms integrated three-dimensional encapsulating structure.The multi-functional phased array TR chip based on three-dimension packaging structure realized through the embodiment of the present invention, has small in size, and at low cost, consistency is good, high reliablity and debugs simple advantage.
Description
Technical field
The invention belongs to technical field of integrated circuits, and in particular to a kind of multi-functional phased array based on three-dimension packaging structure
TR chip.
Background technique
Phased-array radar is a kind of advanced radar system, based on phased array antenna, using the production of a variety of high-tech
Object.The sixties, to adapt to need monitoring, tracking and identification of the outer null object such as artificial satellite, intercontinental ballistic missile etc., strategy
The Large Phased Array Radar of system of defense is just come into being.It is early since the development cost of Large Phased Array Radar is high
Phase only has the states such as the U.S. and Russia to have developed several practical radars.
With the raising of the various aircraft performances as radar observation object, the complication of radar target environment, in order to
More information is extracted from radar return and improves the production capacity of radar, the tactical qualities of radar is proposed higher and higher
It is required that such as, it is desirable that radar have high-precision, High Data Rate, anti-interference, target identification, it is multi-functional and it is a variety of it is adaptive should be able to
Power etc., at the same time, with advances in technology, especially microelectric technique, solid state power device and array signal process technique
Rapid development, phased-array technique be gradually applied to from Large Phased Array Radar various tactical radars and commerical radar it
In.
The antenna array of phased-array radar is arranged by the small size antenna unit of a large amount of unit controls, number of unit and thunder
The function of reaching is related, and generally from several hundred to tens of thousands of, these antenna unit is well-regulated to be arranged in the plane, forming array day
Line.It is concerned with principle using electromagnetic wave, passes through computer control and present phase toward each radiating element electric current, so that it may change wave beam
Direction is scanned, therefore referred to as electric scanning.The echo-signal received is sent into host by antenna element, completes radar to target
Search, tracking and measurement.Each antenna element is other than having aerial radiation a period of time, and there are also amplifier, phase shifter, decaying
The devices such as device, switch.Different a period of time can be fed into the electric current of out of phase by phase shifter, to give off difference in space
The wave beam of directionality.The number of unit of antenna is more, then the wave beam that wave beam can be formed in space is more.The work base of this radar
Plinth is the controllable array antenna of phase, and " phased array " thus gains the name.
The key points and difficulties of phased-array radar design are T/R component.At present industry T/R component design and manufacture usually
Using hybrid integrated technology, i.e., by microwave assembly technology, by tens of money single function microwave chips, (amplifier, phase shifter, declines at switch
Subtract the chips such as device, limiter, driver) it is integrated in one piece of circuit board or microwave cavity, although this technology comparative maturity,
It is that its intrinsic disadvantage seriously constrains the development of phased array technology.Its intrinsic disadvantage includes the following aspects:
1, volume is big.A large amount of chip, a large amount of microstrip transmission line, chip support plate, capacitor are needed in traditional T/R component
Resistance, metal separate space etc. cause its volume to be difficult to be made small, it is contemplated that and phased-array radar includes thousands of a T/R components,
It is made according to traditional T/R component technology, the volume and weight of phased-array radar can be very big, this can seriously affect equipment
Portability and ease of use.
2, at high cost.Traditional T/R component technology needs a large amount of microwave chip, a large amount of microstrip transmission line, chip to carry
Plate, capacitor, resistance and metal separate space, along with manual debugging and micro-group fill, cost is very high.
3, consistency is poor.Phased-array radar has very strict requirement to the consistency of performance of each T/R component.?
The performance indicators such as microwave and millimeter wave frequency range, traditional amplitude, phase, phase shifting accuracy, the attenuation accuracy of T/R component are by chip-scale
Connection, spun gold, length of transmission line, the influence of micro-group assembly technology are serious, and the consistency of performance is poor, have seriously affected phased array thunder
The performance reached.
4, poor reliability.Traditional T/R component have a large amount of microstrip transmission line, chip support plate, capacitance resistance, metal separate space,
Spun gold etc., radar in use any a part go wrong can all cause the T/R channel performance deteriorate.
5, a large amount of debugging efforts are needed.Due to traditional T/R component consistency of performance it is difficult to ensure that, after the assembly is completed very
Difficulty meets the coherence request of phased array system, so engineer is needed to carry out a large amount of debugging efforts to T/R component, needs to throw
Enter a large amount of time and efforts, seriously affects the production efficiency of phased-array radar.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of multi-functional phased array TR chip based on three-dimension packaging structure.
In order to solve the above technical problems, the present invention adopts the following technical scheme that:
A kind of multi-functional phased array TR chip based on three-dimension packaging structure, chip radio frequency part use high-performance GaAs
Chip, including the single channel as four, respectively first passage CH1, second channel CH2, third channel CH3 and fourth lane
CH4, four single channels are connected with one point of four power splitter, four ports respectively, and each channel includes that 6 numerical-control attenuator ATT, 6 are
Digital phase shifter PHS, low-noise amplifier LNA, driving amplifier DRV1, driving amplifier DRV2, power amplifier PA, hilted broadsword
Three throw switch SP3T, limiter Limiter；Chip logic control is made into the control circuit of multifunction chip with CMOS chip, will
CMOS chip and the upside-down mounting of GaAs multifunction chip form integrated three-dimensional encapsulating structure.
Preferably, 27 external pads are shared on the multi-functional phased array TR chip, wherein comprising 9 radio frequency pads, 9
A radio frequency pad is respectively to receive transmitting public port COM, first passage output port TX1, first passage input port RX1,
Second channel output port TX2, second channel input port RX2, third channel output port TX3, third channel input port
RX3, fourth lane output port TX4, fourth lane input port RX4, remaining 18 pad includes serial data input port
DIN, serial data output port DOUT export enable port OE, serial-parallel conversion circuit clock signal input terminal mouth CLK, low electricity
Flat serial data is effective, and data are incorporated to buffer area port DEN, serial-parallel conversion circuit data latch signal after high level serioparallel exchange
Input terminal LD, function register serial data input port FIN, function register data effective port FEN, three-level register lock
Signal port SET is deposited, internal logic combination, which generates, receives power modulation port TR1, and internal logic combination generates emission power tune
Port TR2 processed, TR component operation is effective, is used for internal logic combined port EN, and emission power modulates output port TX, receives electricity
Output port RX, adjustable attenuation output port ATT, phase controlling output port PHS, switching signal output ports SW1 are modulated in source,
Switching signal output ports SW2.
Preferably, the reception RF signal input end RX1 of first passage CH1 connects limiter Limiter input terminal, limiter
Limiter, LNA, 6 numerical-control attenuator ATT, driving amplifier DRV1 are sequentially connected, and the output end of DRV1 connects single-pole three throw and opens
One end of SP3T is closed, single-pole three-throw switch another termination driving amplifier DRV2, DRV2 output terminates power amplifier PA, PA's
RF signal output TX1 is penetrated in output end sending and receiving, and the third terminal of single-pole three-throw switch passes through 50 Ω resistance eutral groundings, single-pole three throw
Switch the port of one point of four power splitter of termination of public termination 6 digital phase shifters PHS, PHS.
Preferably, the phase shift stepping of 6 digital phase shifters is 5.625 °, and phase-modulation range is 0 °~360 °.
Preferably, the limiter is in receiving channel front end, for limiting the amplitude of the radiofrequency signal received, if
The signal received is smaller, and limiter shows the device of a smaller Insertion Loss, if receiving, signal is larger, and limiter limitation connects
The amplitude for receiving radiofrequency signal, prevents the radiofrequency signal received excessive, damages receives link.
Preferably, 6 numerical-control attenuator ATT are used to carry out input radio frequency number amplitude modulation, and decaying stepping is
0.5dB, attenuation range are 0.5dB~31.5dB.
Preferably, the single-pole three-throw switch SP3T for realizing receiving channel and transmission channel mutual switching, when this
SP3T can be switched to load state when not needing by branch.
Relative to traditional T/R component design and fabrication technology, more function proposed by the present invention based on three-dimension packaging structure
Energy phased array TR chip has following clear superiority:
1, small in size.The present invention is based on the multi-functional phased array TR chip of three-dimension packaging structure, which includes four logical
Road integrates various chips needed for radio frequency on a single die, and size is small, all controls is used CMOS chip, by CMOS core
Piece and GaAs radio frequency chip upside-down mounting form integrated three-dimensional encapsulating structure and realize Multifunctional core piece performance.It is only needed using the present invention
It is equipped with several chips such as frequency mixer, filter and achieves that the function of needing tens of money chips to be just able to achieve originally, significantly
The use for reducing the devices such as chip, microstrip line, cavity, capacitance resistance, further reduce the volume and again of T/R component
Amount.
2, at low cost.The cost of chip is list that is directly proportional, using relative to traditional T/R component to the area of chip
Functional chip is used the present invention is based on the size of the multi-functional phased array TR chip of three-dimension packaging structure is small, while by number
CMOS chip production, it is at low cost, low in energy consumption.
3, consistency is good.Four single channel chips of the invention are consistent, and its consistency depends on the consistency of semiconductor machining,
It is smaller by external action, and the bad substandard products of consistency can be found in sieve, avoid installation and debugging, wasting manpower and material resources,
Relative to traditional T/R component, the present invention has a clear superiority.
4, high reliablity.For the present invention due to integrating four channels, each channel includes various chips, therefore reduces load
The use of plate, spun gold, separate space and microstrip line, out of order possibility reduce.
5, debugging is simple.Due to the multi-functional phased array TR chip radio frequency part the present invention is based on three-dimension packaging structure be
It is made on the same semiconductor crystal wafer, consistency is good and CMOS chip upside-down mounting is i.e. controllable after the completion, does not need artificially to debug again
Debug time can be greatly reduced in the performance of each module, improve the production efficiency of T/R component.
Detailed description of the invention
Fig. 1 is a kind of multi-functional phased array TR chip structure schematic diagram based on three-dimension packaging structure of the present invention；
Fig. 2 is a kind of multi-functional phased array TR chip finished product schematic based on three-dimension packaging structure of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are some of the embodiments of the present invention, instead of all the embodiments.Based on this hair
Embodiment in bright, every other implementation obtained by those of ordinary skill in the art without making creative efforts
Example, shall fall within the protection scope of the present invention.
Carry out the specific embodiment that the present invention will be described in detail with reference to the accompanying drawing, it is a kind of as shown in Figure 1 to be based on three-dimension packaging
The multi-functional phased array TR chip structure figure of structure, radio frequency chip includes the single channel as four, respectively first passage
CH1, second channel CH2, third channel CH3 and fourth lane CH4, four single channels respectively with one point of four power splitter, four ports
It is connected, each channel is digital phase shifter PHS, low-noise amplifier LNA, driving amplifier including 6 numerical-control attenuator ATT, 6
DRV1, driving amplifier DRV2, power amplifier PA, single-pole three-throw switch SP3T, limiter Limiter.Chip logic control
Line is more, in order to reduce chip power-consumption, reduces chip area, the control circuit of multifunction chip, CMOS core are made into CMOS chip
Piece includes the functions such as TR power modulation, gate driving, negative pressure protection and serioparallel exchange, can pass through serial bus configuration.By CMOS
Chip and multifunction chip upside-down mounting form integrated three-dimensional encapsulating structure.
Further, multi-functional phased array TR chip shares 27 external pads, wherein including 9 radio frequency pads, 9 are penetrated
Frequency pad is respectively to receive transmitting public port COM, first passage output port TX1, first passage input port RX1, and second
Channel output end mouth TX2, second channel input port RX2, third channel output port TX3, third channel input port RX3,
Fourth lane output port TX4, fourth lane input port RX4, remaining 18 pad includes serial data input port DIN,
Serial data output port DIN exports enable port OE, serial-parallel conversion circuit clock signal input terminal mouth CLK, and low level is serial
Data are effective, and data are incorporated to buffer area port DEN, serial-parallel conversion circuit data latch signal input terminal after high level serioparallel exchange
LD, function register serial data input port FIN, function register data effective port FEN, three-level registers latch signal
Port SET, internal logic combination, which generates, receives power modulation port TR1, and internal logic combination generates emission power modulation port
TR2, TR component operation are effective, are used for internal logic combined port EN, and emission power modulates output port TX, receive power modulation
Output port RX, adjustable attenuation output port ATT, phase controlling output port PHS, switching signal output ports SW1, switch letter
Number output port SW2.
Further, multifunction chip is that four identical transceiver channels are connected to one point of four power splitter.Here only with CH1 into
Row description receives RF signal input end RX1 and connects limiter Limiter input terminal, and limiter Limiter, LNA, 6 digit controls decline
Subtract device ATT, driving amplifier DRV1 is sequentially connected, the output end of DRV1 connects one end of single-pole three-throw switch SP3T, single-pole three throw
Another termination driving amplifier DRV2, DRV2 output termination power amplifier PA are switched, radiofrequency signal is penetrated in the output end sending and receiving of PA
Output end TX1；The third terminal of single-pole three-throw switch passes through 50 Ω resistance eutral groundings；The public 6 digit control of end segment of single-pole three-throw switch
The port of one point of four power splitter of termination of phase shifter PHS, PHS.
Further, limiter is used to limit the amplitude of the radiofrequency signal received, if the signal received is smaller, clipping
Device can show the device of a smaller Insertion Loss, if receiving, signal is larger, and limiter will limit the amplitude for receiving radiofrequency signal,
It prevents the radiofrequency signal received excessive, damages receives link.Since limiter is in receiving channel front end, therefore limiter is small
Signal Insertion Loss is small as far as possible, to reduce the noise coefficient of system.Low-noise amplifier LNA is used for the radio frequency received
Signal carries out low noise amplification, minimizes noise coefficient while amplifying radiofrequency signal, the noise of low-noise amplifier
It is most important to the noise of whole system, therefore low-noise amplifier needs higher gain while, reduces noise as far as possible
Coefficient.Attenuator ATT can carry out amplitude modulation to input radio frequency number, and the decaying stepping of 6 numerical-control attenuators is 0.5dB, decline
Subtracting range is 0.5dB~31.5dB.Driving amplifier DRV1 is for carrying out certain amplification to input radio frequency signal, due to receiving
There are devices such as phase shifter PHS, attenuator ATT, switches in link, cause link Insertion Loss larger, so needing driving amplifier
DRV1 come guarantee receiving channel have certain gain.Single-pole three-throw switch SP3T is responsible for realizing receiving channel and transmission channel
SP3T, load state can be switched to when the branch does not need, guarantees that the branch does not have an impact other branches by mutually switching.
6 digital phase shifter PHS are the common parts of transmission channel and receiving channel, can be carried out to the radiofrequency signal for receiving and emitting
Phase-modulation, 6 digital phase shifter phase shift steppings are 5.625 °, and phase-modulation range is 0 °~360 °.Driving amplifier DRV2
Certain input power is provided for power amplifier PA, needed for guaranteeing that transmitting radiofrequency signal can be amplified to by power amplifier PA
Radiofrequency signal.Power amplifier PA is transmitting branch afterbody, it is ensured that the output power and efficiency of the amplifier are as far as possible
Height, output power is high, and electromagnetic wave could pass farther, high-efficient to guarantee that dc power is converted into radio frequency function as far as possible
Rate.One point of four power splitter Divider is the common parts of receiving channel and transmission channel, when work is when emitting state, power splitter
Can by the end COM input signal constant amplitude with phase be divided into four parts enter phase shifter PHS, when work when receiving state, can be by four
The radiofrequency signal that a receiving channel receives synthesizes signal all the way.
If channel gain, which requires, can increase the quantity that can reduce amplifier in the present invention, if chip area is wanted
It asks and single transceiver channel can be directly used, emission port and receiving port of the present invention separate, and single-pole double throw can also be used
Switch switches over.
Fig. 2 is that CMOS control chip 02 is inverted in the finished figure on gallium arsenide chips 01, and size low power consumption is low.This field skill
Art personnel are it is understood that the present invention is not limited to the upside-down mounting of gallium arsenide chips and CMOS chip, any three-five chip and silicon
Base chip all can upside-down mounting.
The multi-functional phased array TR chip based on three-dimension packaging structure realized through the embodiment of the present invention has volume
Small, at low cost, consistency is good, the high reliablity advantage simple with debugging.
It should be appreciated that exemplary embodiment as described herein is illustrative and be not restrictive.Although being retouched in conjunction with attached drawing
One or more embodiments of the invention is stated, it should be understood by one skilled in the art that not departing from through appended right
In the case where the spirit and scope of the present invention defined by it is required that, the change of various forms and details can be made.
Claims (7)
1. a kind of multi-functional phased array TR chip based on three-dimension packaging structure, which is characterized in that chip radio frequency part is using high
Performance gallium arsenide chips, including the single channel as four, respectively first passage CH1, second channel CH2, third channel CH3
With fourth lane CH4, four single channels are connected with one point of four power splitter, four ports respectively, and each channel includes that 6 digit controls decline
Subtract device ATT, 6 be digital phase shifter PHS, low-noise amplifier LNA, driving amplifier DRV1, driving amplifier DRV2, power are put
Big device PA, single-pole three-throw switch SP3T, limiter Limiter；Chip logic control is made into multifunction chip with CMOS chip
CMOS chip and the upside-down mounting of GaAs multifunction chip are formed integrated three-dimensional encapsulating structure by control circuit.
2. the multi-functional phased array TR chip based on three-dimension packaging structure as described in claim 1, which is characterized in that described more
27 external pads are shared on function phased array TR chip, wherein including 9 radio frequency pads, 9 radio frequency pads are respectively to receive
Emit public port COM, first passage output port TX1, first passage input port RX1, second channel output port TX2,
Second channel input port RX2, third channel output port TX3, third channel input port RX3, fourth lane output port
TX4, fourth lane input port RX4, remaining 18 pad includes serial data input port DIN, serial data output port
DOUT exports enable port OE, and serial-parallel conversion circuit clock signal input terminal mouth CLK, low level serial data is effective, high level
Data are incorporated to buffer area port DEN, serial-parallel conversion circuit data latch signal input terminal LD, function register string after serioparallel exchange
Row data-in port FIN, function register data effective port FEN, three-level registers latch signal port SET, inside is patrolled
It collects combination and generates reception power modulation port TR1, internal logic combination generation emission power modulation port TR2, TR component operation
Effectively, it is used for internal logic combined port EN, emission power to modulate output port TX, receives power modulation output port RX, declines
Down control output port ATT, phase controlling output port PHS, switching signal output ports SW1, switching signal output ports
SW2。
3. the multi-functional phased array TR chip based on three-dimension packaging structure as claimed in claim 1 or 2, which is characterized in that the
The reception RF signal input end RX1 of one channel C H1 meets limiter Limiter input terminal, limiter Limiter, LNA, 6 digits
Control attenuator ATT, driving amplifier DRV1 are sequentially connected, and the output end of DRV1 connects one end of single-pole three-throw switch SP3T, hilted broadsword
Three throw switches another termination driving amplifier DRV2, DRV2 output termination power amplifier PA, the output end sending and receiving radio frequency of PA
The third terminal of signal output end TX1, single-pole three-throw switch pass through 50 Ω resistance eutral groundings, the public termination of single-pole three-throw switch 6
The port of one point of four power splitter of termination of digital phase shifter PHS, PHS.
4. the multi-functional phased array TR chip based on three-dimension packaging structure as described in claim 1, which is characterized in that described 6
The phase shift stepping of position digital phase shifter is 5.625 °, and phase-modulation range is 0 °~360 °.
5. the multi-functional phased array TR chip based on three-dimension packaging structure as described in claim 1, which is characterized in that the limit
Width device is in receiving channel front end, for limiting the amplitude of the radiofrequency signal received, if the signal received is smaller, and clipping
Device shows the device of a smaller Insertion Loss, if receiving, signal is larger, and limiter limitation receives the amplitude of radiofrequency signal, prevents
The radiofrequency signal received is excessive, damages receives link.
6. the multi-functional phased array TR chip based on three-dimension packaging structure as described in claim 1, which is characterized in that described 6
Position numerical-control attenuator ATT be used for input radio frequency number carry out amplitude modulation, decaying stepping be 0.5dB, attenuation range for 0.5dB~
31.5dB。
7. the multi-functional phased array TR chip based on three-dimension packaging structure as described in claim 1, which is characterized in that the list
Three throw switch SP3T of knife can cut SP3T when the branch does not need for realizing the mutual switching of receiving channel and transmission channel
Change to load state.
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| CN113098551B (en) * | 2021-04-27 | 2022-01-04 | 电子科技大学 | HTCC three-dimensional receiving and transmitting assembly |
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| CN114006177B (en) * | 2021-12-30 | 2022-04-15 | 浩泰智能(成都)科技有限公司 | Array structure of phased array antenna module, control method and electronic equipment |
| CN114006177A (en) * | 2021-12-30 | 2022-02-01 | 浩泰智能(成都)科技有限公司 | Array structure of phased array antenna module, control method and electronic equipment |
| CN114496996A (en) * | 2022-01-21 | 2022-05-13 | 中国电子科技集团公司第十研究所 | Electromagnetic shielding structure of TR subassembly |
| CN114496996B (en) * | 2022-01-21 | 2023-09-01 | 中国电子科技集团公司第十研究所 | Electromagnetic shielding structure of TR assembly |
| CN115347894A (en) * | 2022-10-17 | 2022-11-15 | 杭州岸达科技有限公司 | Radio frequency interface circuit and multi-chip cascade method based on radio frequency interface circuit |
| CN116224296A (en) * | 2023-03-28 | 2023-06-06 | 之江实验室 | Phased array radar and information acquisition method, storage medium and electronic equipment |
| CN116224296B (en) * | 2023-03-28 | 2023-08-11 | 之江实验室 | Phased array radar and information acquisition method, storage medium and electronic equipment |
| CN117130110A (en) * | 2023-10-25 | 2023-11-28 | 西安电子科技大学 | Integrated liquid cooling radiating photoelectric adapter socket |
| CN117130110B (en) * | 2023-10-25 | 2024-02-23 | 西安电子科技大学 | Integrated liquid cooling radiating photoelectric adapter socket |
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