CN109873060B - Method for manufacturing micro light-emitting diode array - Google Patents
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- CN109873060B CN109873060B CN201910315135.XA CN201910315135A CN109873060B CN 109873060 B CN109873060 B CN 109873060B CN 201910315135 A CN201910315135 A CN 201910315135A CN 109873060 B CN109873060 B CN 109873060B
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Abstract
The invention provides a method for manufacturing a micro light-emitting diode array, and relates to the technical field of light-emitting diodes. Firstly, a patterned light emitting layer is manufactured on the basis of one side of a first substrate, then a patterned bonding layer corresponding to the patterned light emitting layer is manufactured on the basis of one side of a second substrate, wherein the patterned bonding layer comprises a sacrificial layer, the patterned light emitting layer is bonded with the patterned bonding layer so as to form a plurality of light emitting chips on one side of the second substrate, finally, the sacrificial layer is removed, and a transfer substrate is utilized to strip part or all of the light emitting chips. The method for manufacturing the micro light-emitting diode array has the effect of higher efficiency in the processing process.
Description
Technical Field
The invention relates to the technical field of light emitting diodes, in particular to a manufacturing method of a micro light emitting diode array.
Background
A Light Emitting Diode (LED) display device is a technology that a high-density two-dimensional micro LED array is assembled on a substrate of a driving circuit to form an all-solid-state self-Emitting array, and the size of an LED is reduced to a micron level, so as to achieve ultra-high pixel density and ultra-high resolution, and theoretically adapt to screens of various sizes. The structure of the light emitting chip device and the manufacturing method of the light emitting chip array are optimally designed, so that the miniature LED device can be more efficiently transferred and assembled to the driving substrate, and the formation of the spontaneous display device formed by the high-density light emitting chip array becomes the key point of the current research. Because the size of the light-emitting chip is only dozens of microns, the light-emitting chip is positively or inversely arranged, the area of the chip is larger due to the electrode and the electric interconnection, the size of a light-emitting chip device is difficult to reduce, the pixel density is difficult to improve, and the device structure is difficult to meet the requirements of an ultrahigh pixel light-emitting chip display device.
Disclosure of Invention
The invention provides a method for manufacturing a micro light-emitting diode array, which aims to solve the problems that the size of a light-emitting chip device is difficult to reduce and the pixel density is difficult to improve in the prior art.
Another objective of the present invention is to provide a bonding substrate to solve the problems in the prior art that the size of a light emitting chip device is difficult to reduce and the pixel density is difficult to increase.
Another objective of the present invention is to provide a light emitting chip to solve the problems in the prior art that the size of the light emitting chip device is difficult to reduce and the pixel density is difficult to increase. In order to achieve the above purpose, the embodiment of the present invention adopts the following technical solutions:
in a first aspect, an embodiment of the present invention provides a method for manufacturing a micro light emitting diode array, where the method for manufacturing a micro light emitting diode array includes:
manufacturing a patterned light emitting layer based on one side of a first substrate;
manufacturing a patterned bonding layer corresponding to the patterned light emitting layer based on one side of a second substrate, wherein the patterned bonding layer comprises a sacrificial layer;
bonding the patterned light emitting layer and the patterned bonding layer to form a plurality of light emitting chips on one side of the second substrate;
removing the sacrificial layer, and stripping part or all of the light-emitting chips by using a transfer substrate;
and mounting the light emitting chips on the transfer substrate on a target substrate to form a micro light emitting diode array.
In a second aspect, an embodiment of the present invention further provides a bonded substrate, where the bonded substrate includes: the bonding structure comprises a second substrate and a patterned bonding layer positioned on one side of the second substrate; wherein the patterned bonding layer comprises a sacrificial layer.
In a third aspect, an embodiment of the present invention provides a light emitting chip, where the light emitting chip includes a light emitting layer, and a bonding layer connected to the light emitting layer; and a patterned installation part is arranged on one side of the bonding layer, which is far away from the light-emitting layer.
Compared with the prior art, the invention has the following beneficial effects:
the invention provides a micro light-emitting diode array manufacturing method, which comprises the steps of firstly manufacturing a patterned light-emitting layer on the basis of one side of a first substrate, then manufacturing a patterned bonding layer corresponding to the patterned light-emitting layer on the basis of one side of a second substrate, wherein the patterned bonding layer comprises a sacrificial layer, bonding the patterned light-emitting layer and the patterned bonding layer to form a plurality of light-emitting chips on one side of the second substrate, finally removing the sacrificial layer, and stripping part or all of the light-emitting chips by using a transfer substrate. The method for manufacturing the micro light-emitting diode array adopts a flip-chip mode to manufacture the micro light-emitting diode array, and can mount the light-emitting chip on the target substrate through a transfer substrate, so that the assembly can be carried out more efficiently. In addition, the light emitting chip cannot be manually transferred by removing the sacrificial layer and transferring the substrate, so that the size of the light emitting chip device can be reduced, and the pixel density can be improved.
The invention also provides a bonded substrate which comprises a second substrate and a patterned bonding layer positioned on one side of the second substrate, wherein the patterned bonding layer comprises a sacrificial layer. The light-emitting chip can be stripped in a mode of directly removing the sacrificial layer, so that the processing process is more efficient.
The invention also provides a light-emitting chip which comprises a light-emitting layer and a bonding layer connected with the light-emitting layer, wherein a patterned installation part is arranged on one side of the bonding layer, which is far away from the light-emitting layer. Through the mode that sets up the patterning installation department, can be when installing luminous chip on the target substrate, the welding process that carries on more convenient to make its installation more high-efficient.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 shows a flowchart of a method for manufacturing a micro light emitting diode array according to an embodiment of the present invention.
Fig. 2 shows a schematic structural diagram of a patterned light emitting layer provided by an embodiment of the present invention.
Fig. 3 shows a top view of a patterned light emitting layer provided by an embodiment of the invention.
Fig. 4 shows a flowchart of sub-steps of S101 of fig. 1 provided by an embodiment of the present invention.
Fig. 5 shows a schematic structural diagram of a patterned bonding layer provided in an embodiment of the present invention.
Fig. 6 shows a flowchart of sub-steps of S102 of fig. 1 provided by an embodiment of the present invention.
Fig. 7 shows a schematic structural diagram corresponding to step S103 according to the embodiment of the present invention.
Fig. 8 shows a schematic structural diagram corresponding to step S107 provided in the embodiment of the present invention.
Fig. 9 shows a schematic structural diagram of a light emitting chip provided by an embodiment of the present invention.
Icon: 110-a patterned light emitting layer; 111-a first substrate; 112-a light emitting zone; 113-a transparent conductive layer; 120-patterning a bonding layer; 121-a second substrate; 122 — first sacrificial layer; 123-a second sacrificial layer; 124-a first metal layer; 125-a second metal layer; 140-a transfer substrate; 200-a light emitting chip; 210-a light emitting layer; 220-a bonding layer; 221-patterning the mounting portion.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present invention, it is also to be noted that, unless otherwise explicitly specified or limited, the terms "connected" and "connected" are to be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art. Some embodiments of the invention are described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
First embodiment
Referring to fig. 1, an embodiment of the present invention provides a method for manufacturing a micro light emitting diode array, including:
s101, a patterned light emitting layer 110 is fabricated on one side of the first substrate 111.
In this embodiment, a flip-chip process is used to fabricate the micro led array, so as to achieve the effect of more efficiently assembling the light emitting chip 200 onto the target substrate. Wherein, patterning is required for both the light emitting layer 210 and the bonding layer 220.
The patterning of the embodiment refers to dividing a plurality of regions on the light emitting layer 210 or the bonding layer 220, each region is correspondingly manufactured into one light emitting chip 200, and the plurality of regions are arranged in an array, so that after the light emitting layer 210 is bonded with the spacing layer, the plurality of formed light emitting chips 200 are also arranged in an array, and the light emitting chips 200 are conveniently transferred by using the transfer substrate 140. The patterned light emitting layer 110 is shown in fig. 2 and fig. 3.
In addition, in this embodiment, the patterned light emitting layer 110 on the first substrate 111 includes a light emitting region 112, a transparent conductive layer 113, a reflective metal layer, a barrier metal layer, and a first bonding metal layer, wherein the transparent conductive layer 113, the reflective metal layer, and the barrier metal layer are sequentially formed between the first bonding metal layer and the light emitting region; wherein the lateral dimension of the transparent conductive layer 113 is smaller than the lateral dimension of the reflective metal layer, the lateral dimension of the reflective metal layer is smaller than the lateral dimension of the barrier metal layer, and the lateral dimension of the reflective metal layer is smaller than the lateral dimension of the first bonding metal layer.
The material for making the first bonding metal layer may be Au, or AuSn, or other metals. Specifically, referring to fig. 4, S101 includes:
s1011, an N-type semiconductor layer, a quantum well layer, and a P-type semiconductor layer are epitaxially grown on the first substrate 111 side.
In this embodiment, the Light Emitting chip 200 is an LED (Light Emitting Diode), and for the LED, the Light Emitting region includes an N-type semiconductor layer, a quantum well layer, and a P-type semiconductor layer, and when the Light Emitting chip is in an energized state, the N-region electrons and the P-region holes combine in the quantum well layer to emit Light. That is, in fabricating the patterned light emitting layer 110, the light emitting layer 210 is sequentially epitaxially grown on the first substrate 111.
S1012, a patterned transparent conductive layer 113 is formed on the P-type semiconductor layer on the side away from the first substrate 111.
In order to realize the function of conducting electricity, it is also necessary to fabricate the transparent conductive layer 113 on one side of the P-shaped semiconductor layer, wherein the transparent conductive layer 113 can be fabricated by an epitaxial process or other processes.
Moreover, in this embodiment, in order to achieve an effect that light emitted from the quantum well layer of the light emitting diode can improve the light emitting intensity in a reflection manner, the transparent conductive layer 113 is adopted in this embodiment, where the transparent conductive layer 113 can achieve a conductive effect, can also achieve an effect of not absorbing light, and cannot affect the light emitting intensity of the light emitting diode.
Further, after the transparent conductive layer 113 is manufactured, the transparent conductive layer 113 is patterned, that is, the transparent conductive layer 113 is divided into a plurality of regions, and the plurality of regions are arranged in an array, for example, the transparent conductive layer 113 is patterned by etching or the like.
Of course, in some other examples, the non-transparent conductive layer 113 may also be adopted, and the light source is reflected by penetrating the non-transparent conductive layer 113, which is not limited in this embodiment.
Moreover, as an implementation manner of this embodiment, the light emitting region is etched after the patterned light emitting layer 110 is bonded to the bonding substrate, so as to form a patterned light emitting region; as another implementation manner of this embodiment, when patterning the transparent conductive layer 113, the light emitting region may also be patterned at the same time, which is not limited in this embodiment.
S1013, a reflective metal layer, a barrier metal layer, and a first bonding metal layer are formed on the basis of the patterned transparent conductive layer 113 on the side away from the first substrate 111.
Wherein, the lateral dimension of the reflective metal layer is larger than that of the transparent conductive layer 113; the transverse size of the barrier metal layer is larger than that of the reflective layer metal; the lateral dimension of the first bonding metal layer is larger than the lateral dimension of the barrier metal layer.
After the patterned transparent conductive layer 113 is formed, a reflective metal layer may be formed on the patterned transparent conductive layer 113 by epitaxy, wherein the reflective metal layer may reflect light emitted from the quantum well layer, so that the light may be emitted from one side of the N-type semiconductor. For example, the reflective metal layer may be a silver layer. The barrier metal layer can protect the reflective metal layer, prevent electromigration of the reflective metal layer and ensure that the reflective metal layer keeps high reflectivity. The first bonding metal layer is used to bond-transfer the semiconductor layer of the first substrate 111 to the second substrate 121.
In this embodiment, the first bonding metal layer 114 is further fabricated on the reflective metal layer to realize a permanent bond with the bonding substrate. The principle of bonding is that when a large number of metal atoms are aggregated together to form a solid, most or all of the atoms donate their own valence electrons. These valence electrons are common to all atoms, and unlike electrons in ionic or covalent bonds, are exclusive or common to only one or two atoms. The common valence electrons move freely between the positive metal ions as if a gas filled in between them, forming a so-called electron gas, and the positive metal ions are immersed therein. Strong electrostatic attraction is generated between the metal positive ions and the electron gas, so that metal atoms are combined with each other.
S102, a patterned bonding layer 120 corresponding to the patterned light emitting layer 110 is fabricated based on one side of the second substrate 121, wherein the patterned bonding layer 120 includes a sacrificial layer.
In this embodiment, there is no sequence between the steps S102 and S101, that is, in the actual process, the patterned light emitting layer 110 or the patterned bonding layer 120 may be processed first.
In addition, in order to improve the bonding effect between the patterned light emitting layer 110 and the patterned bonding layer 120, in the present embodiment, the patterned light emitting layer 210 and the patterned bonding layer 120 need to have a corresponding relationship. The correspondence relationship in this embodiment refers to the size of each region of the patterned light emitting layer 110 and the interval between adjacent regions, which are equal to the size of each region of the patterned bonding layer 120 and the interval between adjacent regions, respectively, so that during the bonding process, there is a one-to-one correspondence relationship between the patterned light emitting layer 110 and the patterned bonding layer 120. The patterned bonding layer 120 is manufactured with reference to fig. 5.
Referring to fig. 6, S102 includes:
s1021, a patterning process is performed on the target side of the second substrate 121 to form a plurality of recesses on the target side of the second substrate 121.
In this embodiment, in order to fabricate the bonding layer 220 of the light emitting chip 200, a patterning process is performed on the bonding substrate, for example, a patterning process is performed on one side of the second substrate 121 by a photolithography or etching process, so that a plurality of recesses are formed on one side of the second substrate 121. Wherein the patterning of the recesses corresponds to the patterning of the light emitting layer 210. Also, the side of the second substrate 121 for growing the patterned bonding layer 120 is taken as a target side in the present embodiment.
S1022, a first sacrificial layer 122 is formed at the bottom of each recess.
In order to achieve better soldering for the light emitting chip 200, the present embodiment adopts a method of forming a patterned structure at the bottom of each recess, where the patterned structure is the first sacrificial layer 122, and after the first sacrificial layer 122 is removed, the patterned structure can be exposed.
As an implementation manner of the present embodiment, the patterned installation portion 221 is a patterned hollow, but in other embodiments, the installation portion may also be in other forms, such as a groove, which is not limited in this embodiment. In the manufacturing process, a first sacrificial layer 122 is formed at the bottom of each recess, wherein the first sacrificial layer 122 is a layer that can be removed by chemical or other methods when the light emitting chip 200 is peeled off from the second substrate 121. After the first sacrificial layer 122 is removed, a corresponding patterned mounting portion 221 may be formed at the bottom of the light emitting device.
The patterned structure in the recess comprises a cylinder, a cone, a cuboid, a cube and a deformation body thereof; the patterned structure in the groove may be formed by depositing the material of the first sacrificial layer 122 and then etching, or may be formed by directly etching the second substrate 121. That is, in the present embodiment, the structure of the first sacrificial layer 122 includes a cylinder, a cone, a rectangular parallelepiped, a cube, and a variation thereof.
S1023, based on the second sacrificial layer 123 deposited on the target side of the second substrate 121.
In order to more efficiently peel off the light emitting chip 200 from the second substrate 121 after bonding, the present embodiment further provides a second sacrificial layer 123, wherein a material for manufacturing the second sacrificial layer 123 may be the same as or different from a material for manufacturing the first sacrificial layer 122, which is not limited in this embodiment.
Meanwhile, the second sacrificial layer 123 covers the second substrate 121 and the first sacrificial layer 122, for example, the second sacrificial layer 123 is grown on the target side of the second substrate 121 by epitaxial deposition, so that after the light emitting chip 200 is manufactured, the light emitting chip 200 can be stripped from the second substrate 121 after the second sacrificial layer 123 is removed.
S1024, a conductive layer is fabricated based on the target side of the second sacrificial layer 123.
Wherein the conductive layer comprises a first metal layer 124 and a second metal layer 125, and the first metal layer 124 is first deposited in each recess and the second metal layer 125 is deposited on the target side, wherein the second metal layer 125 is used for bonding with the patterned luminescent layer 110.
It should be noted that, in this embodiment, after the second sacrificial layer 123 is fabricated, the second substrate 121 still includes a plurality of recesses, so that the first metal layer 124 can be fabricated in each recess by deposition, where the first metal layer 124 is used as a layer to be soldered to the target overtime after the light emitting chip 200 is fabricated. Meanwhile, the height of the first metal layer 124 is lower than that of the top of the second sacrificial layer 123.
S103, bonding the light emitting layer 210 with the patterned bonding layer 120 to form a plurality of light emitting chips 200 on one side of the second substrate 121.
Referring to fig. 7 and 8, after the patterned light emitting layer 110 and the patterned bonding layer 120 are formed, the patterned light emitting layer and the patterned bonding layer may be bonded to form a plurality of light emitting chips 200 arranged in an array. One side of each light emitting chip 200 is a first substrate 111, and the other side of each light emitting chip 200 is a second substrate 121.
In this step, the plurality of light emitting chips 200 are connected to each other to form a single body.
S104, the first substrate 111 is peeled.
In this embodiment, the method for removing the first substrate 111 may be laser lift-off, wet etching, or dry etching.
S105, the patterned light emitting layer 110 is etched to form a plurality of independent light emitting layers 210.
In order to make each light emitting chip 200 independent, the light emitting layer 210 needs to be etched, wherein the etching is performed according to a set pattern, thereby forming a plurality of independent light emitting chips 200. In this embodiment, the N-type semiconductor, the quantum well, and the P-type semiconductor on the second substrate 121 are etched directly until the sacrificial layer on the second substrate 121 is exposed, so as to form a plurality of independent light emitting chips 200.
It should be noted that, as another implementation manner of the embodiment, an etching operation may also be performed before step S103 to form a plurality of independent light emitting layers 210. Meanwhile, when the patterned light emitting layer 110 and the patterned bonding layer 120 are bonded, each of the independent light emitting layers 210 is substantially bonded to the patterned bonding layer 120, so as to form a plurality of independent light emitting chips 200.
And S106, manufacturing an N-type semiconductor ohmic contact electrode on the N-type semiconductor.
The metal which forms ohmic contact with the N-type semiconductor is of an annular structure, most of the N-type semiconductor in the middle is exposed for light emitting, or a transparent conductive material is adopted as an ohmic contact electrode, and photons generated by the light emitting diode can be emitted through the ohmic contact electrode.
And S107, manufacturing a passivation layer to wrap the side wall of the etched and exposed multilayer semiconductor layer and part of the N-type semiconductor contact electrode, and exposing part of the N-type semiconductor contact electrode.
S108, removing part of the sacrificial layer structure of the second substrate 121, making an anchor structure temporarily and fixedly connected to the light emitting chip 200, and removing all the sacrificial layers, wherein the light emitting chip 200 device structure is released from the second substrate 121 and temporarily fixed on the second substrate 121 by the anchor structure, thereby forming an array of light emitting chips 200 transferred to a receiving substrate.
S109, the micro leds on the transfer substrate 140 are transferred to a receiving substrate to assemble a self-emitting display device or a light emitting array.
The embodiment transfers the light emitting chips 200 to the receiving substrate by using a transfer substrate 140, wherein when the array of light emitting chips 200 transferred to the receiving substrate is transferred by using the transfer substrate 140, the array of light emitting chips 200 can be one or more at a time, a plurality of the arrays can be continuous, or a plurality of the arrays can be selectively transferred to the receiving substrate in a regular arrangement, so as to assemble the self-luminous display device or form the light emitting array.
Meanwhile, in the present embodiment, the light emitting chips 200 are peeled off by using a transfer substrate 140, wherein the light emitted by the light emitting chips 200 on the same second substrate 121 is uniform because the materials of the manufactured light emitting chips 200 are uniform. In order to fabricate the micro led array, the red, green and blue light emitting chips 200 are required, so that in the present embodiment, the transfer substrate 140 is used to strip part or all of the light emitting chips 200, so that the distance between adjacent light emitting chips 200 on the transfer substrate 140 is relatively large, and the light emitting chips 200 of other colors can be continuously stripped through the transfer substrate 140, thereby fabricating the three-color micro led array.
Second embodiment
Referring to fig. 5, an embodiment of the invention provides a bonding substrate, including: a plurality of patterned second bonding metal layers; one side of the second bonding metal layer comprises a welding metal layer with a pattern structure; and a sacrificial layer located on one side of the weld metal structure; the welding metal layer of the pattern structure comprises a hollow cylinder, a cone, a cuboid, a cube and a deformation body thereof; the bonding substrate and the first substrate 111 may be used to pattern a first bonding metal layer to perform the fabrication of the micro led array of the first embodiment.
Specifically, the sacrificial layer includes a first sacrificial layer 122 and a second sacrificial layer 123, the second substrate 121 is provided with a plurality of recesses arranged in an array, each first sacrificial layer 122 is disposed at the bottom of each recess, and the second sacrificial layer 123 covers the second substrate 121 and the first sacrificial layer 122. And the structure of the first sacrificial layer 122 includes, but is not limited to, a rectangular parallelepiped shape, a triangular pyramid shape, and a cylindrical shape.
Through the bonding substrate provided by the embodiment, the bottom of each micro light emitting diode chip structure of the light emitting array manufactured by the flip-chip process is provided with a cavity, so that the welding process can be realized more conveniently.
Third embodiment
Referring to fig. 9, an embodiment of the present invention provides a micro light emitting diode chip structure, which includes an N-type semiconductor, a quantum well, and a PN junction formed by a P-type semiconductor epitaxially grown on a first substrate 111, a transparent conductive layer 113 on one side of the surface of the P-type semiconductor, a reflective metal layer, a barrier metal layer, and a bonding metal layer, and a patterned metal layer disposed on one side of the bonding metal layer away from the P-type semiconductor for solder assembly to achieve electrical interconnection.
Wherein the lateral dimension of the N-type semiconductor is smaller than that of the P-type semiconductor, the lateral dimension of the transparent conductive layer 113 is smaller than that of the reflective metal layer, the lateral dimension of the reflective metal layer is smaller than that of the barrier metal layer, and the lateral dimension of the reflective metal layer is smaller than that of the bonding metal layer.
The N-type semiconductor, the quantum well, the side wall exposed by the etching of the P-type semiconductor and part of the N-type semiconductor layer are wrapped and protected by the insulating passivation layer.
Wherein the welding metal layer bottom contains the patterning structure, and the pattern includes hollow cylinder, cone, cuboid, square and the deformation.
Wherein the structure size of the single light emitting chip 200 is 1-100 μm.
In summary, the present invention provides a method for fabricating a micro light emitting diode array, which includes fabricating a patterned light emitting layer on a side of a first substrate, fabricating a patterned bonding layer corresponding to the patterned light emitting layer on a side of a second substrate, wherein the patterned bonding layer includes a sacrificial layer, bonding the patterned light emitting layer and the patterned bonding layer to form a plurality of light emitting chips on the side of the second substrate, and removing the sacrificial layer and stripping part or all of the light emitting chips by using a transfer substrate. The method for manufacturing the micro light-emitting diode array adopts a flip-chip mode to manufacture the micro light-emitting diode array, and the light-emitting chip can be arranged on the target substrate through a transfer polar plate, so that the assembly can be carried out more efficiently. Meanwhile, the light-emitting chip can be stripped in a mode of directly removing the sacrificial layer, so that the processing process is more efficient.
The invention also provides a bonded substrate which comprises a second substrate and a patterned bonding layer positioned on one side of the second substrate, wherein the patterned bonding layer comprises a sacrificial layer. The light-emitting chip can be stripped in a mode of directly removing the sacrificial layer, so that the processing process is more efficient.
The invention also provides a light-emitting chip which comprises a light-emitting layer and a bonding layer connected with the light-emitting layer, wherein a patterned installation part is arranged on one side of the bonding layer, which is far away from the light-emitting layer. Through the mode that sets up the patterning installation department, can be when installing luminous chip on the target substrate, the welding process that carries on more convenient to make its installation more high-efficient.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
Claims (5)
1. A method for manufacturing a micro light emitting diode array is characterized by comprising the following steps:
manufacturing a patterned light emitting layer based on one side of a first substrate;
manufacturing a patterned bonding layer corresponding to the patterned light emitting layer based on one side of a second substrate, wherein the patterned bonding layer comprises a sacrificial layer;
bonding the patterned light emitting layer and the patterned bonding layer to form a plurality of light emitting chips on one side of the second substrate;
removing the sacrificial layer, and stripping part or all of the light-emitting chips by using a transfer substrate;
mounting the light emitting chips on the transfer substrate on a target substrate to form a micro light emitting diode array; wherein,
the sacrificial layer comprises a first sacrificial layer and a second sacrificial layer, and the step of manufacturing the patterned bonding layer corresponding to the patterned light-emitting layer on the basis of one side of the second substrate comprises the following steps of:
patterning a target side of the second substrate to form a plurality of recesses in the target side of the second substrate;
manufacturing a first sacrificial layer at the bottom of each recess;
depositing the second sacrificial layer based on a target side of the second substrate;
manufacturing a conductive layer based on the target side of the second sacrificial layer;
the step of fabricating a conductive layer based on the target side of the second sacrificial layer comprises:
depositing a first metal layer within each of the recesses;
depositing a second metal layer based on the target side of the first metal layer, wherein the second metal layer is for bonding with the patterned light emitting layer.
2. The method of claim 1, wherein the first sacrificial layer has a structure selected from the group consisting of a rectangular parallelepiped shape, a triangular pyramid shape, and a cylindrical shape.
3. The method of claim 1, wherein after the step of bonding the patterned light emitting layer to the patterned bonding layer, the method further comprises:
stripping the first substrate from the patterned light emitting layer;
and etching the patterned light-emitting layer to form a plurality of independent light-emitting chips.
4. The method of claim 1, wherein prior to the step of bonding the patterned light emitting layer to the patterned bonding layer, the method further comprises:
etching the patterned light emitting layer to form a plurality of independent light emitting layers;
the step of bonding the patterned light emitting layer and the patterned bonding layer comprises:
and bonding each light emitting layer to the patterned bonding layer to form a plurality of independent light emitting chips.
5. The method of claim 1, wherein the step of forming a patterned light emitting layer on the side of the first substrate comprises:
epitaxially growing an N-type semiconductor layer, a quantum well layer and a P-type semiconductor layer in sequence on the basis of one side of the first substrate;
manufacturing a patterned transparent conducting layer on the basis of one side of the P-type semiconductor layer, which is far away from the first substrate;
and manufacturing a reflective metal layer, a barrier metal layer and a first bonding metal layer on the basis of one side of the patterned transparent conductive layer, which is far away from the first substrate.
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| CN112582522A (en) * | 2019-09-30 | 2021-03-30 | 成都辰显光电有限公司 | Micro light emitting diode chip and manufacturing method thereof |
| CN111048634B (en) * | 2019-12-26 | 2021-11-23 | 重庆康佳光电技术研究院有限公司 | Micro LED transferring method and backboard |
| CN111725197B (en) * | 2020-06-30 | 2022-06-03 | 上海天马微电子有限公司 | Micro light-emitting diode substrate and manufacturing method thereof, and display panel and manufacturing method thereof |
| CN114141804B (en) * | 2021-11-23 | 2023-05-02 | 深圳市华星光电半导体显示技术有限公司 | Light emitting diode transfer method, light emitting substrate and display panel |
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Address after: 510651 No. 363, Changxin Road, Guangzhou, Guangdong, Tianhe District Patentee after: Institute of semiconductors, Guangdong Academy of Sciences Address before: 510000 363 Changxin Road, Tianhe District, Guangzhou, Guangdong. Patentee before: GUANGDONG INSTITUTE OF SEMICONDUCTOR INDUSTRIAL TECHNOLOGY |