CN109860299A - A kind of MOS device and preparation method thereof - Google Patents
A kind of MOS device and preparation method thereof Download PDFInfo
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- CN109860299A CN109860299A CN201811556562.9A CN201811556562A CN109860299A CN 109860299 A CN109860299 A CN 109860299A CN 201811556562 A CN201811556562 A CN 201811556562A CN 109860299 A CN109860299 A CN 109860299A
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Abstract
The present invention provides a kind of MOS devices and preparation method thereof, the MOS device includes: substrate, control grid structure and insulating layer, wherein, control grid structure is formed in the surface of silicon chip substrate, insulating layer is formed in a control side surface of the grid structure far from substrate, insulating layer includes at least silicon oxynitride layer, and the extinction coefficient of silicon oxynitride layer is greater than 0.7.The conducting power of the plasma of silicon oxynitride layer provided in this embodiment and the ability for resisting plasma attack are stronger, therefore, the impact that high-density plasma can be resisted avoids plasma and contact polysilicon contact, and then has ensured the reliability of metal-oxide-semiconductor.
Description
Technical field
The present invention relates to semiconductor devices manufacture technology fields more particularly to a kind of MOS device and preparation method thereof.
Background technique
In the manufacturing process of MOS device, it will usually use HDP (high density polyethylene, high density
Polyethylene) carry out insulating medium layer filling.And before carrying out HDP filling, it will usually use chemical gas in control grid structure
The mutually mode of deposition, depositing silicon oxy-nitride and silicon nitride are as barrier layer and the insulating layer of high dielectric constant.
However, high-density plasma can bombard insulating layer, and then etch away nitrogen oxygen during HDP is filled
SiClx and silicon nitride, so that plasma directly contacts polysilicon.Also, high-density plasma is in the mistake for passing through polysilicon
Cheng Zhonghui causes to damage to the grid oxygen for being located at polysilicon lower layer, and then reduces the reliability of MOS device.
Therefore, how a kind of MOS device and preparation method thereof is provided, can be improved the reliability of MOS device, be this field
Technical staff's big technical problem urgently to be resolved.
Summary of the invention
In view of this, the present invention provides a kind of MOS device and preparation method thereof, the reliability of MOS device is improved.
To achieve the above object, the invention provides the following technical scheme:
A kind of MOS device, comprising:
Substrate；
Grid structure is controlled, the control grid structure is formed in the side of silicon chip substrate；
Insulating layer, is formed in a control side surface of the grid structure far from the substrate, and the insulating layer includes at least
The extinction coefficient of silicon oxynitride layer, the silicon oxynitride layer is greater than 0.7.
It optionally, further include the first separation layer between the control grid structure and the insulating layer；
First separation layer includes the first silicon oxide layer, silicon nitride layer and the second silicon oxide layer.
Optionally, the insulating layer further includes silicon nitride layer；
Side of the silicon oxynitride layer far from the control grid structure is arranged in the silicon nitride layer.
Optionally, further includes:
Tunnel oxide, the tunnel oxide are formed in the surface of silicon chip substrate；
Side of the tunnel oxide far from the substrate is arranged in floating gate, the floating gate；
Side of the floating gate far from the tunnel oxide is arranged in ONO layer, the ONO layer；
The control gate structure setting is in side of the ONO layer far from the floating gate.
A kind of production method of MOS device is applied to MOS device, comprising:
Multiple control grid structures are formed on the substrate；
It is more than or equal to 0.53 in the gas volume ratio that the surface of the control grid structure is passed through silane and nitrous oxide
Mixed gas, generate extinction coefficient be greater than 0.7 silicon oxynitride layer.
Optionally, it is described multiple control grid structures are formed on the substrate after, further includes:
The nitrous oxide of preset vol flow is passed through on the surface of the control grid structure.
Optionally, the preset vol flow is 720sccm.
Optionally, it is described multiple control grid structures are formed on the substrate after, further includes:
The first silicon oxide layer is formed in the side of the control grid structure；
Silicon nitride layer is formed far from the side of the control grid structure in first silicon oxide layer；
The second silicon oxide layer is formed far from the side of first silicon oxide layer in the silicon nitride layer.
Optionally, further includes:
Silicon nitride layer is formed far from the side of the control grid structure in the silicon oxynitride layer.
Optionally, it is described multiple control grid structures are formed on the substrate before, further includes:
Tunnel oxide is formed on the surface of silicon chip substrate；
Floating gate is formed far from the side of the substrate in the tunnel oxide；
ONO layer is formed far from the side of the tunnel oxide in the floating gate；
The control grid structure is formed far from the side of the floating gate in the ONO layer.
A kind of electronic equipment, including MOS device described in any one.
It can be seen via above technical scheme that the present invention provides a kind of MOS devices, comprising: substrate, control grid structure with
And insulating layer, wherein control grid structure is formed in the surface of silicon chip substrate, and insulating layer is formed in control grid structure far from substrate
One side surface, insulating layer include at least silicon oxynitride layer, and the extinction coefficient of silicon oxynitride layer is greater than 0.7.It is provided in this embodiment
The conducting power of the plasma of silicon oxynitride layer and the ability for resisting plasma attack are stronger, therefore, can resist height
The impact of density plasma avoids plasma and contact polysilicon contact, and then has ensured the reliability of metal-oxide-semiconductor.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is the structural schematic diagram of the control gate after being impacted in the prior art by plasma；
Fig. 2 is a kind of structural schematic diagram of MOS device provided in an embodiment of the present invention；
Fig. 3 is the relation schematic diagram of extinction coefficient EC and grid current Ig；
Fig. 4 is the comparative result figure of ion dam age PID (plasma induce damage) test；
Fig. 5 is that the embodiment of the invention provides a kind of flow diagrams of the production method of MOS device；
Fig. 6 is that the embodiment of the invention provides a kind of another flow diagrams of the production method of MOS device；
Fig. 7 is a kind of another structural schematic diagram of MOS device provided in an embodiment of the present invention；
Fig. 8 is that the embodiment of the invention provides a kind of another flow diagrams of the production method of MOS device；
Fig. 9 is that the embodiment of the invention provides a kind of another flow diagrams of the production method of MOS device；
Figure 10 is a kind of another structural schematic diagram of MOS device provided in an embodiment of the present invention.
Specific embodiment
Just as described in the background section, during HDP filling, high-density plasma can bang insulating layer
It hits, and then etches away silicon oxynitride and silicon nitride, so that plasma directly contacts polysilicon, as shown in Figure 1.Also, it is high
Density plasma can cause to damage during passing through polysilicon to the grid oxygen for being located at polysilicon lower layer, and then reduce MOS
The reliability of device.
Therefore, in order to avoid high-density plasma makes the grid oxygen for being located at polysilicon lower layer in the process for passing through polysilicon
At damage, the thickness for the insulating layer that can be formed by thickening silicon oxynitride and silicon nitride, to resist high-density plasma
Bombardment, however, the thickness increase of insulating layer will lead to the spacing between control gate and control gate reduction so that adjacent control
The depth-to-width ratio of groove to be filled between grid processed becomes larger.When carrying out HDP filling, the biggish groove of depth-to-width ratio is easy to produce sky
Short circuit is caused, and then damage metal-oxide-semiconductor so that being connected between contact hole in hole.
In view of this, the present invention provides a kind of MOS device and preparation method thereof, will not both increase between adjacent control gates
The depth-to-width ratio of groove, and the reliability of MOS device can be improved.
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Fig. 2 is referred to, Fig. 2 is a kind of structural schematic diagram of MOS device provided in an embodiment of the present invention, the MOS device packet
It includes: control grid structure 21 and insulating layer 22.
Wherein, control grid structure 21 is formed in silicon chip substrate 20 by the techniques such as etching and deposition, in control grid structure
21 side surfaces far from substrate 20 form insulating layer 22, which includes at least silicon oxynitride layer 221, the nitrogen oxidation
The extinction coefficient of silicon layer 221 be greater than 0.7, such as extinction coefficient can be 0.704 or 0.710, certainly can also for greater than
0.7 any number.
In general, the plasma of breakdown is more, the grid current Ig of the control gate is bigger, therefore, can pass through detection
The size of grid current Ig punctures situation to detect the plasma of control gate.It is extinction coefficient EC and grid in conjunction with Fig. 3, Fig. 3
The relation schematic diagram of electric current Ig.It is found that the extinction coefficient EC of silicon oxynitride layer is bigger, then grid current Ig is smaller.Therefore when this
When the extinction coefficient of silicon oxynitride layer 221 in embodiment is greater than 0.7, grid current Ig is controlled in the range of a very little
Plasma negligible amounts that are interior, that is, puncturing.
Except this, as shown in figure 4, the present embodiment additionally provides the ion dam age PID of this MOS device Yu existing MOS device
(plasma induce damage) test result comparison diagram.Wherein, the point of diamond shape is in Standardization Process (BL, base
Line the cumulative distribution situation of the plasma of the MOS device prepared under), square point are to hold in the technique that this programme provides
The cumulative distribution feelings of the continuous plasma for improving the MOS device prepared under (CIP, continuous improve process)
Condition.
From the figure not difficult to find, as the content of plasma is more and more, the MOS device of the prior art (BL) preparation
Grid current significantly increases.In conjunction with described above, grid current is incrementally increased, and the plasma quantity for characterizing breakdown also persistently increases
It is more.
And the grid current of the MOS device of this programme (CIP) preparation remains basic as the content of plasma increases
Constant, grid current remains unchanged substantially.Similarly, grid current Ig is controlled in the range of a very little, that is, puncture etc.
Gas ions negligible amounts.
To sum up, when the extinction coefficient EC of silicon oxynitride layer is greater than 0.7, the conduction of the silicon oxynitride layer and high density is kept out
The ability of plasma enhances, and then during HDP filling, even if high-density plasma can bang insulating layer
Hit, but, the silicon oxynitride layer in the present embodiment can resist the impact of high-density plasma, avoid plasma with contact it is more
Crystal silicon contact, and then ensured the reliability of metal-oxide-semiconductor.
Specifically, including that extinction coefficient is big to be formed the embodiment of the invention also provides a kind of production method of MOS device
In the MOS device of 0.7 silicon oxynitride layer, in conjunction with Fig. 5, the production method comprising steps of
S31, multiple control grid structures are formed on the substrate；
S32, the nitrous oxide of preset vol flow is passed through on the surface of the control grid structure；
S33, it is more than or equal in the gas volume ratio that the surface of the control grid structure is passed through silane and nitrous oxide
0.53 mixed gas generates the silicon oxynitride layer that extinction coefficient is greater than 0.7.
The height of extinction coefficient will have a direct impact on the electric conductivity of silicon oxynitride, and lower extinction coefficient can make plasma
It is not easy to be guided, and then a large amount of plasma can be deposited in polysilicon, it, can be to positioned at polycrystalline when it penetrates polysilicon
The grid oxygen of silicon lower layer causes to damage.Specifically, the present embodiment is passed through preset vol flow on the surface of control grid structure first
The cavity of reaction chamber is cleaned in nitrous oxide, realization.Wherein, preset vol process can be 720sccm, may be used also certainly
Think the arbitrary gas flow greater than 720sccm.
After being cleaned to cavity, the intracorporal nitrous oxide of chamber can be siphoned away, by the modes such as vacuumizing to guarantee
The intracorporal residual gas of chamber will not impact subsequent gas reaction.It is then passed through silane and an oxidation two in the cavity
The gas volume of nitrogen is than the mixed gas more than or equal to 0.53, after silane is reacted with nitrous oxide, in control grid structure
Surface Creation extinction coefficient be greater than 0.7 silicon oxynitride layer.
In addition, step S32 can selectively be carried out according to the actual conditions of reaction environment, if reaction environment can reach clean
Degree requires then without step 32.
As shown in Fig. 3, the conducting power of the plasma of silicon oxynitride layer of the extinction coefficient greater than 0.7 and resistance etc.
The ability of gas ions impact is stronger, can control grid current below a lower horizontal line.
It should be noted that in conjunction with Fig. 2, before multiple control grid structures can also be formed on the substrate in the present embodiment,
Tunnel oxide, floating gate and ONO layer are formed on the substrate first, then forms control gate on ONO layer.It specifically can be with
It is set according to actual design requirement, in the present embodiment, is not limited and how to form control grid structure.
On the basis of the above embodiments, the present embodiment additionally provides a kind of specific structure of MOS device, as shown in Fig. 2,
It is provided with the first separation layer 23 between control grid structure 21 and insulating layer 22, which includes the first silicon oxide layer
231, silicon nitride layer 232 and the second silicon oxide layer 233.
Specifically, the embodiment of the invention provides the production methods of above-mentioned MOS device, in step S31: serving as a contrast in conjunction with Fig. 6
Multiple control grid structures are formed on bottom, later, further includes:
S41, the first silicon oxide layer is formed in the side of the control grid structure；
S42, silicon nitride layer is formed far from the side of the control grid structure in first silicon oxide layer；
S43, the second silicon oxide layer is formed far from the side of first silicon oxide layer in the silicon nitride layer.
And after step S43, step S32 is executed: being passed through preset vol flow on the surface of the control grid structure
Nitrous oxide, specifically: preset vol flow is passed through far from the side of the silicon nitride layer in second silicon oxide layer
Nitrous oxide.
After step S32 execution, step S33 is executed: being passed through silane and an oxygen on the surface of the control grid structure
Change the gas volume of phenodiazine than the mixed gas more than or equal to 0.53, generates the silicon oxynitride layer that extinction coefficient is greater than 0.7.
As it can be seen that the present embodiment is in the nitrous oxide for being passed through preset vol flow, after cleaning to cavity, the present embodiment
It is passed through the gas volume of silane and nitrous oxide in the cavity than the mixed gas more than or equal to 0.53, silane and an oxidation
After phenodiazine is reacted, it is greater than 0.7 silicon oxynitride layer in the Surface Creation extinction coefficient of control grid structure.
As mentioned previously, firstly, extinction coefficient greater than 0.7 silicon oxynitride layer plasma conducting power and
The ability enhancing for resisting plasma attack, secondly, embodiment adds the first separation layers, even if plasma etching falls nitrogen
Silica, it is also necessary to etch away the first separation layer, ability and polysilicon contact.Therefore, plasma is added somewhat to
Impact difficulty between polysilicon, and then improve the reliability of MOS device.
On the basis of the above embodiments, the present embodiment additionally provides a kind of specific structure of MOS device, as shown in fig. 7,
Wherein insulating layer 22 further includes silicon nitride layer 222.The silicon nitride layer 222 setting is in silicon oxynitride layer 221 far from control grid structure
21 side.
Specifically, the embodiment of the invention provides the production method of above-mentioned MOS device, in step S33: in the control gate
The surface of structure is passed through the gas volume of silane and nitrous oxide than the mixed gas more than or equal to 0.53, generates delustring system
Number is greater than 0.7 silicon oxynitride layer, later further include:
S61, silicon nitride layer is formed far from the side of the control grid structure in the silicon oxynitride layer.
It should be noted that in the present embodiment, step S61 is arranged after step S33, but do not limit step S33
Before the step of, for example, as shown in figure 8, step can be executed after the completion of step S31, step S32 and step S33 are executed
S61.Can with as shown in figure 9, after step S31 execute step S41, step S42, step S43, formed the first separation layer
Afterwards, then step S32 and step S33 is executed, executes step S61 again later.
In summary multiple control grid structures are formed on the substrate in step, the present embodiment first, wherein step shown in Fig. 9
Suddenly the control gate formed includes the first separation layer, and an oxidation two of preset vol flow is then passed through on the surface of control grid structure
Nitrogen cleans the cavity of reaction chamber, is then passed through silane and nitrous oxide on the surface of the control grid structure
Gas volume generates the silicon oxynitride layer that extinction coefficient is greater than 0.7 than the mixed gas more than or equal to 0.53.Later, in nitrogen oxygen
The side far from the control grid structure of SiClx layer forms silicon nitride layer.
Wherein, silicon oxynitride layer and silicon nitride layer be as the barrier layer of MOS device and the insulating layer of high dielectric constant,
And then it can further keep out the impact of high-density plasma.
On the basis of the above embodiments, as shown in Figure 10, the present embodiment additionally provides a kind of specific knot of MOS device
Structure, wherein the surface deposition oxide 71 of insulating layer 22, realizes the further filling to MOS device.Wherein, oxide 71 can be with
For HDP.
On the basis of the above embodiments, the present embodiment additionally provides a kind of electronic equipment comprising in above-described embodiment
MOS device, what working principle referred to above-mentioned MOS device is embodiment, herein not repeated description.
To sum up, the present invention provides a kind of MOS device and preparation method thereof, which includes: substrate, control gate knot
Structure and insulating layer, wherein control grid structure is formed in the surface of silicon chip substrate, and insulating layer is formed in control grid structure far from lining
One side surface at bottom, insulating layer include at least silicon oxynitride layer, and the extinction coefficient of silicon oxynitride layer is greater than 0.7.The present embodiment mentions
The conducting power of the plasma of the silicon oxynitride layer of confession and the ability for resisting plasma attack are stronger, therefore, can support
The impact of anti-high-density plasma avoids plasma and contact polysilicon contact, and then has ensured the reliability of metal-oxide-semiconductor.
It should be noted that all the embodiments in this specification are described in a progressive manner, each embodiment weight
Point explanation is the difference from other embodiments, and the same or similar parts between the embodiments can be referred to each other.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest scope of cause.
Claims (10)
1. a kind of MOS device characterized by comprising
Substrate；
Grid structure is controlled, the control grid structure is formed in the side of silicon chip substrate；
Insulating layer, is formed in a control side surface of the grid structure far from the substrate, and the insulating layer includes at least nitrogen oxygen
The extinction coefficient of SiClx layer, the silicon oxynitride layer is greater than 0.7.
2. MOS device according to claim 1, which is characterized in that between the control grid structure and the insulating layer
It further include the first separation layer；
First separation layer includes the first silicon oxide layer, silicon nitride layer and the second silicon oxide layer.
3. MOS device according to claim 1 or 2, which is characterized in that the insulating layer further includes silicon nitride layer；
Side of the silicon oxynitride layer far from the control grid structure is arranged in the silicon nitride layer.
4. MOS device according to claim 1, which is characterized in that further include:
Tunnel oxide, the tunnel oxide are formed in the surface of silicon chip substrate；
Side of the tunnel oxide far from the substrate is arranged in floating gate, the floating gate；
Side of the floating gate far from the tunnel oxide is arranged in ONO layer, the ONO layer；
The control gate structure setting is in side of the ONO layer far from the floating gate.
5. a kind of production method of MOS device, which is characterized in that be applied to MOS device, comprising:
Multiple control grid structures are formed on the substrate；
The gas volume of silane and nitrous oxide is passed through than mixed more than or equal to 0.53 on the surface of the control grid structure
Gas is closed, the silicon oxynitride layer that extinction coefficient is greater than 0.7 is generated.
6. the production method of MOS device according to claim 5, which is characterized in that it is described be formed on the substrate it is multiple
After control grid structure, further includes:
The nitrous oxide of preset vol flow is passed through on the surface of the control grid structure.
7. the production method of MOS device according to claim 5, which is characterized in that it is described be formed on the substrate it is multiple
After controlling grid structure, further includes:
The first silicon oxide layer is formed in the side of the control grid structure；
Silicon nitride layer is formed far from the side of the control grid structure in first silicon oxide layer；
The second silicon oxide layer is formed far from the side of first silicon oxide layer in the silicon nitride layer.
8. the production method of MOS device according to claim 7, which is characterized in that further include:
Silicon nitride layer is formed far from the side of the control grid structure in the silicon oxynitride layer.
9. the production method of MOS device according to claim 5, which is characterized in that it is described be formed on the substrate it is multiple
Before control grid structure, further includes:
Tunnel oxide is formed on the surface of silicon chip substrate；
Floating gate is formed far from the side of the substrate in the tunnel oxide；
ONO layer is formed far from the side of the tunnel oxide in the floating gate；
The control grid structure is formed far from the side of the floating gate in the ONO layer.
10. a kind of electronic equipment, which is characterized in that including the MOS device as described in any one of claim 1-4.
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Cited By (1)
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| CN110459462A (en) * | 2019-08-08 | 2019-11-15 | 武汉新芯集成电路制造有限公司 | The forming method of semiconductor devices |
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Application publication date: 20190607 |