CN109828872A - Signal-testing apparatus and method - Google Patents
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Abstract
The present invention provides signal-testing apparatus and methods.Signal-testing apparatus includes: impulse circuit, generates the first differential reference pulse signal and the first differential reference pulse signal is supplied to CPU so that the CPU provides the PCIe differential signal with different rates via MEZZ connector；And multiple SMP connectors, the PCIe differential signal is received from the MEZZ connector to be supplied to detection device.The signal-testing apparatus can be realized the PCIe signal testing to MEZZ connector interface, solve the problems, such as that existing standard CLB test fixture is unable to test nonstandard connector.
Description
Technical field
This invention relates generally to field of computer technology, more specifically, signal-testing apparatus and method.
Background technique
MEZZ connector is the array connector of a kind of high density, high-speed, and message transmission rate can reach
10Gbps or more.The plate for being mainly used for the high-speed links such as server, high-performance computer, storage, interchanger connects and expands to plate
Zhan Zhong.This connector be designed as a variety of stack height and circuit board size extension provide flexible layout type.It
Using can be convenient circuit board trace and will not influence performance, and can be onboard more efficient using empty in limited region
Between, promote tidiness and aesthetics.
However, signal pin density is larger, and the jack of connector generally can on plate since MEZZ connector is array arrangement
It is designed using back drill.If in such a way that probe points are surveyed or other modes tested it is all more difficult, and the accuracy tested and
Precision is all unable to get effective guarantee, comes to high speed signal calibration tape greatly difficult.
In the measuring signal integrality of existing computer system, test for PCIe signal is generally assisted using PCI-SIG
The standard PCIe test fixture and general test method that can be provided.It is tested such as standard PCIe Slot on main board system
CLB jig, and the CBB jig for standard PCIe device (all kinds of PCIe mark card) test.This kind of jig can satisfy greatly
The testing requirement of the signal of most PCIe connectors.Test method is: referring to Fig.1, drawing tested letter by test fixture first
Number high-speed sampling oscillograph is arrived, then oscillograph acquires a certain number of data test signals, finally utilizes signal analysis software
Sigtest analysis data obtain test result, and provide the judge whether TX signal meets association criterion.PCIe on main board system
In slot test, the connection of PCIe transmitting terminal signal testing physical link.
Because the PCIe Slot test fixture that PCI-SIG association provides only has tetra- kinds of X1, X4, X8 and X16 rule of standard
Lattice, the Lane of golden finger, which is defined, on jig is completely fixed.It is if nonstandard Slot, i.e., enabled to plug, corresponding high speed
Lane will not be corresponded to completely, so being unable to normal use；If the high speed connector interface as MEZZ, even more can not
To inserting, it cannot be applied in this test completely.So problem of the existing technology is: being only used for standard PCIe Slot
Test, is not available nonstandard Slot or other kinds of connector.
Summary of the invention
The present invention is not used to test MEZZ connector for the PCIe Slot test fixture in the presence of the prior art
The defects of PCIe X16 signal, provides a kind of signal-testing apparatus and method for being able to solve the above problem.
According to an aspect of the present invention, a kind of signal-testing apparatus is provided, comprising: impulse circuit generates the first difference
The first differential reference pulse signal is simultaneously supplied to CPU so that the CPU is mentioned via MEZZ connector by reference burst signal
For the PCIe differential signal with different rates；And multiple SMP connectors, the PCIe difference is received from the MEZZ connector
Signal is to be supplied to detection device.
Preferably, the impulse circuit, comprising: impulse generator, for generating original burst signal；Phase inverter is used for
Make the original burst signal reverse phase；And reference pulse circuit, for receiving the original burst signal of reverse phase, described in generating
First differential reference pulse signal and the second differential reference pulse signal, wherein the second differential reference pulse signal provides
To the detection device.
Preferably, signal-testing apparatus further includes voltage conversion device, and the supply voltage of the signal-testing apparatus is turned
It is exchanged for the chip operating voltage of the impulse circuit.
Preferably, the voltage conversion device includes: converter, has the first input end for receiving the supply voltage
Son receives the second input terminal of ground voltage, and the output terminal of the output chip operating voltage, wherein will be described
Chip operating voltage is supplied to the impulse generator, the phase inverter and the reference pulse electricity of the impulse circuit
Road and multiple first capacitor devices, are connected in parallel between the first input end and second input terminal；And it is more
A second capacitor is connected in parallel between the output terminal and second input terminal.
Preferably, the different rates include first rate, the second rate and third speed, wherein first rate is
2.5GHz, the second rate is 5GHz and third speed is 8GHz.
Preferably, the first rate includes a kind of pattern, and second rate includes 2 kinds of patterns；And the third speed
Rate includes 11 kinds of patterns.
Preferably, the first differential reference pulse signal is 10ms pulse signal.
Preferably, the PCIe differential signal and described is received from the MEZZ connector by high-speed differential signal line
High-speed differential signal line makees equal length treatment.
Preferably, signal-testing apparatus further includes circuit board, and the MEZZ connector, described is provided on the circuit board
Impulse circuit, the multiple SMP connector and the voltage conversion device.
Preferably, the circuit board includes multilayer, wherein and high-speed differential signal line layer all has with reference to ground plane, and
And bus plane is opened by described with reference to ground plane spacings with the high-speed differential signal layer.
According to another aspect of the present invention, providing a kind of signal testing method includes: to generate the first differential reference pulse
Signal；The first differential reference pulse signal is supplied to CPU so that the CPU, which is provided, has difference via MEZZ connector
The PCIe differential signal of rate；And the PCIe differential signal is supplied to by multiple SMP connectors by the MEZZ connector.
Signal-testing apparatus provided by the present invention and method can be realized the PCIe signal survey to MEZZ connector interface
Examination, solves the problems, such as that existing standard CLB test fixture is unable to test nonstandard connector.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is this hair
Bright some embodiments for those of ordinary skill in the art without any creative labor, can be with
It obtains other drawings based on these drawings.
Fig. 1 is standard PCIe test fixture in the prior art；
Fig. 2 is the block diagram of the signal-testing apparatus with MEZZ connector of embodiment according to the present invention；
Fig. 3 is the structure chart of the signal-testing apparatus with MEZZ connector of embodiment according to the present invention；
Fig. 4 A to Fig. 4 C is impulse generator included in the impulse circuit of embodiment according to the present invention, reverse phase respectively
The circuit diagram of device, reference pulse circuit；
Fig. 5 A to Fig. 5 D is the supply voltage circuit of the signal-testing apparatus of embodiment according to the present invention, power supply electricity respectively
The circuit diagram of the filter circuit of pressure, the filter circuit of chip operating voltage and voltage conversion circuit；And
Fig. 6 is the flow chart of the signal testing method of embodiment according to the present invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without creative efforts, shall fall within the protection scope of the present invention.
Fig. 2 is the block diagram of the signal-testing apparatus with MEZZ connector of embodiment according to the present invention.Hereinafter, join
The signal-testing apparatus with MEZZ connector is described according to Fig. 2.
Referring to Fig. 2, the signal-testing apparatus 100 of embodiment according to the present invention, comprising: impulse circuit 106 generates first
First differential reference pulse signal is simultaneously supplied to CPU 102 so that CPU via MEZZ connector by differential reference pulse signal
102 provide the PCIe differential signal with different rates；And multiple SMP connectors 104, PCIe difference is received from MEZZ connector
Signal is to be supplied to detection device 108.In one embodiment, detection device may include oscillograph.Specifically, multiple SMP
Connector 104 is connected in MEZZ connector and detection device 108, will be provided from the received PCIe differential signal of MEZZ connector
Give detection device 108.
The signal-testing apparatus of embodiment according to the present invention can be realized the PCIe signal survey to MEZZ connector interface
Examination, solves the problems, such as that existing standard CLB test fixture is unable to test nonstandard connector.
Fig. 3 is the structure chart of the signal-testing apparatus with MEZZ connector of embodiment according to the present invention.Hereinafter,
Signal-testing apparatus will be described in detail referring to Fig. 3.
Referring to Fig. 3, the signal-testing apparatus 200 of embodiment according to the present invention includes: impulse circuit 212, generates first
Differential reference pulse signal PICe_REF_CLK and by the first differential reference pulse signal PICe_REF_CLK via first group of SMP
Connector 210 and MEZZ connector 202 are supplied to CPU so that CPU provides the PCIe differential signal with different rates, for example, choosing
The signal on path lane 0,4,7,8,12 and 15 is taken to be detected.In an alternative embodiment, it can be chosen according to user demand
Signal on other lane is detected.Therefore, which can also be referred to as rate switching switch.Specifically,
One differential reference pulse signal PICe_REF_CLK switches switch by rate and generates, and the first differential reference pulse signal is
10ms pulse signal.Different rates include first rate, the second rate and third speed, wherein first rate 2.5GHz, the
Two rates are 5GHz and third speed is 8GHz.Specifically, first rate includes a kind of pattern, and the second rate includes 2 kinds of codes
Type；And third speed includes 11 kinds of patterns (P0-P10).
Referring to Fig. 4 A to Fig. 4 C, impulse circuit 212 is described in detail.Impulse circuit 212 includes: impulse generator
402 (referring to Fig. 4 A) are for generating original burst signal LMC555_OUT；Phase inverter 404 (referring to Fig. 4 B), for making original arteries and veins
It rushes signal LMC555_OUT reverse phase and the original burst signal INV_OUT of reverse phase is provided；And 406 (reference of reference pulse circuit
Fig. 4 C), for receiving the original burst signal INV_OUT of reverse phase, to generate the first differential reference pulse signal PICe_REF_
CLKP, PICe_REF_CLKN (that is, corresponding with the first differential reference pulse signal PICe_REF_CLK in Fig. 2) and second
Differential reference pulse signal PICe_REF_CLKP_S, PICe_REF_CLKN_S, wherein the second differential reference pulse signal
PICe_REF_CLKP_S, PICe_REF_CLKN_S are supplied to detector via SMP connector (also known as third group SMP connector)
Part.In embodiment, first differential reference pulse signal PICe_REF_CLKP, PICe_REF_CLKN connects via first group of SMP
First 210 and MEZZ connector 202 be supplied to CPU, thus CPU be based on the first differential reference pulse signal PICe_REF_CLKP,
PICe_REF_CLKN provides the PCIe differential signal with first rate, the second rate and third speed in a circulating manner.It is more
A SMP connector 208 includes (also known as second group of SMP connector), is connected between MEZZ connector 202 and detection device, with
Detection device will be supplied to from the received PCIe differential signal of MEZZ connector 202.
Signal-testing apparatus 200 further includes voltage conversion device 206, and the supply voltage of signal-testing apparatus 200 is converted
(for example, 12V) is the chip operating voltage (for example, 3.3V) for impulse circuit, for example, the voltage 12V of power supply 204 is converted
For chip operating voltage (3.3).Fig. 5 A to 5D be the supply voltage circuit of signal-testing apparatus, supply voltage filter circuit,
The filter circuit of chip operating voltage and the circuit diagram of voltage conversion circuit.In one embodiment, Fig. 5 A is only capable of as electricity
Road plate provides the circuit diagram of 12V supply voltage (that is, power supply 502 of circuit board).Voltage conversion device 206 includes: converter
508, there is the first input end Vin for receiving supply voltage (for example, 12V), receive the second input terminal of ground voltage
The output terminal output2 of GND and pio chip operating voltage (for example, 3.3V), wherein chip operating voltage is provided
To the impulse generator 402 of impulse circuit, phase inverter 404 and reference pulse circuit 406 and multiple first capacitor devices 504
(referring to Fig. 5 B), is connected in parallel between first input end and the second input terminal, to be filtered to supply voltage；And
Multiple second capacitors 506 (referring to Fig. 5 C), are connected in parallel between output terminal and the second input terminal, to chip operation
Voltage is filtered.
In addition, receiving PCIe differential signal and high-speed differential signal line from MEZZ connector by high-speed differential signal line
Make equal length treatment.Signal-testing apparatus further includes circuit board, and MEZZ connector, impulse circuit, multiple SMP are provided on circuit board
Connector and voltage conversion device.Circuit board includes multilayer, wherein and high-speed differential signal line layer all has with reference to ground plane,
And bus plane is opened with high-speed differential signal layer by reference to ground plane spacings.
Hereinafter, the signal-testing apparatus is described in a manner of specific example.
Firstly, the PCIe X16 signal of MEZZ connector is connected to the design for being converted into SMP joint signal, it, should referring to Fig. 3
Design includes: that the MEZZ connector interface of test fixture is connected with MEZZ connector corresponding on tested mainboard, and connector is defeated
Out be one group of X16 PCIe differential signal, according to the test order that PCI-SIG recommends, selection is by Lane0,4,7,8,12,15
Six pairs of differential signals are drawn out to SMP connector on jig；In addition by the reference clock signal PCIe_REF_CLK of PCIe also by one
Differential lines are drawn out to the other joint SMP, it every time can be simultaneously by the defeated of reference clock signal and each Lane when test
Signal is connected to oscillograph together out, is to facilitate connection and can save jig space using the advantages of SMP connector, improves jig
The utilization rate of upper limited areal.
Secondly, the control function that PCIe rate switches is directly integrated on jig, jig is passed through referring to Fig. 4 A to Fig. 4 C
On switching switch realize that rate and pattern switch.Specifically, for the test of PCIe Gen3 signal, it is desirable that Gen1 is covered,
Tri- kinds of rates of Gen2, Gen3.Wherein Gen1 includes a kind of pattern, and Gen2 includes two kinds of patterns (- 3.5dB and -6dB), Gen3 packet
Include 11 kinds of patterns (P0-P10).The principle that design realizes that various rates switch with pattern is to pass through the CLK pulse of 10ms time
The receiving end of Lane0 is input to controller, to realize handoff functionality.
In addition, voltage conversion function on jig.Contain the chip of multiple functions, the work of each chip in the present invention on jig
Voltage is all 3.3V, and there was only the voltage input of 12V on jig, so needing to design the circuit that 12V turns 3.3V, it is ensured that voltage
Stability and each module can work normally.Fig. 5 A to 5D is the circuit design that 12V turns 3.3V.
In addition, in the present invention to jig plate, lamination and layout the considerations of.
Because test fixture of the invention is to it requires for testing mainboard signal and minimize test fixture pair
The influence of measured signal.In order to realize this purpose, need in jig PCB selection, line width, line-spacing, via hole optimization, stack-design etc.
Aspect is strict with.It need to be emulated in the layout stage, to realize optimal placement-and-routing.
Selection design: using TU863+ as this jig designing material, smaller decaying purpose is realized.
Stack-design: using 18 laminates, and each layer of high-speed-differential line signal has accordingly with reference to GND plane, power supply
Layer improves signal accuracy by ground level complete parttion with high speed signal layer to avoid signal interference.
Layout design: high-speed differential signal line does equal length treatment to avoid error is introduced, and line width is according to 85 ohm of emulation
Processing, via hole take simulation optimization, guarantee impedance variations within 5%.
Invention achieves desired design effect, the PCIe signal testing to MEZZ connector interface can be realized, solve
The problem of existing standard CLB test fixture is unable to test nonstandard connector, this jig effectively reduce artificial band incoming link
In loss, using this jig test accurately can really show signal quality at connector.
The signal-testing apparatus of embodiment according to the present invention can be realized the PCIe signal survey to MEZZ connector interface
Examination, solves the problems, such as that existing standard CLB test fixture is unable to test nonstandard connector, specifically, can support high speed MEZZ
The PCIe signal testing of connector interface, following a variety of test needs may be implemented: 1. mainboard PCIe send signal compatibility and survey
Examination；2. mainboard PCIe signal error rate BERT is tested；3. fixture carries regulations speed handoff functionality, it can be achieved that Gen1, Gen2,
Switching between Gen3 rate.The signal quality capableing of at the test connector of all standing, and then computing hardware system is effectively ensured
The signal integrity of system mainboard.
Hereinafter, signal testing method will be described referring to Fig. 6.
Referring to Fig. 6, signal testing method 600 includes: step 602, generates the first differential reference pulse signal；Step 604,
First differential reference pulse signal via MEZZ connector is supplied to CPU so that CPU to provide the PCIe with different rates poor
Sub-signal；And step 606, PCIe differential signal is supplied to by multiple SMP connectors by MEZZ connector.The signal testing side
Method can be realized the PCIe signal testing to MEZZ connector interface, solve in existing test method, standard CLB test fixture
The problem of being unable to test nonstandard connector.
In order to avoid repeating, other steps of signal testing method are not described in detail.Signal testing method
Other steps correspond to the description of signal-testing apparatus.
The signal-testing apparatus of embodiment according to the present invention and repeatedly, can directly switch to SMP connector for MEZZ interface；
Rate switching control function is provided by the way that 10ms clock pulses is supplied to CPU；And jig stack-design and line width line-spacing.
To solve the problems, such as that existing standard CLB test fixture is unable to test nonstandard connector, specifically, high speed MEZZ can be supported
The PCIe signal testing of connector interface, following a variety of test needs may be implemented: 1. mainboard PCIe send signal compatibility and survey
Examination；2. mainboard PCIe signal error rate BERT is tested；3. fixture carries regulations speed handoff functionality, it can be achieved that Gen1, Gen2,
Switching between Gen3 rate.The signal quality capableing of at the test connector of all standing, and then computing hardware system is effectively ensured
The signal integrity of system mainboard.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (11)
1. a kind of signal-testing apparatus characterized by comprising
Impulse circuit generates the first differential reference pulse signal and connects the first differential reference pulse signal via MEZZ
Device is supplied to CPU so that the CPU provides the PCIe differential signal with different rates；And
Multiple SMP connectors receive the PCIe differential signal from the MEZZ connector to be supplied to detection device.
2. signal-testing apparatus according to claim 1, which is characterized in that the impulse circuit, comprising:
Impulse generator, for generating original burst signal；
Phase inverter, for making the original burst signal reverse phase；And
Reference pulse circuit, for receiving the original burst signal of reverse phase, with generate the first differential reference pulse signal and
Second differential reference pulse signal, wherein the second differential reference pulse signal is supplied to the detection device.
3. signal-testing apparatus according to claim 2, which is characterized in that further include voltage conversion device, by the letter
The supply voltage of number test device is converted to the chip operating voltage for the impulse circuit.
4. signal-testing apparatus according to claim 3, which is characterized in that the voltage conversion device includes:
Converter has the first input end for receiving the supply voltage, receives the second input terminal of ground voltage, and
Export the output terminal of the chip operating voltage, wherein the chip operating voltage is supplied to the institute of the impulse circuit
Impulse generator, the phase inverter and the reference pulse circuit are stated, and
Multiple first capacitor devices are connected in parallel between the first input end and second input terminal；And
Multiple second capacitors are connected in parallel between the output terminal and second input terminal.
5. signal-testing apparatus according to claim 1, which is characterized in that the different rates include first rate,
Two rates and third speed, wherein first rate 2.5GHz, the second rate is 5GHz and third speed is 8GHz.
6. signal-testing apparatus according to claim 5, which is characterized in that the first rate includes a kind of pattern, described
Second rate includes 2 kinds of patterns；And the third speed includes 11 kinds of patterns.
7. signal-testing apparatus according to claim 1, which is characterized in that the first differential reference pulse signal is
10ms pulse signal.
8. signal-testing apparatus according to claim 1, which is characterized in that by high-speed differential signal line from the MEZZ
Connector receives the PCIe differential signal and the high-speed differential signal line makees equal length treatment.
9. signal-testing apparatus according to claim 2, which is characterized in that further include circuit board, set on the circuit board
It is equipped with the MEZZ connector, the impulse circuit, the multiple SMP connector and the voltage conversion device.
10. signal-testing apparatus according to claim 9, which is characterized in that the circuit board includes multilayer, wherein high
Fast differential signal line layer all has with reference to ground plane, and bus plane is connect with the high-speed differential signal layer by the reference
Ground level is spaced apart.
11. a kind of signal testing method characterized by comprising
Generate the first differential reference pulse signal；
The first differential reference pulse signal is supplied to CPU so that the CPU, which is provided, has difference via MEZZ connector
The PCIe differential signal of rate；And
The PCIe differential signal is supplied to multiple SMP connectors by the MEZZ connector.
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| CN201811629107.7A CN109828872A (en) | 2018-12-28 | 2018-12-28 | Signal-testing apparatus and method |
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| CN201811629107.7A CN109828872A (en) | 2018-12-28 | 2018-12-28 | Signal-testing apparatus and method |
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| CN110515788A (en) * | 2019-09-29 | 2019-11-29 | 浪潮商用机器有限公司 | A kind of test device of data-interface |
| CN111812373A (en) * | 2020-06-28 | 2020-10-23 | 浪潮电子信息产业股份有限公司 | PCIe mainboard signal automatic testing device |
| CN112162187A (en) * | 2020-09-11 | 2021-01-01 | 浪潮电子信息产业股份有限公司 | Signal test system |
| CN113295946A (en) * | 2021-05-11 | 2021-08-24 | 深圳市精泰达科技有限公司 | PCIe test fixture code pattern automatic switching method and device thereof |
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Application publication date: 20190531 |
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