CN109757041B - Process implementation method for selective vertical routing of hole wall - Google Patents
Process implementation method for selective vertical routing of hole wall Download PDFInfo
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- CN109757041B CN109757041B CN201711086606.1A CN201711086606A CN109757041B CN 109757041 B CN109757041 B CN 109757041B CN 201711086606 A CN201711086606 A CN 201711086606A CN 109757041 B CN109757041 B CN 109757041B
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Abstract
The invention provides a process implementation method for selective vertical routing of hole walls, which comprises the following steps: forming a slotted hole on a circuit board substrate to be provided with vertical wiring; filling the slotted hole with plating-resistant material; forming a hole on the circuit board substrate according to a preset hole position and a preset hole size, wherein the hole is intersected with the edge of the slotted hole; and electroplating the circuit board substrate provided with the slotted hole and the hole, and forming a vertical routing with an arc-shaped section on the side wall of the hole. By the method provided by the invention, the high-density wiring of the circuit board substrate is realized, and the influence on signal via holes can be reduced.
Description
Technical Field
The invention relates to the technical field of circuit board manufacturing, in particular to a process implementation method for selective vertical routing of hole walls.
Background
With the development of high density of printed circuit boards, the number of layers of the circuit boards is higher and smaller, the line width is thinner and finer, and the circuits are denser and denser, and particularly for a Ball Grid Array (BGA) area, the high-density wiring requirements of the next generation of printed circuit boards are difficult to meet by the current process implementation method.
In the BGA area or the dense circuit area of the current printed circuit board, different signal layers are connected through hole metallization, and a hole is plated to form a tubular vertical trace, and the line width of the vertical trace is determined by the size of the aperture (the line width is about 3.14 times of the aperture).
However, with the rapid development of electronic products, the requirements for the lightness, thinness, shortness and shortness of the printed circuit board are higher and higher at present, and the design of dense circuits needs smaller aperture, which on one hand poses challenges to the technical difficulty of the existing drilling, and on the other hand, the electroplating effect in the tiny holes is greatly reduced, and the open circuit is easy to generate, so that the design of high-density wiring based on the prior art cannot be carried out due to the limit capability of drilling and electroplating.
Disclosure of Invention
The invention provides a process implementation method for selective vertical wiring of a hole wall, which is used for reducing the influence on signal via holes while realizing high-density wiring of a circuit board substrate.
The first aspect of the present invention provides a method for realizing a process of selective vertical routing on a hole wall, including: forming a slotted hole on a circuit board substrate to be provided with vertical wiring; filling the slotted hole with plating-resistant material; forming a hole on the circuit board substrate according to a preset hole position and a preset hole size, wherein the hole is intersected with the edge of the slotted hole; and electroplating the circuit board substrate provided with the slotted hole and the hole, and forming a vertical routing with an arc-shaped section on the side wall of the hole.
Further, the electroplating treatment is performed on the circuit board substrate provided with the slot and the hole, and after the vertical routing with the arc-shaped cross section is formed on the side wall of the hole, the method further includes: and manufacturing an outer layer circuit on the circuit board substrate on which the vertical wiring is formed according to a preset circuit, wherein the outer layer circuit is connected with the vertical wiring.
Further, according to the preset circuit, before the outer circuit is fabricated on the circuit board substrate on which the arc-shaped vertical routing is formed, the method further includes: and (4) carrying out back washing on the plating-resistant material in the groove hole of the circuit board substrate after the electroplating is finished.
Further, according to the preset circuit, after the outer circuit is manufactured on the circuit board substrate on which the arc-shaped vertical routing is formed, the method further includes: and filling anti-welding oil in the groove hole, and printing the anti-welding oil on the outer layer circuit.
Further, the filling of the slot with the plating resist material includes: injecting the plating-resistant material before curing into the slot; and solidifying the plating-resistant material in the slot hole.
Further, the plating resist material includes: one or more of an ink, a resin, a wax, and a paint having plating resistance.
Further, after the slot is filled with the plating resist material, the method further comprises: and removing the excessive plating-resistant material around the slotted hole.
Further, set up the hole on the circuit board base plate according to preset hole position and hole size includes: acquiring parameters of a position and a size of a hole in a preset circuit; and according to the parameters, forming holes on the circuit board substrate according to preset hole positions and hole sizes.
Further, set up the slotted hole on treating to set up the circuit board base plate of walking the line perpendicularly, include: and forming a slotted hole on the circuit board substrate to be provided with the vertical wiring according to a preset proportion by a hole-stacking drilling method, wherein the length-width proportion of the slotted hole is more than 1: 1.2.
The circuit board substrate includes a laminate substrate having a plurality of insulating sheets and at least one in-layer wiring layer.
The invention provides a process implementation method for selectively vertically routing on a hole wall. Therefore, the influence on signal via holes can be reduced while high-density wiring of the circuit board substrate is realized.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a flowchart of a process implementation method for selective vertical routing of a hole wall according to an embodiment of the present invention;
fig. 2 is a flowchart of a process implementation method for selective vertical routing of a hole wall according to a second embodiment of the present application;
FIG. 3 is a schematic structural diagram of a circuit board substrate with a slot according to a second embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a circuit board substrate filled with plating resist ink according to a second embodiment of the present invention;
fig. 5 is a schematic structural diagram of the circuit board substrate after the holes are formed according to the second embodiment of the present invention;
fig. 6 is a schematic structural diagram of a circuit board substrate after electroplating according to a second embodiment of the present invention;
fig. 7 is a schematic structural diagram of the circuit board substrate after the back washing according to the second embodiment of the present invention;
fig. 8 is a diagram illustrating a structure of a circuit board substrate after horizontal traces are disposed according to a second embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The dimensions of the various layers and regions are exaggerated or reduced for illustrative purposes, and thus, the sizes and proportions shown in the figures do not necessarily represent actual dimensions nor reflect the dimensional relationships.
With the development of high density of printed circuit boards, the number of layers of the circuit boards is higher and smaller, the line width is thinner and finer, and the circuits are denser and denser, and particularly for a Ball Grid Array (BGA) area, the high-density wiring requirements of the next generation of printed circuit boards are difficult to meet by the current process implementation method.
In the BGA area or the dense circuit area of the current printed circuit board, different signal layers are connected through hole metallization, and a hole is plated to form a tubular vertical trace, and the line width of the vertical trace is determined by the size of the aperture (the line width is about 3.14 times of the aperture).
However, with the rapid development of electronic products, the requirements for the lightness, thinness, shortness and shortness of the printed circuit board are higher and higher at present, and the design of dense circuits needs smaller aperture, which on one hand poses challenges to the technical difficulty of the existing drilling, and on the other hand, the electroplating effect in the tiny holes is greatly reduced, and the open circuit is easy to generate, so that the design of high-density wiring based on the prior art cannot be carried out due to the limit capability of drilling and electroplating.
The following describes the technical solutions of the present invention and how to solve the above technical problems with specific embodiments. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments. Embodiments of the present invention will be described below with reference to the accompanying drawings.
Hereinafter, some terms in the present application are explained to facilitate understanding by those skilled in the art.
A printed circuit board: the support is also called a Printed Circuit Board (PCB), which is called Printed Circuit Board for short, and PCB for short, and is a support for Circuit elements and devices in electronic products.
Routing: are metal traces disposed on a printed circuit board for providing electrical connection between circuit components and devices on the printed circuit board.
Vertically routing: the printed circuit board can be divided into a single-sided board, a double-sided board and a multilayer board according to the number of circuit layers (also called wiring layers), and the vertical wiring is designed for the double-sided board and the multilayer board, so that wiring connected across the circuit layers is realized.
Plane wiring: refers to the routing arranged in the circuit layer of the printed circuit board.
Circuit board substrate: refers to the raw material or semi-finished product before the vertical wiring is laid in the process of the printed circuit board.
Plating-resistant material: refers to a material having plating resistance, and after being plated, the plating resistance material has a surface to which a plating layer, for example, a plating resistance ink or the like, is not attached.
Electroplating: refers to a process of plating a thin layer of metal on the surface of a material by using the principle of electrolysis, and the thin layer of metal can become an electroplated layer.
Fig. 1 is a flowchart of a process implementation method for selective vertical routing of a hole wall according to an embodiment of the present invention, as shown in fig. 1, the method includes:
101. and a slotted hole is formed in the circuit board substrate to be provided with the vertical wiring.
In this embodiment, firstly, a slotted hole is formed in the circuit board substrate after lamination, specifically, a slotted hole may be formed in the circuit board substrate to be provided with the vertical trace according to a preset ratio by using a hole-stacking drilling method, wherein the size of the slotted hole may be changed according to a user requirement, specifically, the length-width ratio of the slotted hole is greater than 1:1.2, for example, the length-width ratio of the slotted hole may be 1:1.5, and the slotted hole is a concave hole that does not penetrate through the circuit board substrate. Specifically, the hole-stacking drilling method is to use a drilling machine to form a plurality of slotted holes with small apertures on a circuit board substrate, and form the slotted holes in a porous integration mode according to a preset proportion.
It should be noted that the circuit board substrate includes a laminate substrate having a plurality of insulating sheets and at least one in-layer wiring layer. Specifically, the circuit board substrate provided in the embodiment of the present invention may be a double-layer board composed of a single-layer insulating board and wiring layers on both sides of the insulating board, or may be a multilayer laminated substrate at least including a plurality of insulating boards and at least one inner wiring layer and at least one outer wiring layer, where the multilayer laminated substrate may further include a semiconductor layer or a metal layer.
102. And filling the slotted hole with plating-resistant materials.
In the present embodiment, after the slot is formed, the slot needs to be filled with a plating-resistant material, and specifically, the plating-resistant material may be one of an ink, a resin, a wax, and a paint having a plating-resistant property, or a composite material having a plating-resistant property composed of some of the above materials, for example, a plating-resistant UV (Ultraviolet) ink, a plating-resistant insulating varnish, and the like.
103. And arranging holes on the circuit board substrate according to the preset hole positions and hole sizes, wherein the holes are intersected with or separated from the edges of the slotted holes.
In this embodiment, after filling the slot with the plating resist, holes are formed in the circuit board substrate according to the preset hole positions and hole sizes, wherein the number of the holes is determined according to the user requirements, and the holes intersect or are separated from the edges of the slot, and wherein the positional relationship between the slot and the holes can be determined by a preset circuit diagram in order to meet the functional requirements of the user on the finished circuit board. Specifically, the holes may be formed by cutting with a drill, by burning with a laser, or by punching with a punch. The hole can be a through hole penetrating through the circuit board substrate or a concave hole not penetrating through the circuit board substrate.
It should be noted that, in the process of forming the holes, the positions and the sizes of the holes can be set in advance, so that the distance between the holes can be shortened, thereby achieving the purpose of high-density routing. Specifically, because the distance between the holes can be adjusted to the requirement on aperture is not high, compare in prior art, need not make the hole in less aperture, only need to reduce the interval between the hole can produce the perpendicular line of walking that the line width is thinner, density is higher, and reduce the interval between the hole and compare in the technical difficulty of reducing the aperture littleer, more easily realize, can reduce the cost of manufacture simultaneously.
104. And electroplating the circuit board substrate provided with the slotted hole and the hole, and forming a vertical routing with an arc-shaped section on the side wall of the hole.
In this embodiment, after the slot and the plurality of holes are formed in the circuit board substrate, the circuit board substrate may be placed in an electrolyte for electroplating, after the electroplating is completed, since the pre-formed slot is filled with the plating resist material, a plating resist layer is formed, and the other portion of the circuit board substrate is not filled with the plating resist material, i.e., the platable region. Therefore, after the whole board is electroplated, the electroplating layer cannot be formed in the electroplating-proof area, and the electroplating layer can be formed in the electroplatable area, so that the vertical routing with the arc-shaped section can be formed on the side wall of the hole, and the wiring can be carried out in the hole. In addition, because the slot holes are filled with the plating-resistant material in advance, the manufacturing precision of the vertical wiring is easier to control, the influence of poor electroplating effect due to too small hole diameter is avoided, the yield is higher, the high-precision vertical wiring can be manufactured, and the requirement of high-precision wiring is met. By the method, the arc-shaped vertical wiring can be formed on the circuit board substrate, so that the influence on the signal during the via hole passing can be reduced, and the signal transmission quality can be improved on the basis of realizing high-density wiring.
According to the process implementation method for selectively vertically routing the hole wall, provided by the embodiment, the circuit board substrate to be provided with the vertical routing is provided with the slotted hole, the slotted hole is filled with the plating-resistant material, the edge of the slotted hole is provided with the plurality of holes according to the preset hole position and the size of the hole, the circuit board substrate provided with the slotted hole and the holes is subjected to electroplating treatment, and the vertical routing with the arc-shaped cross section is formed on the side wall of the hole. Therefore, the influence on signal via holes can be reduced while high-density wiring of the circuit board substrate is realized.
Further, in view of the difficulty in directly filling the slot with the solid material and the difficulty in attaching the solid material to the slot, on the basis of the first embodiment of the present invention, the plating-preventing material may be a curable material, and the filling of the slot with the plating-preventing material includes:
injecting the plating-resistant material before curing into the slot;
and solidifying the plating-resistant material in the slot hole.
The plating-resistant material in the slot hole can be cured by flexibly selecting a corresponding curing process according to the curing property of the selected plating-resistant material, for example, for the plating-resistant UV ink, the plating-resistant material can be cured by adopting an ultraviolet irradiation curing process; for the plating-proof insulating paint, a drying curing process can be adopted for curing, and the like, which are not described in detail herein.
In consideration of the fact that, in the actual processing process, after the plating-resistant material is filled into the slot, the plating-resistant material may be excessive to the slot, and thus remains on the surface of the circuit board substrate, which affects the subsequent process, for example, when the plating-resistant insulating varnish is injected into the slot, the plating-resistant insulating varnish is inevitably excessive to the slot due to the surface tension of the liquid. Therefore, on the basis of any of the above embodiments, after filling the plurality of slots with the plating resist material, the method further includes: and removing the plating-proof material overflowing from the slotted hole. Specifically, after the plating resist material is cured, the plating resist material overflowing the slot hole can be removed by scraping or grinding.
Further, on the basis of any of the above embodiments, after the electroplating process is performed on the circuit board substrate on which the slot hole and the hole are formed, and the vertical trace whose cross section is arc-shaped is formed on the side wall of the hole, the method further includes:
and manufacturing an outer layer circuit on the circuit board substrate on which the vertical wiring is formed according to a preset circuit, wherein the outer layer circuit is connected with the vertical wiring.
In this embodiment, after the circuit board substrate with the slotted hole and the hole is subjected to electroplating treatment to form the vertical trace with the arc-shaped cross section on the circuit board substrate, the outer-layer planar trace can be manufactured on the circuit board substrate according to a preset circuit diagram, so that the outer-layer planar trace is connected with the vertical trace. Thereby forming a path between the planar trace and the vertical trace.
Further, on the basis of the above embodiment, before the manufacturing, according to the preset circuit, the outer circuit on the circuit board substrate on which the arc-shaped vertical trace is formed, the method further includes:
and (4) carrying out back washing on the plating-resistant material in the groove hole of the circuit board substrate after the electroplating is finished.
In this embodiment, since it is considered that the plating resist material is remained in the slot after step 104, and the plating resist material may have an additional adverse effect on the subsequent process of the printed circuit board, the plating resist material remained on the circuit board substrate may be removed. In specific implementation, the plating-resistant material can be removed by chemical etching with an organic solution, ultrasonic cleaning, and the like, for example, the plating-resistant material in the slot can be removed by using an alkaline solution or a horizontal line device with an alkaline solution.
Further, on the basis of the above embodiment, the forming of the holes on the circuit board substrate according to the preset hole positions and hole sizes includes:
acquiring parameters of a position and a size of a hole in a preset circuit;
and according to the parameters, forming holes on the circuit board substrate according to preset hole positions and hole sizes.
In this embodiment, in order to make the finished product circuit board can satisfy the demand of user to the function, therefore, can confirm the position and the size of hole according to the circuit diagram of drawing in advance, thereby can be according to the parameter of hole position and hole size in the circuit of predetermineeing, drill on the circuit board base plate, because the distance between the hole can be adjusted, thereby it is not high to the requirement in aperture, compare in prior art, need not make the hole in less aperture, only need to reduce the interval between the hole and can make the more thin, the higher perpendicular line of walking of density of line width, and it is littleer to reduce the technical difficulty that the interval between the hole compares in reducing the aperture, more easily realize, can reduce the cost of manufacture simultaneously.
Further, on the basis of the above embodiment, after the outer circuit is fabricated on the circuit board substrate on which the arc-shaped vertical trace is formed according to the preset circuit, the method further includes:
and filling anti-welding oil in the groove hole, and printing the anti-welding oil on the outer layer circuit.
In this embodiment, after the outer circuit is fabricated on the circuit board substrate on which the arc-shaped vertical trace has been formed, whether to fill the solder mask oil in the slot according to the specific requirements of the user can be selected, and the solder mask oil is printed on the outer circuit, and then the outer circuit is sent to the back-end processing, so as to finally fabricate the finished product of the printed circuit board. Wherein, the solder mask can be a resin material.
According to the hole wall selective vertical routing process implementation method, the aperture of the vertical routing is not required to be reduced by using an unconventional process, and high-density routing is implemented only by shortening the hole pitch according to a pre-drawn circuit diagram, so that the process cost can be reduced while the high-density routing is implemented.
Fig. 2 is a flowchart of a process implementation method for selective vertical routing of a hole wall according to a second embodiment of the present invention, FIG. 3 is a schematic structural diagram of a circuit board substrate with a slot according to a second embodiment of the present invention, FIG. 4 is a schematic structural diagram of a circuit board substrate filled with plating resist ink according to a second embodiment of the present invention, fig. 5 is a schematic structural diagram of the circuit board substrate after being provided with the holes according to the second embodiment of the invention, fig. 6 is a schematic structural diagram of a circuit board substrate after electroplating according to a second embodiment of the present invention, fig. 7 is a schematic structural diagram of a circuit board substrate after being washed according to a second embodiment of the present invention, fig. 8 is a diagram illustrating a structure of a circuit board substrate after horizontal routing is provided according to a second embodiment of the present invention, and referring to fig. 2 to 8, a second embodiment of the present invention provides a more specific embodiment, where the method specifically includes the following steps:
201. and manufacturing an inner layer graph of the laminated board according to the normal flow of the PCB, laminating and laminating, and taking a semi-finished product obtained after laminating as a circuit board substrate.
202. According to the size and position parameters of the slotted hole in the pre-designed processing drawing, the slotted hole is formed in the circuit board substrate through a hole-stacking drilling method, and specifically, the slotted hole is a concave hole which does not penetrate through the circuit board substrate.
203. Filling the plating-resistant ink in the opened slotted hole by using a hole plugging machine, developing the unnecessary plating-resistant ink around the slotted hole by using film exposure after pre-baking, and curing by using a UV machine.
204. Forming a hole on the circuit board substrate with the slotted hole according to the size and position parameters of the hole in the pre-designed processing drawing, wherein the hole can be a hole penetrating through the circuit board substrate or a concave hole not penetrating through the circuit board substrate, and the specific form is determined by the pre-designed processing drawing.
205. And carrying out whole-board electroplating on the circuit board substrate subjected to secondary drilling, so as to form a vertical routing wire with an arc-shaped section at the hole.
206. And soaking the circuit board substrate which is completely electroplated by using an alkaline solution or a horizontal line device with the alkaline solution, so that the electroplating-resistant ink in the groove hole is washed and baked to be dry.
207. And arranging a horizontal wiring on the circuit board substrate according to a preset processing drawing, wherein the horizontal wiring is connected with the vertical wiring to form an inner layer circuit with an outer layer connected with the arc-shaped vertical wiring in the slotted hole.
208. And filling anti-welding oil in the slot holes and printing the anti-welding oil on the outer layer circuit so as to protect the arc-shaped vertical routing in the slot holes and the outer layer horizontal routing.
According to the process implementation method for selectively vertically routing the hole wall, provided by the embodiment, the circuit board substrate to be provided with the vertical routing is provided with the slotted hole, the slotted hole is filled with the plating-resistant material, the edge of the slotted hole is provided with the plurality of holes according to the preset hole position and the size of the hole, the circuit board substrate provided with the slotted hole and the holes is subjected to electroplating treatment, and the vertical routing with the arc-shaped cross section is formed on the side wall of the hole. Therefore, the influence on signal via holes can be reduced while high-density wiring of the circuit board substrate is realized.
The invention further provides a printed circuit board which is processed based on the manufacturing method of the vertical routing provided by the first embodiment and the second embodiment, and related contents can be understood by referring to the description of the first embodiment and the second embodiment. Through above-mentioned printed circuit board, can satisfy high-end applications such as present high performance multiplex server and aerospace to the frivolous short and small of printed circuit board, the high density demand of walking the line, can reduce the influence that the signal received when the via hole simultaneously, improve signal transmission's validity.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working process of the apparatus described above may refer to the corresponding process in the foregoing method embodiment, and is not described herein again.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (8)
1. A process implementation method for selective vertical routing of hole walls is characterized by comprising the following steps:
forming a slotted hole on a circuit board substrate to be provided with vertical wiring;
filling the slotted hole with plating-resistant material;
forming a plurality of holes on the circuit board substrate according to preset hole positions and hole sizes, wherein the holes are intersected with the edges of the slotted holes;
electroplating the circuit board substrate provided with the slotted hole and the hole, and forming a vertical routing with an arc-shaped cross section on the side wall of the hole;
the filling of the slot with plating resist material includes:
injecting the plating-resistant material before curing into the slot;
solidifying the plating-resistant material in the slot;
set up the slotted hole on treating to set up the circuit board base plate of walking perpendicularly, include:
and forming a slotted hole on the circuit board substrate to be provided with the vertical wiring according to a preset proportion by a hole-stacking drilling method, wherein the length-width proportion of the slotted hole is more than 1: 1.2.
2. The method according to claim 1, wherein the electroplating process is performed on the circuit board substrate with the slotted hole and the hole, and after forming the vertical trace with the arc-shaped cross section on the sidewall of the hole, the method further comprises:
and manufacturing an outer layer circuit on the circuit board substrate on which the vertical wiring is formed according to a preset circuit, wherein the outer layer circuit is connected with the vertical wiring.
3. The method according to claim 2, wherein before the step of fabricating the outer layer circuit on the circuit board substrate on which the arc-shaped vertical trace has been formed according to the predetermined circuit, the method further comprises:
and (4) carrying out back washing on the plating-resistant material in the groove hole of the circuit board substrate after the electroplating is finished.
4. The method according to claim 2, wherein after the outer layer circuit is fabricated on the circuit board substrate on which the arc-shaped vertical trace has been formed according to the predetermined circuit, the method further comprises:
and filling anti-welding oil in the groove hole, and printing the anti-welding oil on the outer layer circuit.
5. The method of claim 1, wherein the plating resist material comprises: one or more of an ink, a resin, a wax, and a paint having plating resistance.
6. The method of claim 1, further comprising, after filling the slots with a plating resist material:
and removing the excessive plating-resistant material around the slotted hole.
7. The method of claim 1, wherein the forming the holes in the circuit board substrate according to the predetermined hole positions and hole sizes comprises:
acquiring parameters of a position and a size of a hole in a preset circuit;
and according to the parameters, forming a plurality of holes on the circuit board substrate according to preset hole positions and hole sizes.
8. The method of any of claims 1-7, wherein the circuit board substrate comprises a laminate substrate having a plurality of insulating boards and at least one intra-layer wiring layer.
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| CN201711086606.1A CN109757041B (en) | 2017-11-07 | 2017-11-07 | Process implementation method for selective vertical routing of hole wall |
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| CN112616258B (en) * | 2021-01-12 | 2022-06-17 | 广东世运电路科技股份有限公司 | Circuit board negative film and processing method thereof |
| CN114236709A (en) * | 2021-12-13 | 2022-03-25 | 中国电子科技集团公司第五十五研究所 | Ceramic packaging high-speed shell with surface through hole structure |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5499446A (en) * | 1993-12-01 | 1996-03-19 | Nec Corporation | Method for manufacturing printed circuit board with through-hole |
| CN102686017A (en) * | 2011-03-15 | 2012-09-19 | 富士通株式会社 | Printed wiring board, printed circuit board unit, electronic apparatus and method for manufacturing printed wiring board |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6848912B2 (en) * | 2002-12-12 | 2005-02-01 | Broadcom Corporation | Via providing multiple electrically conductive paths through a circuit board |
| TWI242783B (en) * | 2004-10-20 | 2005-11-01 | Ind Tech Res Inst | Cut via structure for and manufacturing method of connecting separate conductors |
-
2017
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5499446A (en) * | 1993-12-01 | 1996-03-19 | Nec Corporation | Method for manufacturing printed circuit board with through-hole |
| CN102686017A (en) * | 2011-03-15 | 2012-09-19 | 富士通株式会社 | Printed wiring board, printed circuit board unit, electronic apparatus and method for manufacturing printed wiring board |
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