CN109690767A - 半导体装置 - Google Patents

半导体装置 Download PDF

Info

Publication number
CN109690767A
CN109690767A CN201680088933.8A CN201680088933A CN109690767A CN 109690767 A CN109690767 A CN 109690767A CN 201680088933 A CN201680088933 A CN 201680088933A CN 109690767 A CN109690767 A CN 109690767A
Authority
CN
China
Prior art keywords
spiral conductor
upside
downside
semiconductor device
lower electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201680088933.8A
Other languages
English (en)
Other versions
CN109690767B (zh
Inventor
藤田重人
稻口隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN109690767A publication Critical patent/CN109690767A/zh
Application granted granted Critical
Publication of CN109690767B publication Critical patent/CN109690767B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/071—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R11/00—Individual connecting elements providing two or more spaced connecting locations for conductive members which are, or may be, thereby interconnected, e.g. end pieces for wires or cables supported by the wire or cable and having means for facilitating electrical connection to some other wire, terminal, or conductive member, blocks of binding posts
    • H01R11/01—Individual connecting elements providing two or more spaced connecting locations for conductive members which are, or may be, thereby interconnected, e.g. end pieces for wires or cables supported by the wire or cable and having means for facilitating electrical connection to some other wire, terminal, or conductive member, blocks of binding posts characterised by the form or arrangement of the conductive interconnection between the connecting locations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00012—Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10254—Diamond [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1027—IV
    • H01L2924/10272—Silicon Carbide [SiC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/1033—Gallium nitride [GaN]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)

Abstract

具备：上电极，其设置于下电极的上方；半导体芯片，其设置于该下电极和该上电极之间；压垫，其在该下电极和该上电极之间与该半导体芯片重叠地设置；以及螺旋导体，其在该下电极和该上电极之间与该半导体芯片以及该压垫重叠地设置，该螺旋导体具有上侧螺旋导体和下侧螺旋导体，该下侧螺旋导体与该上侧螺旋导体的下端接触，与该上侧螺旋导体相对，通过在该上侧螺旋导体和该下侧螺旋导体形成槽，从而使得俯视观察时在该上侧螺旋导体流动的电流的方向和在该下侧螺旋导体流动的电流的方向一致。

Description

半导体装置
技术领域
本发明涉及在例如大电流的通断等中使用的半导体装置。
背景技术
专利文献1中公开了压装式功率半导体模块。专利文献1的图1中公开了在内部具备多个半导体装置的压装式功率半导体模块。在1个半导体装置存在1个半导体芯片。半导体芯片例如是IGBT。通过使该半导体装置的各要素的上表面和下表面压接，从而实现半导体芯片的电连接。为了向多个半导体芯片均匀地施加压力，在各个半导体芯片需要导电路径的游隙和弹簧构造。
压垫用于赋予该游隙且保证电连接。压垫有时为了增大针对通常电流的通电容量而设置多个。有时在压垫间设置弹簧，但该弹簧即使在具备通电性的情况下也作为电感起作用，特别是针对高频而成为高阻抗。因此，在弹簧不会流过电流。
专利文献1：日本特表2004－528724号公报
发明内容
如果半导体芯片变为短路状态，则在作为上侧的汇流条的上电极和作为下侧的汇流条的下电极流过方向相反的电流。因该电流产生的电磁力使上电极和下电极产生斥力。如果由于该斥力而使上电极和下电极之间的距离变大，则有时会在上电极和下电极之间的部件发生剥离，使电路断开。特别是，担心连接力弱的半导体芯片表面处的剥离。
而且，可以想到，在电路的断线部分发生电弧，装置由于该电弧而受到加热，由此环境气体膨胀或者固体气化而导致爆炸。因此，需要对模块配备牢固的防爆构造，这成为小型化以及低价格化的阻碍要因。另外，有时需要对使用电流区域进行限制，或者需要另行设置短路保护。
本发明就是为了解决上述问题而提出的，其目的在于提供一种半导体装置，该半导体装置能够降低施加至上电极和下电极的斥力，防止在上电极和下电极之间的部件产生剥离。
本发明所涉及的半导体装置的特征在于，具备：下电极；上电极，其设置于该下电极的上方；半导体芯片，其设置于该下电极与该上电极之间；压垫，其在该下电极和该上电极之间与该半导体芯片重叠地设置；以及螺旋导体，其在该下电极与该上电极之间与该半导体芯片以及该压垫重叠地设置，该螺旋导体具备上侧螺旋导体和下侧螺旋导体，该下侧螺旋导体与该上侧螺旋导体的下端接触，与该上侧螺旋导体相对，通过在该上侧螺旋导体和该下侧螺旋导体形成槽，从而使得俯视观察时在该上侧螺旋导体流动的电流的方向和在该下侧螺旋导体流动的电流的方向一致。
本发明的其它特征将在下面得以明确。
发明的效果
根据本发明，利用在螺旋导体产生的引力而降低施加至下电极和上电极的斥力，因此，能够防止在上电极和下电极之间的部件产生剥离。
附图说明
图1是实施方式1所涉及的半导体装置的剖视图。
图2是表示下侧螺旋导体和上侧螺旋导体的图。
图3是螺旋导体的剖视图。
图4是下侧螺旋导体和上侧螺旋导体的局部剖视图。
图5是示意性表示螺旋导体中的电流的流向的图。
图6是表示实施方式1所涉及的半导体装置的组装例的图。
图7是实施方式2所涉及的半导体装置的螺旋导体的剖视图。
图8是表示实施方式3所涉及的半导体装置的下侧螺旋导体和上侧螺旋导体的图。
图9是实施方式4所涉及的半导体装置的剖视图。
具体实施方式
参照附图对本发明的实施方式所涉及的半导体装置进行说明。针对相同或对应的结构要素，标注相同的标号，有时省略重复说明。
实施方式1.
图1是实施方式1所涉及的半导体装置的剖视图。该半导体装置1具备下电极10。在下电极10之上设置有半导体芯片12。半导体芯片12是例如IGBT或者二极管。在半导体芯片12之上设置有螺旋导体20。螺旋导体20具备下侧螺旋导体22、上侧螺旋导体24。
在螺旋导体20之上重叠设置有由金属形成的板30、32。在板32之上设置有压垫34、36。通过具备压垫34、36而在半导体装置1处构成压装式功率半导体装置的弹簧电极。在压垫34、36之上设置有板38，在板38之上设置有上电极40。
压垫34、36的上端固定于板38，下端固定于板32。压垫34、36能够沿y方向伸缩，即能够沿与下电极10的下表面和上电极40的上表面垂直的方向伸缩。因此，无论下电极10和上电极40之间的距离如何，压垫34、36都经由半导体芯片12将下电极10和上电极40电连接。
在压垫34、36之间设置有弹簧37。对于该弹簧37而言，如果下电极10和上电极40的距离增大，则施加使下电极10和上电极40的距离变小的力，如果下电极10和上电极40的距离变小，则施加使下电极10和上电极40的距离变大的力。
下电极10和上电极40之间的各要素优选进行压接。由此，能够经由半导体芯片12以及压垫34、36等而确保上电极40和下电极10的电连接。
图2是表示下侧螺旋导体22和上侧螺旋导体24的图。左上的图是下侧螺旋导体22的俯视图，沿该图的虚线的剖视图是左下的图。右上的图是上侧螺旋导体24的俯视图，沿该图的虚线的剖视图是右下的图。下侧螺旋导体22和上侧螺旋导体24具备相同的形状。即，使下侧螺旋导体22通过内外翻转而成为与上侧螺旋导体相同的形状。
图2中的箭头表示电流的流向。在下侧螺旋导体22，基本上是电流从下侧螺旋导体22的外侧朝向内侧流动。而且，在下侧螺旋导体22形成有曲线的槽22a。多个槽22a整体为环状。由该槽22a规定电流的流向。其结果，对于下侧螺旋导体22而言，俯视观察时电流向逆时针方向流动。
另一方面，在上侧螺旋导体24，基本上是电流从上侧螺旋导体24的内侧朝向外侧流动。而且，在上侧螺旋导体24形成有曲线的槽24a。多个槽24a整体为环状。由该槽24a规定电流的流向。其结果，对于上侧螺旋导体24而言，俯视观察时电流向逆时针方向流动。
这样，通过在下侧螺旋导体22和上侧螺旋导体24形成槽22a、24a，从而使得俯视观察时在上侧螺旋导体24流动的电流的方向和在下侧螺旋导体22流动的电流的方向一致。
根据图2的下部的2个图可知，下侧螺旋导体22和上侧螺旋导体24两者都具备中央部凸起的圆锥状的形状。下侧螺旋导体22向下侧凸出，上侧螺旋导体24向上侧凸出。位于下侧螺旋导体22的中心的开口22b是为了使下侧螺旋导体22和半导体芯片2容易接触而设置的。位于上侧螺旋导体24的中心的开口24b是为了使上侧螺旋导体24和板30容易接触而设置的。
图3是螺旋导体20的剖视图。上侧螺旋导体24和下侧螺旋导体22相对地设置。通过上侧螺旋导体24的下端和下侧螺旋导体22的上端相接触而构成螺旋导体20。根据图3可知，上侧螺旋导体24的宽度最大的部分和下侧螺旋导体22的宽度最大的部分相接触。而且，在俯视观察的情况下，电流从上侧螺旋导体24的中央24A朝向外侧24B流动，电流从下侧螺旋导体22的外侧22B朝向中央22A流动，电流流过半导体芯片12。
图4是下侧螺旋导体22和上侧螺旋导体24的局部剖视图。如前所述，使在下侧螺旋导体22流动的电流的方向和在上侧螺旋导体24流动的电流的方向一致，因此在下侧螺旋导体22和上侧螺旋导体24产生引力。图5是示意性表示下侧螺旋导体22和上侧螺旋导体24的电流的流向的图。通过在下侧螺旋导体22和上侧螺旋导体24产生逆时针方向的电流，由此在它们之间产生引力。
图6是表示实施方式1所涉及的半导体装置1的组装例的图。由3个半导体装置1共享1个下电极10。在基座板39之上排列有6个半导体装置1。图6中示出的是，重叠了2个将6个半导体装置1搭载于基座板39后的构造。由此，构成具备12个半导体装置1的压装式功率半导体模块。从该模块的上下向该模块施加力，对半导体装置内的各要素进行压接，由此实现半导体芯片的电连接。
为了向多个半导体芯片12均匀地施加压力，在各个半导体装置1需要导电路径的游隙和弹簧构造。压垫34、36用于赋予该游隙且保证电连接。在实施方式1中，在1个半导体装置设置有2个压垫34、36，但也可以是为了增大相对于通常电流的通电容量而针对1个半导体装置设置大于或等于3个压垫。此外，压垫34、36间的弹簧37即使在具备通电性的情况下也作为电感起作用，因此特别是针对高频而成为高阻抗，电流不会流过弹簧37。
另外，图1的实线箭头表示短路电流的方向。相反方向的短路电流流过作为上侧的汇流条的上电极40和作为下侧的汇流条的下电极10。由于该短路电流而在上电极40和下电极10之间产生斥力。虚线箭头表示斥力。而且，对于本发明的实施方式1所涉及的半导体装置1而言，如上述在下侧螺旋导体22和上侧螺旋导体24之间产生引力，因此，通过该引力使在上电极40和下电极10之间产生的斥力相抵消或者降低。
这样，通过降低施加至上电极40和下电极10的斥力，从而能够防止在上电极40和下电极10之间的部件产生剥离。例如能够防止半导体芯片12从下电极10剥离。如果能够防止剥离，则不会引起因电弧产生的环境气体的热膨胀，因此半导体装置以及包含它的模块不会发生爆炸。因而，能够省略以往设置的防爆措施，能够使模块小型且低成本。
本发明的实施方式1所涉及的半导体装置在下电极10和上电极40之间设置半导体芯片12、与半导体芯片12重叠地设置的压垫34、36、以及与半导体芯片12以及压垫34、36重叠地设置的螺旋导体20，在螺旋导体20产生引力。本发明的实施方式1所涉及的半导体装置1在不丧失其特征的范围能够进行各种变形。
例如，也可以变更半导体芯片12、压垫34、36和螺旋导体20的上下关系。因此，还能够将半导体芯片12设置于压垫34、36之上。另外，设置于1个半导体装置1的压垫的数量不特别限定。作为半导体芯片12，能够使用在表面和背面之间流过电流的纵向型的芯片，这样的芯片并不限定于IGBT或二极管。
半导体芯片12可以由硅形成，也可以由与硅相比带隙大的宽带隙半导体形成。作为宽带隙半导体，例如存在碳化硅、氮化镓类材料或者金刚石。通过使用宽带隙半导体，从而装置的可工作温度变高。并且，对于碳化硅而言，即使是作为单极器件的MOSFET，也可以是高电压耐压的器件，能够实现高频和高效。
上述变形也能够应用于以下的实施方式所涉及的半导体装置。此外，以下的实施方式所涉及的半导体装置与实施方式1的相似点多，因此以与实施方式1的不同为中心进行说明。
实施方式2.
图7是实施方式2所涉及的半导体装置的螺旋导体的剖视图。上侧螺旋导体24的宽度最小的部分和下侧螺旋导体22的宽度最小的部分相接触。即，下侧螺旋导体22的中央和上侧螺旋导体24的中央相接触。在该情况下，电流从板30的外侧流入上侧螺旋导体24的外侧，到达上侧螺旋导体24的中心，从下侧螺旋导体22的中心朝向外侧流动，进入半导体芯片12。
在俯视观察时，在上侧螺旋导体24和下侧螺旋导体22产生顺时针方向的电流。即，在俯视观察时，在上侧螺旋导体24流动的电流的方向和在下侧螺旋导体22流动的电流的方向一致，因此，在上侧螺旋导体24和下侧螺旋导体22之间产生引力。该引力降低施加至上电极40和下电极10的斥力，因此能够防止在上电极40和下电极10之间的部件产生剥离。
实施方式3.
图8是表示实施方式3所涉及的半导体装置的下侧螺旋导体41和上侧螺旋导体42的图。左上的图是下侧螺旋导体41的俯视图，沿该图的虚线的剖视图是左下的图。右上的图是上侧螺旋导体42的俯视图，沿该图的虚线的剖视图是右下的图。下侧螺旋导体41和上侧螺旋导体42具备相同的形状。即，使下侧螺旋导体41通过正反翻转而成为与上侧螺旋导体42相同的形状。将下侧螺旋导体41的上端和上侧螺旋导体42的下端连接而构成螺旋导体。
下侧螺旋导体41的槽41a和上侧螺旋导体42的槽42a都是直线状地形成。在该情况下，仅在圆盘切出槽而使圆盘变形为凸型，就能够简单地形成下侧螺旋导体41和上侧螺旋导体42。
通过槽40a来限制电流路径，由此在下侧螺旋导体41处电流向逆时针方向流动。通过槽42a来限制电流路径，由此在上侧螺旋导体42处电流向逆时针方向流动。因而，在上侧螺旋导体42和下侧螺旋导体41之间产生引力。该引力降低施加至上电极40和下电极10的斥力，因此能够防止在上电极40和下电极10之间的部件产生剥离。
实施方式4.
图9是实施方式4所涉及的半导体装置的剖视图。在半导体芯片12和下电极10之间设置有螺旋导体50。螺旋导体50具备：下侧螺旋导体52，其设置于下电极10之上；以及上侧螺旋导体54，其设置于下侧螺旋导体52之上。螺旋导体50的构造与螺旋导体20的构造相同。
实施方式4的半导体装置构成为，在下电极10和上电极40之间重叠地设置多个螺旋导体。螺旋导体20和螺旋导体50可以直接重叠，也可以隔着半导体芯片12或者板而重叠。通过设置多个螺旋导体，从而能够在半导体装置的多个部位产生引力，因此，能够降低施加至下电极10和上电极40的斥力。
在本发明的实施方式4中设置有2个螺旋导体20、50，也可以在1个半导体装置设置大于或等于3个螺旋导体。多个螺旋导体的种类并非必须都为相同类型。例如也可以将图7的螺旋导体重叠于图1的螺旋导体20。
在上述的实施方式1～4中，在下侧螺旋导体和上侧螺旋导体形成槽而确定了电流的流动方向。对于槽的数量和形状而言，只要在俯视观察时将电流向顺时针方向或逆时针方向引导，则并不特别限定。此外，在上述的各实施方式中说明的技术特征能够适当进行组合。
标号的说明
10下电极，12半导体芯片，20螺旋导体，22下侧螺旋导体，24上侧螺旋导体，34、36压垫，40上电极。

Claims (8)

1.一种半导体装置，其特征在于，具备：
下电极；
上电极，其设置于所述下电极的上方；
半导体芯片，其设置于所述下电极与所述上电极之间；
压垫，其在所述下电极和所述上电极之间与所述半导体芯片重叠地设置；以及
螺旋导体，其在所述下电极与所述上电极之间与所述半导体芯片以及所述压垫重叠地设置，
所述螺旋导体具备上侧螺旋导体和下侧螺旋导体，该下侧螺旋导体与所述上侧螺旋导体的下端接触，与所述上侧螺旋导体相对，通过在所述上侧螺旋导体和所述下侧螺旋导体形成槽，从而使得俯视观察时在所述上侧螺旋导体流动的电流的方向和在所述下侧螺旋导体流动的电流的方向一致。
2.根据权利要求1所述的半导体装置，其特征在于，
使所述上侧螺旋导体的宽度最大的部分和所述下侧螺旋导体的宽度最大的部分接触。
3.根据权利要求1或2所述的半导体装置，其特征在于，
所述槽以曲线状形成。
4.根据权利要求1所述的半导体装置，其特征在于，
使所述上侧螺旋导体的宽度最小的部分和所述下侧螺旋导体的宽度最小的部分接触。
5.根据权利要求1、2、4中任一项所述的半导体装置，其特征在于，
所述槽以直线状形成。
6.根据权利要求1至5中任一项所述的半导体装置，其特征在于，
在所述下电极和上电极之间重叠地设置有多个所述螺旋导体。
7.根据权利要求1至6中任一项所述的半导体装置，其特征在于，
所述半导体芯片由宽带隙半导体形成。
8.根据权利要求7所述的半导体装置，其特征在于，
所述宽带隙半导体是碳化硅、氮化镓类材料或者金刚石。
CN201680088933.8A 2016-09-07 2016-09-07 半导体装置 Active CN109690767B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2016/076331 WO2018047257A1 (ja) 2016-09-07 2016-09-07 半導体装置

Publications (2)

Publication Number Publication Date
CN109690767A true CN109690767A (zh) 2019-04-26
CN109690767B CN109690767B (zh) 2022-08-26

Family

ID=61561756

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680088933.8A Active CN109690767B (zh) 2016-09-07 2016-09-07 半导体装置

Country Status (5)

Country Link
US (1) US10770420B2 (zh)
JP (1) JP6696576B2 (zh)
CN (1) CN109690767B (zh)
DE (1) DE112016007203T5 (zh)
WO (1) WO2018047257A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1269519A (zh) * 1999-03-29 2000-10-11 精工爱普生株式会社 液晶显示装置、平面型显示装置及配有该装置的电子装置
JP2003338592A (ja) * 2002-05-21 2003-11-28 Mitsubishi Electric Corp 半導体モジュール
JP2006287101A (ja) * 2005-04-04 2006-10-19 Toyota Motor Corp パワーモジュール、及び、その製造方法
JP2008193131A (ja) * 2008-05-13 2008-08-21 Toshiba Corp マルチチップ圧接型半導体装置
JP2010251079A (ja) * 2009-04-15 2010-11-04 Mitsubishi Electric Corp 開閉器
US20140225245A1 (en) * 2011-10-21 2014-08-14 Abb Technology Ag Power semiconductor module and power semiconductor module assembly with multiple power semiconductor modules

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000260287A (ja) * 1999-03-11 2000-09-22 Mitsubishi Electric Corp 接点開閉装置
EP1263045A1 (en) 2001-06-01 2002-12-04 ABB Schweiz AG High power semiconductor module
EP1403923A1 (en) 2002-09-27 2004-03-31 Abb Research Ltd. Press pack power semiconductor module
EP2929562B1 (en) 2012-12-07 2021-04-28 ABB Power Grids Switzerland AG Semiconductor assembly
JP5930070B2 (ja) * 2012-12-28 2016-06-08 富士電機株式会社 半導体装置
JP6101507B2 (ja) 2013-02-15 2017-03-22 富士電機株式会社 半導体装置の製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1269519A (zh) * 1999-03-29 2000-10-11 精工爱普生株式会社 液晶显示装置、平面型显示装置及配有该装置的电子装置
JP2003338592A (ja) * 2002-05-21 2003-11-28 Mitsubishi Electric Corp 半導体モジュール
JP2006287101A (ja) * 2005-04-04 2006-10-19 Toyota Motor Corp パワーモジュール、及び、その製造方法
JP2008193131A (ja) * 2008-05-13 2008-08-21 Toshiba Corp マルチチップ圧接型半導体装置
JP2010251079A (ja) * 2009-04-15 2010-11-04 Mitsubishi Electric Corp 開閉器
US20140225245A1 (en) * 2011-10-21 2014-08-14 Abb Technology Ag Power semiconductor module and power semiconductor module assembly with multiple power semiconductor modules

Also Published As

Publication number Publication date
US20200035640A1 (en) 2020-01-30
JP6696576B2 (ja) 2020-05-20
WO2018047257A1 (ja) 2018-03-15
CN109690767B (zh) 2022-08-26
US10770420B2 (en) 2020-09-08
JPWO2018047257A1 (ja) 2019-02-28
DE112016007203T5 (de) 2019-06-06

Similar Documents

Publication Publication Date Title
JPS5938734B2 (ja) 平形セル構造を有するパワ−半導体回路素子
CN111052361B (zh) 压装功率半导体模块用弹簧电极
JP2016058594A5 (zh)
KR102090961B1 (ko) 다수의 러버 소켓이 수직으로 적층되는 테스트 소켓
CN107768356B (zh) 包括基底和负载电流端子元件的功率半导体装置
EP2560204A2 (en) Power semiconducter module and semiconducter module assembly with multiple power semiconducter modules
CN109698180A (zh) 半导体器件和制造方法
CN109716515B (zh) 半导体装置
US10193495B2 (en) Photovoltaic junction box and diode
CN109690767A (zh) 半导体装置
CN109690768B (zh) 半导体模块
US10999916B2 (en) Functional contactor for an electronic device
CN105680211B (zh) 压配连接器端子
JP6758512B2 (ja) ばね電極
JP2015141857A (ja) プレスフィット端子および電力用半導体装置
JP2015133368A (ja) 電力接続端子および電力用半導体装置
KR20190117673A (ko) 전자 장치 및 접속체
CN109937463B (zh) 保护元件
JP2012119063A (ja) ヒュージング用端子構造
CN109698305A (zh) 电桥接元件、电能量存储器和设备
JP2013179230A (ja) 半導体モジュール
CN104662631B (zh) 具有强额定电流的接触指型电接触设备
JP2011082088A (ja) 接触子
CN104167629A (zh) 电连接器
CN110168709A (zh) 具有用于连接半导体芯片的第一和第二连接元件的半导体模块及制造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant