CN109661719B - 半导体封装回流工序用聚酰亚胺薄膜及其制备方法 - Google Patents

半导体封装回流工序用聚酰亚胺薄膜及其制备方法 Download PDF

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CN109661719B
CN109661719B CN201780052747.3A CN201780052747A CN109661719B CN 109661719 B CN109661719 B CN 109661719B CN 201780052747 A CN201780052747 A CN 201780052747A CN 109661719 B CN109661719 B CN 109661719B
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thermoplastic polyimide
polyimide layer
reflow process
polyimide film
layer
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CN109661719A (zh
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李启雄
朴浩荣
李泰硕
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Ipi Tech Inc
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Ipi Tech Inc
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    • B32—LAYERED PRODUCTS
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    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
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    • B32B2250/00—Layers arrangement
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    • B32—LAYERED PRODUCTS
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    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
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    • B32B2307/30—Properties of the layers or laminate having particular thermal properties
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    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00—Properties of the layers or laminate
    • B32B2307/70—Other properties
    • B32B2307/748—Releasability
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    • B32—LAYERED PRODUCTS
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    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • H01L2224/81801—Soldering or alloying
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    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T428/2848—Three or more layers

Abstract

本发明公开了半导体封装回流工序用聚酰亚胺薄膜及其制备方法，采用玻璃化转变温度为回流工序温度以下的热塑性聚酰亚胺层，从而可以确保回流工序结束后半导体芯片装拆的简易性。

Description

半导体封装回流工序用聚酰亚胺薄膜及其制备方法
技术领域
本发明涉及聚酰亚胺薄膜及其制备方法，更详细地涉及半导体封装回流工序用聚酰亚胺薄膜及其制备方法，即，采用玻璃化转变温度为回流工序温度以下的热塑性聚酰亚胺层，从而可以确保回流工序结束后半导体芯片装拆的简易性。
背景技术
聚酰亚胺薄膜因其具有优秀的机械尺寸稳定性和热尺寸稳定性以及化学稳定性的特性，被广泛应用于电气、电子材料、空间、航空和电信领域。这种聚酰亚胺薄膜多用于因部件的轻薄短小而具有微细图案的柔性电路板材料，例如带式自动键合(Tape AutomatedBonding，TAB)或覆晶薄膜(Chip On Film，COF)等基底膜。
带式自动键合或覆晶薄膜技术为用于密封IC芯片或LSI芯片的技术之一，具体地，是在柔性带上形成导电性图案并将芯片安装密封在柔性带上的技术。经封装的密封元件的大小小且具有可挠性，有利于产品的轻薄短小化。
为了将聚酰亚胺薄膜用作带式自动键合或覆晶薄膜用基底膜，需要具有高尺寸稳定性。
尤其，在进行半导体封装时，为了使半导体芯片与基板电连接，必须经过焊料回流(Reflow)工序，在这种情况下，聚酰亚胺薄膜暴露在约260℃的回流工序温度附近。
此时，现有的聚酰亚胺薄膜具有在基材膜上依次层叠热塑性聚酰亚胺层和粘结层的结构。通常，现有的聚酰亚胺薄膜使用介于基材膜与粘结层之间的热塑性聚酰亚胺层，热塑性聚酰亚胺层的玻璃化转变温度为回流工序温度以上，即约300℃以上，在此情况下，存在回流工序结束后无法轻松装拆半导体芯片的问题。
相关的现有文献有韩国公开专利公报第10-2014-0084095号(2014年07月04日公开)，上述文献记载有回流膜、焊料凸块形成方法、焊料接合的形成方法以及半导体设备。
发明内容
本发明要解决的技术问题
本发明的目的在于提供半导体封装回流工序用聚酰亚胺薄膜及其制备方法，采用玻璃化转变温度为回流工序温度以下的热塑性聚酰亚胺层，从而可以确保回流工序结束后半导体芯片装拆的简易性。
技术方案
为达成上述目的的本发明实施例的半导体封装回流工序用聚酰亚胺薄膜，其特征在于，包括：非热塑性聚酰亚胺层；热塑性聚酰亚胺层，层叠于上述非热塑性聚酰亚胺层上，具有回流工序温度以下的玻璃化转变温度；以及粘结层，附着于上述热塑性聚酰亚胺层上，上述热塑性聚酰亚胺层的表面经过羧基改性处理。
为达成上述目的的本发明实施例的半导体封装回流工序用聚酰亚胺薄膜制备方法，其特征在于，包括：步骤(a)，准备非热塑性聚酰亚胺层；步骤(b)，将具有回流工序温度以下的玻璃化转变温度且表面经过羧基改性处理的热塑性聚酰亚胺层附着在上述非热塑性聚酰亚胺层上；以及步骤(c)，将粘结层附着在上述热塑性聚酰亚胺层上。
有益效果
本发明的半导体封装回流工序用聚酰亚胺薄膜及其制备方法的热塑性聚酰亚胺层使用将具有醚基、酮基以及甲基中一种的芳香二胺与具有醚基、酮基以及甲基中一种的芳香二酐(aromatic dianhydride)在有机溶剂中合成来制成的聚酰胺酸，从而使得热塑性聚酰亚胺层具有260℃以下的低的玻璃化转变温度。
其结果，本发明的半导体封装回流工序用聚酰亚胺薄膜及其制备方法采用玻璃化转变温度为260℃以下的热塑性聚酰亚胺层，因而在回流工序结束后，脱模性得到保证，使得与半导体芯片的装拆可以变得更容易。
而且，本发明的半导体封装回流工序用聚酰亚胺薄膜及其制备方法采用表面经过羧基改性处理的热塑性聚酰亚胺层，通过表面改性的活性化，羧基可提高热塑性聚酰亚胺层与粘结层之间的粘结力，确保优秀的接合可靠性。
附图说明
图1为本发明实施例的半导体封装回流工序用聚酰亚胺薄膜的剖视图。
图2为本发明实施例的半导体封装回流工序用聚酰亚胺薄膜制备方法的工序流程图。
具体实施方式
若参照附图、详细后述的实施例，本发明的优点和特征以及实现这些的方法则变得更加明确。但是，本发明可以通过多种不同的实施方式来实现，而并不限定于以下所公开的实施例，本实施例仅仅是为了使本发明公开的内容完整并且将本发明的发明范围完整地告知本发明所属技术领域的普通技术人员而提供的，本发明仅通过发明要求保护范围的范畴来定义。在整篇说明书中相同的附图标记表示相同的结构要素。
以下，参照附图详细说明本发明优选实施例的半导体封装回流工序用聚酰亚胺薄膜及其制备方法。
图1为本发明实施例的半导体封装回流工序用聚酰亚胺薄膜的剖视图。
参照图1，本发明实施例的半导体封装回流工序用聚酰亚胺薄膜100包括非热塑性聚酰亚胺层120、热塑性聚酰亚胺层140以及粘结层160。
非热塑性聚酰亚胺层120配置于聚酰亚胺薄膜100的最下部。此时，非热塑性聚酰亚胺层120用于将温度维持在半导体封装回流工序温度，即约260℃以上，可以为热固性聚酰亚胺，但并不局限于此。
热塑性聚酰亚胺层140层叠于非热塑性聚酰亚胺层120上，而且具有回流工序温度以下的玻璃化转变温度。此时，热塑性聚酰亚胺层140的表面经过羧基(carboxyl group)改性处理。
此时，热塑性聚酰亚胺层140的玻璃化转变温度为回流工序温度以下，更优选地，为260℃以下。
像这样，若使用具有260℃以下的玻璃化转变温度的热塑性聚酰亚胺层140，则在进行回流工序时，热塑性聚酰亚胺层140熔化，具有如橡胶一样柔软的性质，从而可提高与粘结层160的粘结力，并且在回流工序结束后，维持坚硬的状态，因而脱模性得到提高，使得与半导体芯片(未图示)的装拆变得更加容易。
为此，优选地，热塑性聚酰亚胺层140使用将具有醚基、酮基以及甲基中一种的芳香二胺与具有醚基、酮基以及甲基中一种的芳香二酐在有机溶剂中合成而制成的聚酰胺酸。
此时，芳香二胺包含由下述化学式1表示的3,3'-二甲基-[1,1'-联苯]-4,4'-二胺。
化学式1
Figure BDA0001979670100000041
而且，芳香二酐包含由下述化学式2表示的3,3',4,4'-二苯甲酮四羧酸二酐(3,3',4,4'-benzophenonetetracarboxylic dianhydride)。
化学式2
Figure BDA0001979670100000042
并且，有机溶剂可以使用选自N-甲基-2-吡咯烷酮(NMP)、甲苯、二甲基亚砜(Dimethyl Sulfoxide，DMSO)、乳酸乙酯(Ethyl Lactate，EL)等中的一种以上，但并不局限于此。
如上所述，本发明中热塑性聚酰亚胺层140使用将具有醚基、酮基以及甲基中一种的芳香二胺与具有醚基、酮基以及甲基中一种的芳香二酐在有机溶剂中合成而制成的聚酰胺酸，因而可以使得热塑性聚酰亚胺层140具有260℃以下的低玻璃化转变温度。
而且，如本发明中所示，若使用表面经过羧基改性处理的热塑性聚酰亚胺层140，则通过羧基可以提高热塑性聚酰亚胺层140与粘结层160之间的粘结力。
若向聚酰胺酸中添加少量的氢氧化钾(KOH)后，在300～400℃的温度下进行热处理，则如反应式1所示，这种热塑性聚酰亚胺层140的表面经过羧基改性处理。换言之，聚酰胺酸经过300～400℃的温度的热处理过程，从而发生酰亚胺化反应，形成聚酰亚胺。
反应式1
Figure BDA0001979670100000051
此时，优选地，相对于100重量份的聚酰胺酸，以0.5～3重量份的含量比来添加氢氧化钾。在相对于100重量份的聚酰胺酸，氢氧化钾的添加量小于0.5重量份的情况下，可能很难正常发挥出表面改性处理效果。相反，在相对于100重量份的聚酰胺酸，氢氧化钾的添加量大于3重量份的情况下，存在因过量添加氢氧化钾，导致聚酰胺酸或聚酰亚胺的酰亚胺结构被破坏，聚酰亚胺的物理物性与化学物性下降的问题，因此不是优选的。
将粘结层160附着在热塑性聚酰亚胺层140上。这种粘结层160可以使用各种粘结剂，例如丙烯酸类粘结剂、橡胶类粘结剂、硅类粘结剂和聚乙烯醚等。其中，在考虑到与半导体芯片的粘附性及分离后的洁净度等的情况下，更优选地，为以(甲基)丙烯酸类聚合物为基础聚合物的(甲基)丙烯酸类粘结剂。
如上所述的本发明实施例的半导体封装回流工序用聚酰亚胺薄膜通过热塑性聚酰亚胺层使用将具有醚基、酮基以及甲基中一种的芳香二胺与具有醚基、酮基以及甲基中一种的芳香二酐在有机溶剂中合成而制成的聚酰胺酸，因而使得热塑性聚酰亚胺层可以具有260℃以下的低玻璃化转变温度。
其结果，本发明实施例的半导体封装回流工序用聚酰亚胺薄膜采用玻璃化转变温度为260℃以下的热塑性聚酰亚胺层，因而在回流工序结束后，脱模性得到保证，可以使得与半导体芯片的装拆变得更容易。
而且，本发明的半导体封装回流工序用聚酰亚胺薄膜采用表面经过羧基改性处理的热塑性聚酰亚胺层，通过表面改性的活性化，羧基可提高热塑性聚酰亚胺层与粘结层之间的粘结力，确保优秀的接合可靠性。
以下，参照附图来说明本发明实施例的半导体封装回流工序用聚酰亚胺薄膜制备方法。
图2为本发明实施例的半导体封装回流工序用聚酰亚胺薄膜制备方法的工序流程图。
参照图2，本发明实施例的半导体封装回流工序用聚酰亚胺薄膜制备方法包括：步骤(S110)，准备非热塑性聚酰亚胺层；步骤(S120)，将热塑性聚酰亚胺层附着在非热塑性聚酰亚胺层上；以及步骤(S130)，将粘结层附着在热塑性聚酰亚胺层上。
准备非热塑性聚酰亚胺层
在准备非热塑性聚酰亚胺层的步骤(S110)中，准备非热塑性聚酰亚胺层。这种非热塑性聚酰亚胺层配置于聚酰亚胺薄膜的最下部。此时，非热塑性聚酰亚胺层用于将温度维持在半导体封装回流工序温度，即约260℃以上，可以为热固性聚酰亚胺，但并不局限于此。
将热塑性聚酰亚胺层附着在非热塑性聚酰亚胺层上
在将热塑性聚酰亚胺层附着在非热塑性聚酰亚胺层上的步骤(S120)中，将具有回流工序温度以下的玻璃化转变温度且表面经过羧基改性处理的热塑性聚酰亚胺层附着在非热塑性聚酰亚胺层上。
此时，热塑性聚酰亚胺层的玻璃化转变温度优选为回流工序温度以下，更优选地，为260℃以下。
像这样，若使用具有260℃以下的玻璃化转变温度的热塑性聚酰亚胺层，则在进行回流工序时，热塑性聚酰亚胺层熔化，具有如橡胶一样柔软的性质，从而可提高与粘结层的粘结力，并且在回流工序结束后，维持坚硬的状态，因而脱模性得到提高，使得与半导体芯片(未图示)的装拆变得更加容易。
为此，优选地，热塑性聚酰亚胺层使用将具有醚基、酮基以及甲基中一种的芳香二胺与具有醚基、酮基以及甲基中一种的芳香二酐在有机溶剂中合成而制成的聚酰胺酸。
此时，芳香二胺包含3,3'-二甲基-[1,1'-联苯]-4,4'-二胺。
而且，芳香二酐包含3,3',4,4'-二苯甲酮四羧酸二酐。
并且，有机溶剂可以使用选自N-甲基-2-吡咯烷酮、甲苯、二甲基亚砜、乳酸乙酯等中的一种以上，但并不局限于此。
而且，如本发明中所示，若使用表面经过羧基改性处理的热塑性聚酰亚胺层，则通过羧基可以提高热塑性聚酰亚胺层与粘结层之间的粘结力。
若向聚酰胺酸中添加少量的氢氧化钾后，在300～400℃的温度下进行热处理，则如下述反应式1所示，这种热塑性聚酰亚胺层的表面经过羧基改性处理。换言之，聚酰胺酸经过300～400℃的温度的热处理过程，从而发生酰亚胺化反应，形成聚酰亚胺。
反应式1
Figure BDA0001979670100000071
此时，优选地，相对于100重量份的聚酰胺酸，以0.5～3重量份的含量比来添加氢氧化钾。在相对于100重量份的聚酰胺酸，氢氧化钾的添加量小于0.5重量份的情况下，可能很难正常发挥出表面改性处理效果。相反，在相对于100重量份的聚酰胺酸，氢氧化钾的添加量大于3重量份的情况下，存在因过量添加氢氧化钾，导致聚酰胺酸或聚酰亚胺的酰亚胺结构被破坏，聚酰亚胺的物理物性与化学物性下降的问题，因此不是优选的。
将粘结层附着在热塑性聚酰亚胺层上
在将粘结层附着在热塑性聚酰亚胺层上的步骤(S130)中，将粘结层附着在热塑性聚酰亚胺层上。
此时，粘结层可以使用各种粘结剂，例如丙烯酸类粘结剂、橡胶类粘结剂、硅类粘结剂和聚乙烯醚。其中，在考虑到与半导体芯片的粘附性及分离后的洁净度等的情况下，更优选地，以(甲基)丙烯酸类聚合物为基础聚合物的(甲基)丙烯酸类粘结剂。
通过上述步骤(S110)～(S130)制备的本发明实施例的半导体封装回流工序用聚酰亚胺薄膜的热塑性聚酰亚胺层使用将具有醚基、酮基以及甲基中一种的芳香二胺与具有醚基、酮基以及甲基中一种的芳香二酐在有机溶剂中合成而制成的聚酰胺酸，因而使得热塑性聚酰亚胺层可以具有260℃以下的低玻璃化转变温度。
其结果，通过本发明实施例的方法来制备的半导体封装回流工序用聚酰亚胺薄膜采用玻璃化转变温度为260℃以下的热塑性聚酰亚胺层，因而在回流工序结束后，脱模性得到保证，可以使得与半导体芯片的装拆变得更容易。
而且，通过本发明实施例的方法来制备的半导体封装回流工序用聚酰亚胺薄膜采用表面经过羧基改性处理的热塑性聚酰亚胺层，通过表面改性的活性化，羧基可提高热塑性聚酰亚胺层与粘结层之间的粘结力，确保优秀的接合可靠性。
实施例
以下，对优选实施例进行说明以有助于对本发明的理解。但是，下述实施例仅用于例示本发明，在本发明的范畴及技术思想范围内普通技术人员可以进行多种变形及修改，这是显而易见的，这种变形及修改当然属于所附的发明要求保护范围。
1.聚酰亚胺薄膜的制备
实施例1
在410g的N-甲基-2-吡咯烷酮中，将36.6g的3,3'-二甲基-[1,1'-联苯]-4,4'-二胺与53.4g的3,3',4,4'-二苯甲酮四羧酸二酐聚合来合成聚酰胺酸。
接着，以6μm的厚度在热固性聚酰亚胺薄膜上涂敷添加了相对于100重量份聚酰胺酸的2重量份的氢氧化钾的聚酰胺酸组合物后，在350℃的温度下进行热处理，来形成表面经过羧基改性的热塑性聚酰亚胺薄膜。
接着，将丙烯酸类粘结薄膜附着在热塑性聚酰亚胺薄膜上来制备聚酰亚胺薄膜。
实施例2
在添加了相对于100重量份聚酰胺酸的1.5重量份的氢氧化钾后，除了在340℃的温度下进行热处理以外，以与实施例1相同的方法制备聚酰亚胺薄膜。
在添加了相对于100重量份聚酰胺酸的3.0重量份的氢氧化钾后，除了在360℃的温度下进行热处理以外，以与实施例1相同的方法制备聚酰亚胺薄膜。
比较例1
在410g的N-甲基-2-吡咯烷酮中，将36.6g的3,3'-二甲基-[1,1'-联苯]-4,4'-二胺与53.4g的3,3',4,4'-二苯甲酮四羧酸二酐聚合来合成聚酰胺酸后，以6μm的厚度在热固性聚酰亚胺薄膜上涂敷聚酰胺酸，然后在350℃的温度下进行热处理，从而形成热塑性聚酰亚胺薄膜。
然后，将丙烯酸类粘结薄膜附着在热塑性聚酰亚胺薄膜上来制备聚酰亚胺薄膜。
2.物性评价
表1示出通过实施例1～3及比较例1制备的聚酰亚胺薄膜的物性评价结果。
1)玻璃化转变温度
使用TA公司的Q400，测量热塑性聚酰亚胺层的玻璃化转变温度。
2)粘结力
将聚酰亚胺薄膜切割成100mm(长)×100mm(宽)，接着在260℃的温度、500kgf的压力下进行热压接后，根据IPC650方法，测量热塑性聚酰亚胺薄膜与粘结薄膜之间的粘结力。
表1
区分 玻璃化转变温度(℃) 粘结力(kgf/cm)
实施例1 196 1.3
实施例2 198 1.4
实施例3 203 1.5
比较例1 274 0.8
参照表1可以确认，在通过实施例1～3制备的聚酰亚胺薄膜的情况下，测量出热塑性聚酰亚胺层的玻璃化转变温度为196～203℃，全部满足目标值260℃以下。其结果，可以确认，在通过实施例1～3制备的聚酰亚胺薄膜的情况下，测量出热塑性聚酰亚胺薄膜与粘结薄膜之间的粘结力为1.3～1.5kgf/cm，具有优秀的粘结力。
相反，可以确认，在通过比较例1制备的聚酰亚胺薄膜的情况下，热塑性聚酰亚胺层的玻璃化转变温度为大于目标值的274℃，因此热塑性聚酰亚胺薄膜与粘结薄膜之间的粘结力仅为0.8kgf/cm。
以上，以本发明的实施例为中心进行了说明，但本发明所属技术领域的普通技术人员可以进行多种变更或变形。可以认为在不脱离本发明提供的技术思想范围内的这种变更或变形均属于本发明。因此，本发明的保护范围应根据所附发明要求保护范围来判断。

Claims (6)

1.一种半导体封装回流工序用聚酰亚胺薄膜，其特征在于，
包括：
非热塑性聚酰亚胺层；
热塑性聚酰亚胺层，层叠于上述非热塑性聚酰亚胺层上，具有回流工序温度以下的玻璃化转变温度；以及
粘结层，附着于上述热塑性聚酰亚胺层上，
上述热塑性聚酰亚胺层的表面经过羧基改性处理，
上述热塑性聚酰亚胺层使用将具有醚基、酮基以及甲基中一种的芳香二胺与具有醚基、酮基以及甲基中一种的芳香二酐在有机溶剂中合成而制成的聚酰胺酸，
通过在上述热塑性聚酰亚胺层上涂敷添加有氢氧化钾的上述聚酰胺酸，在300～400℃的温度下进行热处理，来对上述热塑性聚酰亚胺层的表面进行羧基改性处理。
2.根据权利要求1所述的半导体封装回流工序用聚酰亚胺薄膜，其特征在于，上述热塑性聚酰亚胺层具有260℃以下的玻璃化转变温度。
3.根据权利要求1所述的半导体封装回流工序用聚酰亚胺薄膜，其特征在于，上述芳香二胺包含3,3'-二甲基-[1,1'-联苯]-4,4'-二胺，上述芳香二酐包含3,3'，4,4'-二苯甲酮四羧酸二酐。
4.一种半导体封装回流工序用聚酰亚胺薄膜的制备方法，其特征在于，包括：
步骤(a)，准备非热塑性聚酰亚胺层；
步骤(b)，将具有回流工序温度以下的玻璃化转变温度且表面经过羧基改性处理的热塑性聚酰亚胺层附着在上述非热塑性聚酰亚胺层上；以及
步骤(c)，将粘结层附着在上述热塑性聚酰亚胺层上，
在上述步骤(b)中，将具有醚基、酮基以及甲基中一种的芳香二胺与具有醚基、酮基以及甲基中一种的芳香二酐在有机溶剂中合成来制备聚酰胺酸，从而使得上述热塑性聚酰亚胺层具有260℃以下的玻璃化转变温度，
通过在上述热塑性聚酰亚胺层上涂敷添加有氢氧化钾的上述聚酰胺酸，在300～400℃的温度下进行热处理，来对上述热塑性聚酰亚胺层的表面进行羧基改性处理。
5.根据权利要求4所述的半导体封装回流工序用聚酰亚胺薄膜的制备方法，其特征在于，上述芳香二胺包含3,3'-二甲基-[1,1'-联苯]-4,4'-二胺，上述芳香二酐包含3,3',4,4'-二苯甲酮四羧酸二酐。
6.根据权利要求4所述的半导体封装回流工序用聚酰亚胺薄膜的制备方法，其特征在于，相对于100重量份的上述聚酰胺酸，添加0.5～3重量份的上述氢氧化钾。
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