CN109616407A - The preparation method of the SiC-TVS device of high-power electromagnetic pulse protection - Google Patents
The preparation method of the SiC-TVS device of high-power electromagnetic pulse protection Download PDFInfo
- Publication number
- CN109616407A CN109616407A CN201811515536.1A CN201811515536A CN109616407A CN 109616407 A CN109616407 A CN 109616407A CN 201811515536 A CN201811515536 A CN 201811515536A CN 109616407 A CN109616407 A CN 109616407A
- Authority
- CN
- China
- Prior art keywords
- sic
- tvs
- preparation
- tvs device
- electromagnetic pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 35
- 239000000463 material Substances 0.000 claims abstract description 18
- 230000004044 response Effects 0.000 claims abstract description 16
- 230000000694 effects Effects 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims abstract description 11
- 238000005516 engineering process Methods 0.000 claims abstract description 10
- 230000005684 electric field Effects 0.000 claims abstract description 9
- 238000012545 processing Methods 0.000 claims abstract description 8
- 239000004065 semiconductor Substances 0.000 claims abstract description 4
- 238000012360 testing method Methods 0.000 claims description 26
- 238000002161 passivation Methods 0.000 claims description 12
- 238000013461 design Methods 0.000 claims description 9
- 230000015556 catabolic process Effects 0.000 claims description 7
- 239000004642 Polyimide Substances 0.000 claims description 4
- 230000004913 activation Effects 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 4
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- 229920001721 polyimide Polymers 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims 1
- 238000002955 isolation Methods 0.000 description 11
- 238000002347 injection Methods 0.000 description 6
- 239000007924 injection Substances 0.000 description 6
- 230000008901 benefit Effects 0.000 description 5
- 230000001681 protective effect Effects 0.000 description 5
- 239000000243 solution Substances 0.000 description 3
- 238000005094 computer simulation Methods 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 230000005284 excitation Effects 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000002441 reversible effect Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000006735 deficit Effects 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000001012 protector Effects 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
Abstract
The preparation method of the SiC-TVS device of high-power electromagnetic pulse protection, the present invention uses wide bandgap semiconductor SiC material, it is designed using NPN structure, the SiC-TVS device is prepared using both-end NPN structure, the doping concentration and thickness parameter in the area middle layer P are determined by the method for DC characteristic emulation and fast rise time impulse response emulation, for the electric field concentration effect for alleviating N+ anode area edge, achieve the purpose that extend main knot depletion region using knot terminal extension JTE technology, after the preparation of SiC device processing step, after tested, the device is in response speed, through-current capability, Si-TVS device similar in specification is significantly better than in hot operation characteristic, it is with a wide range of applications in high-temperature work environment and high-power electromagnetic pulse protection field.
Description
Technical field
The present invention relates to high-power electromagnetic pulse devices to protect field, and in particular to a kind of high-power electromagnetic pulse protection
The preparation method of SiC-TVS device.
Background technique
Known, with the development of Pulse Power Techniques, the safety of high-power electromagnetic pulse pair electronic information equipment is constituted
It seriously threatens.Surge impact is one of the important model of high-power electromagnetic impulse impairments electronic information equipment, and electromagnetic pulse can
It is coupled on the power supply line and communication line of electronic equipment and generates surge energy, first device can be caused by entering electronic equipment internal through conduction
Part and circuit damage, the danger for making important electronic information equipment face interference, even damage.For the conduction of electronic information equipment
Harassing and wrecking protection causes more and more attention.
Surge protective device is the important method for inhibiting equipment conduction interference, and TVS device is most fast temporary as responding at present
State protective device has many advantages, such as that fast response time, clamp voltage are accurate.Current TVS device is mostly Si sill, in lightning protection
There is relatively broad application in field.Compared with thunder and lightning, the harassing and wrecking waveform that high-power electromagnetic pulse couples on cable, radio-frequency component
More, there is faster rising edge, wherein nuclear electromagnetic pulse is several nanoseconds, and ultra wide band is magnitude of subnanosecond in time domain.Si-TVS
Device is limited to own material properties, will appear voltage overshoot phenomenon in fast rise time pulse protection, has seriously affected to rear end
The protection effect of equipment.
In addition, Si-TVS device mostly uses multiple low-voltages small for the device of high voltage grade and big through-current capability
The mode of through-flow grade devices in series is designed, and the junction capacity and knot inductance that will result in device itself in this way increase, to device
Part response speed affects greatly.For some special high temperature application environments, such as in the enging cabin of automobile, aircraft,
Higher leakage current also limits its normal use etc. to Si-TVS at high temperature.
Summary of the invention
To overcome deficiency present in background technique, the present invention provides a kind of SiC- of high-power electromagnetic pulse protection
The preparation method of TVS device, the present invention prepare SiC-TVS device using SiC material, and effective solution Si-TVS device is in height
Response speed is slower in power electromagnetic pulse protection, and through-current capability is poor, and the larger problem of leakage current under high temperature, is high power
Electromagnetic conductive harassing and wrecking protection provides new device selection scheme.
To realize that goal of the invention as described above, the present invention use technical solution as described below:
A kind of preparation method of the SiC-TVS device of high-power electromagnetic pulse protection, the preparation method use broad stopband first
Semiconductor SiC material makes SiC-TVS device, and SiC-TVS device is prepared using both-end NPN structure, emulated by DC characteristic
Determine the doping concentration and thickness parameter in the area middle layer P, with the method for fast rise time impulse response emulation to alleviate the anode region N+ side
The electric field concentration effect of edge uses knot terminal extension JTE technology to extend main knot depletion region, walks by SiC-TVS device technology
After rapid preparation, it is packaged using SMB form and contrast test.
The preparation method of the SiC-TVS device of the high-power electromagnetic pulse protection, the SiC-TVS device are both-end
NPN structure, design cathodic region N+ are SiC material conductive substrates, and with a thickness of 350 μm, anode region N+ is surface epitaxial layer, thickness
It is 0.5 μm, the doping concentration value of cathodic region N+ and anode region N+ are 1 × 1019 cm-3, exhausting when TVS break-through is guaranteed with this
Occur mainly in the low-doped area P.
The preparation method of the SiC-TVS device of the high-power electromagnetic pulse protection, extends JTE technology by knot terminal
The electric field concentration effect of N+ anode area edge is effectively relieved, by way of ion implanting, in the highly doped main knot side N+
Introduce that a coupled doping type is identical but the lower area N- of doping concentration, to reach the mesh for extending main knot depletion region
, so as to improve the breakdown voltage of device, improve the influence of the electric leakage of the device surface as caused by extension tablet quality.
The preparation method of the SiC-TVS device of the high-power electromagnetic pulse protection, the SiC-TVS device preparation
Processing step successively include epitaxial material preparation, SiC wafer RCA cleaning, shallow slot mesa mesa etch, JTE terminal structure formed,
End ring structure formed, ion implanting activation annealing, sacrifice oxidation and thermal oxide passivation, cathode and an anode Ohmic contact preparation,
Second level passivation, electrode thickeies and polyimide passivation.
Using technical solution as described above, the present invention has superiority as described below:
The present invention has given full play to that SiC material forbidden bandwidth is wide, electronics saturation drift velocity is high, critical breakdown strength is high, thermal conductivity
The high advantage of rate, under sub- ns impulses injection, the response speed and residual voltage level of SiC-TVS device will be considerably better than Si-
TVS device, under the injection of typical 10/1000 μ s surge pulse of thunder and lightning, SiC-TVS device shows more stronger than Si-TVS
Through-current capability, when device is close to when burning, the through-flow multiple of shallow-trench isolation JTE type SiC-TVS has reached the several times of Si-TVS, together
When, SiC-TVS device has preferable high temperature operation capability, and under 150 DEG C of high temperature, SiC-TVS ratio Si-TVS electric leakage is low multiple
The order of magnitude, SiC-TVS device have lower junction capacity, the about a quarter of same package area Si-TVS device, determine
SiC-TVS can preferably be applied in the higher surge protection circuit design of working frequency.
Detailed description of the invention
Fig. 1 is the structural diagram of the present invention；
Fig. 2 is the SiC-TVS device dynamic emulation that fast pulse injects lower different parameters；
Fig. 3 is the device architecture with terminal structure and exhausts signal；
Fig. 4 is the processing step of shallow-trench isolation JTE type SiC-TVS；
Fig. 5 is the shallow-trench isolation JTE type SiC-TVS device forward mode I-V test result that preparation finishes；
Fig. 6 is the test of shallow-trench isolation JTE type SiC-TVS ultra-wide degree impulses injection；
Fig. 7 is the contrast test that shallow-trench isolation JTE type SiC-TVS and Si-TVS is injected in 10/1000 μ s lightening pulse；
Fig. 8 is shallow-trench isolation JTE type SiC-TVS and Si-TVS I-V characteristic contrast test under high temperature environment.
Specific embodiment
The present invention can be explained in more detail by the following examples, the invention is not limited to the following examples；
A kind of preparation method of the SiC-TVS device of high-power electromagnetic pulse protection, the preparation in conjunction with described in attached drawing 1~8
Method uses wide bandgap semiconductor SiC material to make SiC-TVS device first, and SiC-TVS device uses both-end NPN structure system
It is standby, determine that the doping concentration in the area middle layer P and thickness are joined by the method for DC characteristic emulation and fast rise time impulse response emulation
Number uses knot terminal extension JTE technology to extend main knot depletion region, warp for the electric field concentration effect for alleviating N+ anode area edge
After crossing the preparation of SiC-TVS device process steps, it is packaged using SMB form and contrast test；The SiC-TVS device is double
NPN structure is held, design cathodic region N+ is SiC material conductive substrates, and with a thickness of 350 μm, anode region N+ is surface epitaxial layer, thick
Degree is 0.5 μm, and the doping concentration value of cathodic region N+ and anode region N+ are 1 × 1019 cm-3, consumption when guaranteeing TVS break-through with this
The low-doped area P is occurred mainly in the greatest extent；Further, JTE technology is extended by knot terminal N+ anode area edge is effectively relieved
Electric field concentration effect introduces a coupled doping in the highly doped main knot side N+ by way of ion implanting
Type is identical but the lower area N- of doping concentration, to achieve the purpose that extend main knot depletion region, so as to improve the breakdown potential of device
Pressure improves the influence of the electric leakage of the device surface as caused by extension tablet quality.
Further, the processing step of SiC-TVS device preparation successively include epitaxial material prepare, SiC wafer RCA it is clear
It washes, shallow slot mesa mesa etch, JTE terminal structure are formed, cut-off ring structure is formed, ion implanting activation annealing, sacrifice oxidation
And thermal oxide passivation, the preparation of cathode and an anode Ohmic contact, second level passivation, electrode thickening and polyimide passivation, it needs to illustrate
The processing step for being the preparation of SiC-TVS device and SMB form to be packaged with contrast test be the prior art, simultaneously because
It is not the emphasis that the present invention protects, therefore does not do tired in detail state to its particular content.
Further, using the preparation of NPN structure, working principle is not simple by the two-way SiC-TVS as shown in Figure 1:
The avalanche breakdown of PN junction, but with the increase of reverse bias, the area middle layer P constantly exhausts, and when the area P fully- depleted, device, which reaches, wears
Logical state, can make high current pass through at this time.Pass-through state is relatively stable compared to avalanche condition.The punch through voltage of device is big
The small doping and thickness depending on the area P.Therefore, intend being required according to direct current target voltage and dynamic nanosecond and subnanosecond pulse response
Obtain the structural parameters in the area middle layer P.
Design cathodic region N+ is SiC material conductive substrates, and thickness is thicker (350 μm of representative value)；Anode region N+ is outside surface
Prolong layer, thinner thickness (0.5 μm of representative value).The area Liang Ge N+ be it is highly doped (typical concentration value be 1 × 1019 cm-3), it is protected with this
Exhausting when demonstrate,proving TVS break-through occurs mainly in the low-doped area P.
Consider the design of P plot structure parameter.Since identical target can be achieved in different doping concentrations and thickness combination
Punch through voltage, and different doping concentrations and thickness combination influence the RC parameter of device, and then the TVS dynamic for influencing device is rung
Answer characteristic.Therefore, other than in addition to the DC voltage the considerations of, it is also necessary to which be closely connected TVS dynamic response characteristic, finally to determine the area P
Structural parameters.
It is illustrated in figure 2 the SiC-TVS device dynamic simulation result that fast pulse injects lower different parameters, specific method is to adopt
With TCAD software, dynamic simulation research is carried out to several groups of typical area P parameters.Test circuit is that surge pulse is injected into protector
Part end, protective device rear end are grounded by series resistance, and series impedance is 50 Ω.
By test result it is found that the response characteristic of device is this it appears that device for given fast pulse pumping signal
The influence of part parasitic capacitance.Device area is the key factor for influencing parasitic capacitance；When extension layer parameter is mixed towards big thickness, gently
When miscellaneous direction changes, the response signal amplitude of same area device increases；When thickness is very big, doping is very low, device is to excitation
Signal cannot make the response of clamper clipping.Simulation result more than comprehensive comparison, number 1 the area P parameter (i.e. 3.2 μm of thickness,
Doping concentration 5 × 1016 cm-3) response signal is optimal from clamper Limiting effect.It is also used in the development of practical devices
The area the P parameter of number 3 is used for the Experimental comparison of structure design.
As shown in figure 3, extending JTE technology using knot terminal the electric field concentration effect of N+ anode area edge is effectively relieved.
JTE technology introduces a coupled doping in the highly doped main knot side N+ generally by the mode of ion implanting
Type is identical but the lower area N- of doping concentration, to achieve the purpose that extend main knot depletion region.One suitable JTE N- of doping
Area will gradually be exhausted with the increase of device reverse bias, and the ionized donor impurity in the area N- becomes effective additional charge, be made
Winner ties intensive equipotential lines that edge is formed due to curvature effect surface extension outward, alleviates the electric field at this and concentrates and imitates
It answers, therefore the breakdown voltage of device is improved.
It is as described in Figure 4 the processing step of SiC-TVS device preparation, device preparation technology includes standard RCA clean, shallow slot
Mesa mesa etch, JTE terminal structure are formed, cut-off ring structure is formed, ion implanting activation annealing, sacrifice oxidation and thermal oxide
Passivation, the preparation of cathode and an anode Ohmic contact, second level passivation, electrode thicken, polyimide passivation.
The shallow-trench isolation JTE type SiC-TVS device sample and device forward direction Working mould finished as described in Figure 5 for preparation
The basic I-V electrology characteristic of formula, is sampled as a test cell.As can be seen that under the conditions of the electric current instrument maximum current limliting of 8 mA,
Device has very low leakage current under off-state, and sharp keen snowslide break-through trend is presented in I-V characteristic, and in unit device one
Cause property is preferable, which reflects preparing by device structure design and process optimization, realizes good SiC TVS diode basis
Electrology characteristic, the punch through voltage of the device concentrate between 140~190 V.
Test result for the device under ultra-wideband pulse injection as described in Figure 6, which can inject
It rises along being 180 ps or so, pulse halfwidth is the pulse signal of 220 ps, and pulse voltage amplitude is adjustable less than 3 kV.It is right
SiC-TVS device carries out the encapsulation of SMB form, randomly selects three groups of devices and is designated as #1-1, #1-9, #1-14, the input of registering device
Voltage and residual voltage, as shown in table 1.
1 shallow-trench isolation JTE type SiC-TVS device ultra-wideband pulse protection effect of table
As shown in table 1, which can play protective action to the protective device that rising edge is 180 ps, show the sound of the device
Answer speed advantage.The reason is that compared with Si, the critical breakdown strength of SiC material is higher caused by the material advantage of SiC,
Drift layer thickness and active region area are significantly less than corresponding Si device, while the electronics saturation drift velocity of SiC is higher, reflection
There is faster response speed on device.
It is as described in Figure 7 test result of the device under 10/1000 μ s lightning surge impulses injection, selects close PN junction
Junction area and the Si-TVS device (SMA6J130CA) of voltage class compare.Wherein the junction area of SiC-TVS device is 1.1
×1.1mm2, the junction area of Si-TVS device (SMA6J130CA) is 1.3 × 1.3mm2。
It is gradually increased input voltage, the residual voltage of registering device and passes through electric current.For Si-TVS device, device handbook
In for IppNumerical value carried out test, it is right for convenience of comparing since device handbook test number is there are certain allowance
Si-TVS device takes the I of standardppMultiple test its can by maximum tolerance electric current.SMA6J130CA device is 10/1000
I under μ s waveformPP For 2.9A.Shallow-trench isolation JTE type SiC-TVS device lightning surge test result is as shown in table 2, Si-TVS device
Part (SMA6J130CA) test result is as shown in table 3.
2 shallow-trench isolation JTE type SiC-TVS device of table, 10/1000 μ s protection against lightning surge characteristic test
The test of 3 SMA6J130CA device of table, 10/1000 μ s maximum surge tolerance
It can be seen from contrast test data under the injection of 10/1000 μ s surge pulse, SiC-TVS device has preferable electricity
Pressing tongs position and protection effect.Importantly, SiC-TVS device, which is shown, compares Si-TVS in global input voltage range
Stronger through-current capability: when device is close to when burning, the through-flow multiple of shallow-trench isolation JTE type SiC-TVS has reached the 4 of Si-TVS
Times.This test result reflected SiC-TVS have the advantages that rigidity high current density characteristic this.
It is as described in Figure 8 comparison I-V test result of the SiC-TVS and Si-TVS in high temperature DC test system.In order to
With test macro requirement, extra soldered draws long pin at SMB encapsulation SiC-TVS external electrode pin.From contrast test result
As can be seen that the high temperatures typical electric leakage of SiC-TVS is about hundred pico-ampere levels (~10 under 150 DEG C of high temperature-10A), Si-TVS production
The high temperatures typical electric leakage of product is microampere order (~10-6A), low 4 orders of magnitude of SiC-TVS ratio Si-TVS electric leakage.Low drain under high temperature
Electricity is the reason is that, broad stopband SiC material has extremely low intrinsic carrier concentration (19 orders of magnitude lower than Si material), this is significantly
The intrinsic excitation temperature threshold of SiC device is reduced, so that device still is able to keep the blocking characteristics of Low dark curient at high temperature, this
The high-temperature stable ability to work of SiC-TVS will be greatly improved.
Part not in the detailed description of the invention is the prior art.
The embodiment selected herein to disclose goal of the invention of the invention, is presently considered to be suitable, still,
It is to be understood that the present invention is intended to include all changes and improvement that all belong to the embodiment in this design and invention scope.
Claims (4)
1. a kind of preparation method of the SiC-TVS device of high-power electromagnetic pulse protection, it is characterized in that: the preparation method is first
SiC-TVS device is made using wide bandgap semiconductor SiC material, SiC-TVS device is prepared using both-end NPN structure, by straight
The method of properties of flow emulation and fast rise time impulse response emulation determines the doping concentration and thickness parameter in the area middle layer P, to alleviate N
The electric field concentration effect of+anode area edge uses knot terminal extension JTE technology to extend main knot depletion region, by SiC-TVS device
After the preparation of part processing step, it is packaged using SMB form and contrast test.
2. the preparation method of the SiC-TVS device of high-power electromagnetic pulse protection according to claim 1, it is characterized in that:
The SiC-TVS device is both-end NPN structure, and design cathodic region N+ is SiC material conductive substrates, with a thickness of 350 μm, anode
Area N+ is surface epitaxial layer, and with a thickness of 0.5 μm, the doping concentration value of cathodic region N+ and anode region N+ are 1 × 1019 cm-3, with
This guarantees that exhausting when TVS break-through occurs mainly in the low-doped area P.
3. the preparation method of the SiC-TVS device of high-power electromagnetic pulse protection according to claim 1, it is characterized in that:
The electric field concentration effect of N+ anode area edge is effectively relieved by knot terminal extension JTE technology, by way of ion implanting,
The identical but lower area N- of doping concentration in highly doped N+ one coupled doping type of main knot side introducing, to reach
Improve the device table as caused by extension tablet quality to the purpose for extending main knot depletion region so as to improve the breakdown voltage of device
The influence of face electric leakage.
4. the preparation method of the SiC-TVS device of high-power electromagnetic pulse protection according to claim 1, it is characterized in that:
The processing step of the SiC-TVS device preparation successively includes that epitaxial material prepares, SiC wafer RCA is cleaned, shallow slot mesa table top
Etching, JTE terminal structure are formed, cut-off ring structure is formed, ion implanting activation annealing, sacrifice oxidation and thermal oxide passivation, yin
Pole and anode ohmic contact preparation, second level passivation, electrode thickeies and polyimide passivation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811515536.1A CN109616407A (en) | 2018-12-12 | 2018-12-12 | The preparation method of the SiC-TVS device of high-power electromagnetic pulse protection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811515536.1A CN109616407A (en) | 2018-12-12 | 2018-12-12 | The preparation method of the SiC-TVS device of high-power electromagnetic pulse protection |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109616407A true CN109616407A (en) | 2019-04-12 |
Family
ID=66007992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811515536.1A Pending CN109616407A (en) | 2018-12-12 | 2018-12-12 | The preparation method of the SiC-TVS device of high-power electromagnetic pulse protection |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109616407A (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101877358A (en) * | 2009-04-30 | 2010-11-03 | 万国半导体有限公司 | Transient voltage suppresser with symmetrical puncture voltage |
| CN102290337A (en) * | 2011-09-26 | 2011-12-21 | 南京国盛电子有限公司 | Manufacturing method for silicon epitaxial wafer of low-voltage TVS (transient voltage suppressor) |
| CN103035669A (en) * | 2012-06-04 | 2013-04-10 | 上海华虹Nec电子有限公司 | Pn junction with ultra-low junction capacity density and manufacture method thereof |
| CN103077938A (en) * | 2011-10-26 | 2013-05-01 | 通用电气公司 | Method and system for transient voltage suppressors |
| CN105576041A (en) * | 2014-10-03 | 2016-05-11 | 通用电气公司 | Structure and method for transient voltage suppression devices with a two-region base |
| US20180286852A1 (en) * | 2017-03-31 | 2018-10-04 | Alpha And Omega Semiconductor (Cayman) Ltd. | High surge bi-directional transient voltage suppressor |
-
2018
- 2018-12-12 CN CN201811515536.1A patent/CN109616407A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101877358A (en) * | 2009-04-30 | 2010-11-03 | 万国半导体有限公司 | Transient voltage suppresser with symmetrical puncture voltage |
| CN102290337A (en) * | 2011-09-26 | 2011-12-21 | 南京国盛电子有限公司 | Manufacturing method for silicon epitaxial wafer of low-voltage TVS (transient voltage suppressor) |
| CN103077938A (en) * | 2011-10-26 | 2013-05-01 | 通用电气公司 | Method and system for transient voltage suppressors |
| CN103035669A (en) * | 2012-06-04 | 2013-04-10 | 上海华虹Nec电子有限公司 | Pn junction with ultra-low junction capacity density and manufacture method thereof |
| CN105576041A (en) * | 2014-10-03 | 2016-05-11 | 通用电气公司 | Structure and method for transient voltage suppression devices with a two-region base |
| US20180286852A1 (en) * | 2017-03-31 | 2018-10-04 | Alpha And Omega Semiconductor (Cayman) Ltd. | High surge bi-directional transient voltage suppressor |
Non-Patent Citations (1)
| Title |
|---|
| 黄薇等: "瞬态电压抑制二极管的建模及仿真", 《太赫兹科学与电子信息学报》 * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101501859A (en) | High power insulated gate bipolar transistors | |
| CN103534811A (en) | Semiconductor device and method for manufacturing semiconductor device | |
| US20120007103A1 (en) | Silicon carbide bipolar junction transistor | |
| CN107301994B (en) | Transient Voltage Suppressor and preparation method thereof | |
| CN107123640B (en) | Semiconductor devices, circuit unit and integrated circuit | |
| CN106298967A (en) | Silicon carbide diode and preparation method thereof | |
| CN106601826A (en) | Fast recovery diode and manufacturing method thereof | |
| CN107978642A (en) | A kind of GaN base heterojunction diode and preparation method thereof | |
| CN104409454A (en) | NLDMOS anti-static protection tube | |
| Lynch et al. | Design considerations for high voltage SiC power devices: An experimental investigation into channel pinching of 10kV SiC junction barrier schottky (JBS) diodes | |
| US20150043114A1 (en) | Junction-less insulated gate current limiter device | |
| CN105679836B (en) | Ultra-low capacitance TVS diode structure and preparation method thereof | |
| CN106129125B (en) | Three ends carry the lateral constant current device and its manufacturing method of safeguard function | |
| CN109616407A (en) | The preparation method of the SiC-TVS device of high-power electromagnetic pulse protection | |
| CN203179900U (en) | A fast recovery diode FRD chip | |
| CN103474346A (en) | Realization method of transient voltage suppression diode PN junction | |
| CN105826406A (en) | Insulated-gate photoconductive semiconductor switch | |
| CN205595336U (en) | Contrary type IGBT back structure of leading | |
| Wang et al. | Analysis of 600 V/650 V SiC schottky diodes at extremely high temperatures | |
| Ghandi et al. | High voltage, low on-resistance 4H-SiC BJTs with improved junction termination extension | |
| CN110504312B (en) | Transverse IGBT with short circuit self-protection capability | |
| CN107331704B (en) | A kind of grid voltage control thyristor device | |
| CN109768089B (en) | Voltage-controlled sampling device based on SenseFET | |
| CN205582945U (en) | Ultralow electric capacity TVS diode | |
| CN207068852U (en) | Transient voltage suppressor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190412 |
|
| RJ01 | Rejection of invention patent application after publication |