CN109597251B - LCD binding pin structure, glass substrate and module structure - Google Patents

LCD binding pin structure, glass substrate and module structure Download PDF

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CN109597251B
CN109597251B CN201811463294.6A CN201811463294A CN109597251B CN 109597251 B CN109597251 B CN 109597251B CN 201811463294 A CN201811463294 A CN 201811463294A CN 109597251 B CN109597251 B CN 109597251B
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lcd
binding
chip
glass substrate
pin structure
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CN109597251A (en
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范金智
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China Display Optoelectronics Technology Huizhou Co Ltd
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China Display Optoelectronics Technology Huizhou Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals

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  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)

Abstract

The invention relates to an LCD binding pin structure which comprises a plurality of binding pins and a plurality of switch elements. The drain terminal of each switch element is correspondingly connected with one binding pin, the source terminals of the switch elements are mutually connected, each binding pin is correspondingly used for receiving an electric signal, and each switch element is used for conducting each binding pin under the control of the electric signal. Above-mentioned LCD binds pin structure, optimized the LCD design, when binding the chip on LCD glass substrate, can bind the effect self-checking, judge promptly and bind the impedance size between two liang of signal lines of chip IC on the LCD glass substrate that has this LCD binding pin structure and draw binding effect, improved the check-out ability and the efficiency that LCD binds, bind the effect for the inspection and provide the feasibility scheme, promote product performance, reduce project failure cost, make things convenient for the analysis and the improvement of bad product.

Description

LCD binding pin structure, glass substrate and module structure
Technical Field
The invention relates to the technical field of liquid crystal panel display, in particular to an LCD binding pin structure, an LCD glass substrate and an LCD module structure.
Background
At present, one process in the production of Liquid Crystal Display (LCD) panels is COG bonding, i.e., an IC is bonded on LCD glass through an ACF to achieve functional continuity. The process may have false voltage or defect, i.e. the corresponding pad of IC and LCD is not conducted or the impedance is abnormal. At present, the inspection modes of the process include a conventional COG (chip on glass) mode and a full inspection mode, wherein the conventional COG mode is used for performing selective inspection to confirm the binding effect, and the full inspection mode is used for performing functional inspection on the produced finished product.
However, in the conventional COG method, a microscope can only check and confirm the binding effect, since the inspection is not full inspection, there is a possibility of missing inspection, the full inspection needs to produce a finished product and then perform functional inspection, and In-cell needs to detect whether the touch function of a display screen is normal or not, and at this time, the qualified product is also detected, because the qualified product may have false voltage failure, such as poor pressing effect, false voltage failure caused by too few pressing particles and large impedance, and the like, and the function during inspection is not affected temporarily, but the qualified product may fail after being electrified for a long time after aging, and the quality and service life of the LCD liquid crystal panel are affected seriously.
Disclosure of Invention
Based on this, it is necessary to provide an LCD bonding pin structure, an LCD glass substrate and an LCD module structure aiming at the technical problem of how to improve the detection capability and efficiency of LCD bonding.
A LCD binding pin structure comprises a plurality of binding pins and a plurality of switch elements;
gate terminals of the respective switching elements are connected to each other;
source terminals of the respective switching elements are connected to each other;
the drain terminal of each switch element is correspondingly connected with one binding pin, the source terminals of the switch elements are mutually connected, each binding pin is correspondingly used for receiving an electric signal, and each switch element is used for controlling and conducting each binding pin.
Above-mentioned LCD binds pin structure, the LCD design has been optimized, when binding the chip on LCD glass substrate, can bind the effect self-checking, judge promptly and bind the impedance size between two liang of signal lines of chip IC on the LCD glass substrate that has this LCD binding pin structure and draw the effect of binding, the detection ability and the efficiency that LCD binds have been improved, bind the effect for the inspection and provide the feasibility scheme, promote product performance, reduce project failure cost, make things convenient for the analysis and the improvement of bad product.
In one embodiment, the switching element is a thin film field effect transistor device.
In one embodiment, the switching element comprises a gate terminal, a drain terminal and a source terminal, wherein the gate terminal corresponds to a gate electrode of the thin film field effect transistor, the drain terminal corresponds to a drain electrode of the thin film field effect transistor, and the source terminal corresponds to a source electrode of the thin film field effect transistor; the drain terminal is connected with the top end of the binding pin, and the source terminals of the switch elements are connected with each other.
In one embodiment, the drain terminal is connected to the top end of the bonding pin, and the source terminal of each of the switching elements is connected to the gate terminal.
In one embodiment, a number of the binding pins are arranged in a matrix distribution.
In one embodiment, the LCD bonding pin structure further includes a cross positioning frame disposed on one side of the plurality of bonding pins.
In one embodiment, the number of the cross positioning frames is two.
In one embodiment, the two cross positioning frames are respectively arranged on two sides of the binding pins.
The present invention also provides an LCD glass substrate comprising: the LCD binding pin structure comprises a glass plate and the LCD binding pin structure in any embodiment, wherein the LCD binding pin structure is arranged on the glass plate.
Above-mentioned LCD glass substrate binds pin structure through setting up LCD, has improved the product yield.
The invention also provides an LCD module structure, which comprises an IC chip and the LCD glass substrate in any embodiment, wherein the IC chip is bound and arranged on the LCD glass substrate.
Above-mentioned LCD module structure binds pin structure through setting up LCD, has improved the product yield.
Drawings
FIG. 1 is a block diagram of an embodiment of an LCD bonding pin structure;
FIG. 2 is a block diagram of a conventional LCD binding pin structure;
FIG. 3 is a block diagram of a signal line structure of a chip;
FIG. 4 is an electrical schematic diagram of an LCD bonding pin structure according to one embodiment;
FIG. 5 is an electrical schematic diagram of an LCD bonding pin structure according to another embodiment;
FIG. 6 is a schematic diagram illustrating voltage equivalence of a chip signal line pin without a loading voltage after the chip is bound to an LCD binding pin structure according to an embodiment;
fig. 7 is a schematic diagram illustrating voltage equivalence when a chip signal line pin loads a voltage after the chip is bound to an LCD-bound pin structure in one embodiment.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless explicitly specified otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be interconnected within two elements or in a relationship where two elements interact with each other unless otherwise specifically limited. The specific meanings of the above terms in the present invention can be understood according to specific situations by those of ordinary skill in the art.
In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "above," and "over" a second feature may be directly on or obliquely above the second feature, or simply mean that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. As used herein, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and the like are for purposes of illustration only and do not denote a single embodiment.
Referring to fig. 1, the present invention provides an LCD bonding pin structure 10, wherein the LCD bonding pin structure 10 includes a plurality of bonding pins 110 and a plurality of switching elements 120. The gate terminals 121 of the respective switching elements 120 are connected to each other. A drain terminal 123 of each switch element 120 is correspondingly connected to one of the binding pins 110, source terminals 122 of the switch elements 120 are mutually connected, each binding pin 110 is correspondingly used for receiving an electrical signal, and each switch element 120 is used for controlling to turn on each binding pin 110, for example, each switch element 120 is used for turning on each binding pin 110 under the control of the electrical signal, so that the impedance between the binding pins 110 is infinitesimal. For example, the electrical signal is a voltage signal.
The LCD binding pin structure 10 optimizes the LCD design, and when the binding chip is on the LCD glass substrate, the binding effect self-check can be performed, that is, the binding effect is obtained by determining the impedance between two signal lines of the chip IC bound on the LCD glass substrate having the LCD binding pin structure, if the gate terminal is loaded with voltage, the source terminal and the drain terminal are turned on, and then it is determined whether the impedance between two signal lines of the chip IC is infinitesimal, if so, the binding effect is good, and there is no open circuit; if not, an open circuit phenomenon exists between the two signal wires. Therefore, the detection capability and efficiency of LCD binding are improved, a feasible scheme is provided for detecting the binding effect, the product performance is improved, the project failure cost is reduced, and the analysis and the improvement of bad products are facilitated.
In another embodiment, the gate terminals 121 of the switch elements 120 are connected to each other, the drain terminal 123 of each switch element 120 is correspondingly connected to a bonding pin 110, and the source terminals 122 of the switch elements 120 are connected to each other. In this embodiment, the chip is bonded on the LCD glass substrate, and when the chip applies a voltage electrical signal, the gate terminal 121 of the switching element 120 is powered on, and each switching element 120 is turned on, so that the self-check of the bonding effect can be performed. For example, the binding effect can be obtained by judging the impedance between every two signal lines of a chip IC bound on an LCD glass substrate with the LCD binding pin structure, the detection capability and efficiency of LCD binding are improved, a feasible scheme is provided for detecting the binding effect, the product performance is improved, the project failure cost is reduced, and the analysis and improvement of bad products are facilitated.
In one embodiment, the switching element 120 is a transistor device. Specifically, the switching element 120 is a thin film field effect transistor device, i.e., a TFT device. In this way, the characteristics that the transistor device can be used as a switching device can be utilized, on one hand, the circuit redundancy structure can be reduced, and on the other hand, the transistor can be selected according to the actual requirements.
In one embodiment, the switching element 120 includes a gate terminal 121, a drain terminal 123 and a source terminal 122, the gate terminal 121 corresponds to a gate of the thin film transistor, the drain terminal 123 corresponds to a drain of the thin film transistor, and the source terminal 122 corresponds to a source of the thin film transistor. The drain terminal 123 is connected to the top end of the bonding pin 110, and the respective source terminals 122 are connected to each other. In another embodiment, the drain terminal 123 is connected to the top end of the bonding pin 110, and the source terminal 122 of each switching element 120 is connected to the gate terminal 121. It will be appreciated that due to the interconnection between the respective switching elements, the source terminal to gate terminal connection also corresponds to the interconnection of the respective source terminals 122. In one embodiment, the gate terminals 121 of the respective switching elements 120 are connected to each other. The source terminals 122 of the respective switching elements 120 are connected to each other. The drain terminal 123 of each switching element 120 is connected to a corresponding one of the bonding pins 110. It should be noted that, the connection with the bonding pin 110 may be the drain terminal 123 of the switch element 120, or the source terminal 122 of the switch element 120, but the gate terminals 121 of the switch element 120 can only be connected to each other, so that when the chip signal line is loaded with voltage, the bonding effect self-check is performed in cooperation with the drain terminal 123 and the source terminal 122, that is, when the chip signal line is loaded with voltage, the voltage is applied to the gate terminal 121, and the drain terminal 123 and the source terminal 122 are turned on to determine the open circuit phenomenon of bonding. When no voltage is applied to the gate terminal 121, the drain terminal 123 and the source terminal 122 are not conducted, and a self-test for short circuit can be performed.
As shown in fig. 2, fig. 2 is a schematic block diagram illustrating a conventional LCD bonding pin structure, which is also a simplified diagram of a conventional LCD physical bonding pad (pin). Fig. 3 shows a corresponding bonding IC, and fig. 3 shows a schematic block diagram of a chip signal line structure, in which the left and right cross frames are used for bonding and alignment, and S1, S2, S3 \8230, S8230, S9 are signal lines bonded to the LCD. It is understood that if the signal line is a line of the touch portion, it itself has an open short detection function. Fig. 4 and fig. 5 respectively show electrical structural diagrams of LCD bonding pin structures in different embodiments, that is, the LCD bonding pin structure of the present invention is formed by adding a TFT switching device to the LCD bonding Pad special design. It can be understood that, in the LCD bonding pin structure of the present invention, there are a plurality of connection manners of the switching elements, and fig. 4 and 5 only show two connection manners, respectively, in other embodiments, the connection manner of the switching elements only needs to be such that after the bonding chip is on the LCD glass substrate, the TFT device is turned on when the chip loads a voltage electrical signal to the gate terminal, so that the impedances between the glass pads L1, L2, L3 \8230 \ 8230, L9 are infinitesimal.
As shown in fig. 6 and 7, fig. 6 and 7 respectively show voltage equivalent diagrams of a chip signal line pin without a loaded voltage and a chip signal line pin with a loaded voltage after the chip is bound to the LCD binding pin structure, and it can be understood that, on one hand, when S does not apply a voltage, the TFT device does not conduct, and at this time, the impedance between the glass pads L1, L2, L3 \8230, L9 is infinite, which is equivalent to that of a conventional common LCD. At the moment, the impedance of the IC pads S1, S2, S3 \8230 \8230andS 9 is mutually judged in pairs, if the impedance is infinite, the binding has no short circuit phenomenon, and if one or more pairs of low resistance values exist, the binding has the short circuit abnormal condition and is judged to be bad. On the other hand, when a voltage is applied to S, the TFT device plays a conducting role, at the moment, the impedance between the glass pads L1, L2 and L3 \8230, the impedance between the glass 8230and L9 is infinitesimal, at the moment, the glass is equivalent to a large PIN, the IC is equivalent to being pressed and pasted on an iron sheet, if the binding is good, the impedance of the IC pads S1, S2 and S3 \8230, the impedance between every two S9 is judged mutually, and if the impedance is infinitesimal, the binding has no open circuit phenomenon. If one or more than one pair of conditions with larger resistance exists, open circuit is bound, for example, the IC pad and the LCD pad are not well connected and have abnormity, namely, the abnormal condition is judged to exist, and the binding is judged to be poor.
As shown in fig. 2 to 7, in one embodiment, a plurality of binding pins 110 are arranged in a matrix. As another example, several binding pins 110 are distributed in a row. In one embodiment, the LCD binding pin structure further includes a cross-shaped positioning frame disposed on one side of the plurality of binding pins. For example, the number of the cross spacers is two. For another example, two cross positioning frames are respectively arranged on two sides of the binding pins. Accurate positioning and binding can be carried out through the cross positioning frame, and binding efficiency is improved.
It should be noted that the present invention also provides an LCD glass substrate, i.e. a glass pad, comprising: the glass plate and the LCD in any of the above embodiments bind the pin structure, and the LCD binds the pin structure to be disposed on the glass plate. This LCD glass substrate binds pin structure through setting up LCD, has improved the product yield.
It should be noted that the present invention further provides an LCD module structure, which includes an IC chip and an LCD glass substrate in any of the above embodiments, wherein the IC chip is bound and disposed on the LCD glass substrate. This LCD module structure binds the pin structure through setting up LCD, has improved the product yield.
All possible combinations of the technical features of the above embodiments may not be described for the sake of brevity, but should be considered as within the scope of the present disclosure as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is specific and detailed, but not to be understood as limiting the scope of the invention. It should be noted that various changes and modifications can be made by those skilled in the art without departing from the spirit of the invention, and these changes and modifications are all within the scope of the invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (8)

1. A detection method for an LCD binding pin structure of an LCD module structure, wherein the LCD module structure comprises the LCD binding pin structure which comprises a plurality of binding pins, and is characterized in that the LCD module structure comprises an IC chip and an LCD glass substrate, and the IC chip is bound and arranged on the LCD glass substrate;
the LCD glass substrate comprises a glass plate and the LCD binding pin structure, and the LCD binding pin structure is arranged on the glass plate;
the LCD binding pin structure also comprises a plurality of switch elements;
gate terminals of the respective switching elements are connected to each other;
the drain end of each switch element is correspondingly connected with one binding pin, the source ends of the switch elements are mutually connected, each binding pin is correspondingly used for receiving an electric signal, and each switch element is used for controlling and conducting each binding pin; the detection method of the LCD binding pin structure comprises the following steps:
when the IC chip is bound on the LCD glass substrate, the signal lines of the IC chip are bound on the binding pins of the LCD glass substrate in a one-to-one correspondence manner;
when the grid end of the switch element is not electrified, judging the impedance between every two signal lines of the IC chip bound on the LCD glass substrate with the LCD binding pin structure by means of the IC chip so as to judge whether short circuit exists in the binding;
when the grid end of the switch element is electrified, the impedance between every two signal lines of the IC chip bound on the LCD glass substrate with the LCD binding pin structure is judged by means of the IC chip so as to judge whether the binding has an open circuit.
2. The method for detecting the structure of LCD bonding pins according to claim 1, wherein the switching element is a transistor device.
3. The method of claim 2, wherein the switching element is a thin film field effect transistor device.
4. The method of claim 3, wherein the switching element comprises a gate terminal, a drain terminal and a source terminal, the gate terminal corresponds to the gate of the thin film transistor, the drain terminal corresponds to the drain of the thin film transistor, and the source terminal corresponds to the source of the thin film transistor; the drain terminal is connected with the top end of the binding pin, and the source terminals of the switch elements are connected with each other.
5. The method as claimed in claim 1, wherein the drain terminal is connected to the top end of the bonding pin, and the source terminal of each of the switching elements is connected to the gate terminal.
6. The method of claim 1, wherein the LCD bonding pin structure further comprises a cross-shaped positioning frame disposed on one side of the plurality of bonding pins.
7. The method of claim 6, wherein the number of the cross-shaped positioning frames is two.
8. The method of claim 1, wherein the LCD bonding pin structure further comprises two cross-shaped positioning frames, and the two cross-shaped positioning frames are respectively disposed on two sides of the plurality of bonding pins.
CN201811463294.6A 2018-12-03 2018-12-03 LCD binding pin structure, glass substrate and module structure Active CN109597251B (en)

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CN110361601B (en) * 2019-08-02 2021-05-25 深圳市全洲自动化设备有限公司 Method for rapidly testing electric indexes of pins of LCD (liquid crystal display) device
CN111487822B (en) * 2020-04-23 2022-11-04 厦门天马微电子有限公司 Array substrate, display device and binding detection method thereof

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Publication number Priority date Publication date Assignee Title
CN108459441A (en) * 2018-04-12 2018-08-28 京东方科技集团股份有限公司 A kind of display device and preparation method thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
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KR102045448B1 (en) * 2013-03-04 2019-11-18 엘지디스플레이 주식회사 Liquid crystal display, LCD
CN204289400U (en) * 2014-12-10 2015-04-22 北京海泰方圆科技有限公司 A kind ofly test the device that wafer nation determines break-make
CN105632382B (en) * 2016-01-04 2018-05-18 京东方科技集团股份有限公司 The method of display device and its detection binding region binding situation
CN206387869U (en) * 2016-12-29 2017-08-08 华显光电技术(惠州)有限公司 Measurement jig
CN108761203B (en) * 2018-03-30 2021-06-29 成都奕斯伟芯片设计有限公司 Contact resistance test circuit and chip

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108459441A (en) * 2018-04-12 2018-08-28 京东方科技集团股份有限公司 A kind of display device and preparation method thereof

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