CN110675737A - Pixel driving circuit and display panel - Google Patents
Pixel driving circuit and display panel Download PDFInfo
- Publication number
- CN110675737A CN110675737A CN201910916325.7A CN201910916325A CN110675737A CN 110675737 A CN110675737 A CN 110675737A CN 201910916325 A CN201910916325 A CN 201910916325A CN 110675737 A CN110675737 A CN 110675737A
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- display panel
- chip
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- film
- impedance value
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Abstract
The application provides a display panel assembly and a detection method thereof, wherein the display panel assembly comprises: the display device comprises a display panel, a circuit board and a chip on film for connecting the display panel and the circuit board; the chip on film is provided with a plurality of first test pins, a plurality of second test pins and a first short-circuit wire, and the display panel is provided with a second short-circuit wire; the circuit board is further provided with a plurality of first test points which are in one-to-one correspondence with and connected with the plurality of first test pins and a plurality of second test points which are in one-to-one correspondence with and connected with the plurality of second test pins, the first short circuit is used for short-circuiting the plurality of first test pins, and the second short circuit is used for short-circuiting the plurality of second test pins. The display panel assembly and the detection method thereof can display the production efficiency of the display panel assembly.
Description
Technical Field
The application relates to the technical field of display, in particular to a pixel driving circuit and a display panel.
Background
A Chip On Film (COF) refers to a Film On which electronic devices and circuits are mounted, and generally, the number of conductive particles is detected in order to determine whether the COF is successfully bonded to a display panel or a circuit board, and whether the COF is successfully bonded to the display panel or the circuit board is determined according to the number of conductive ions.
However, the detection of the conductive particles takes a lot of time, and thus, the production efficiency of the display panel assembly is reduced.
Disclosure of Invention
The embodiment of the application provides a display panel assembly and a detection method thereof, which can improve the production efficiency of the display panel assembly.
In a first aspect, the present application provides a display panel assembly comprising: the display device comprises a display panel, a circuit board and a chip on film for connecting the display panel and the circuit board;
the chip on film is provided with a plurality of first test pins, a plurality of second test pins and a first short-circuit wire, and the display panel is provided with a second short-circuit wire;
the circuit board is further provided with a plurality of first test points which are in one-to-one correspondence with and connected with the plurality of first test pins and a plurality of second test points which are in one-to-one correspondence with and connected with the plurality of second test pins, the first short circuit is used for short-circuiting the plurality of first test pins, and the second short circuit is used for short-circuiting the plurality of second test pins.
In the display panel assembly provided by the application, the flip-chip film has a first end and a second end opposite to each other in a first upward direction, the first end is bound to the substrate, and the second end is bound to the circuit board.
In the display panel assembly provided by the application, the first test pin comprises a first sub-test pin, a second sub-test pin and a first connecting line, and the second test pin comprises a third sub-test pin, a fourth sub-test pin and a second connecting line;
the first sub-test pin is arranged on the first end, the second sub-test pin is arranged on the second end, and the first sub-test pin is connected with the second sub-test pin through the first connecting line;
the third sub-test pin is arranged on the first end, the fourth sub-test pin is arranged on the second end, and the third sub-test pin is connected with the fourth sub-test pin through the second connecting line.
In the display panel assembly provided by the application, each first sub-test pin corresponds to one first test point, and each third sub-test pin corresponds to one second test point.
In the display panel assembly provided by the application, the first test point and the second test point are both copper leakage test points.
In the display panel assembly provided by the application, the first test pin is arranged on one side of the chip on film, and the second test pin is arranged on the other side of the chip on film.
In the display panel assembly provided by the present application, the flip-chip films include a first flip-chip film, a second flip-chip film and a third flip-chip film arranged along a first direction;
the first short wire and the first test pin are arranged on the first chip on film, the second test pin is arranged on the third chip on film, and the second short wire is arranged on the display panel and one end close to the third chip on film.
In a second aspect, the present application provides a method for detecting a display panel assembly, including:
providing a display panel assembly, wherein the display panel assembly comprises a display panel, a circuit board, a chip on film, a plurality of first test pins, a plurality of second test pins, a first short wire and a second short wire;
detecting the impedance value of the flip chip film;
generating an impedance value of the display panel and an impedance value of the circuit board according to the impedance value of the chip on film;
and determining the binding result of the chip on film and the display panel and the binding result of the chip on film and the circuit board according to the impedance value of the display panel and the impedance value of the circuit board.
In the detection method of the display panel assembly provided by the present application, the generating the impedance value of the display panel and the impedance value of the circuit board according to the impedance value of the chip on film includes:
detecting the impedance value of the first measuring point to generate the impedance value of the circuit board;
detecting the impedance value of the second measuring point;
and calculating the difference value between the impedance value of the first measuring point and the impedance value of the second measuring point to generate the impedance value of the display panel.
In the detection method of a display panel assembly provided by the present application, the determining the bonding result between the flip chip film and the display panel and the bonding result between the flip chip film and the circuit board according to the impedance value of the display panel and the impedance value of the circuit board includes:
judging whether the impedance value of the circuit board is larger than a first threshold value or not;
when the impedance value of the circuit board is larger than a first threshold value, judging whether the impedance value of the display panel is larger than a second threshold value;
and when the impedance value of the display panel is larger than a second threshold value, determining that the bonding between the chip on film and the display panel is successful, and determining that the bonding between the chip on film and the circuit board is successful.
The application provides a display panel assembly and a detection method thereof, wherein the display panel assembly comprises: the display device comprises a display panel, a circuit board and a chip on film for connecting the display panel and the circuit board; the chip on film is provided with a plurality of first test pins, a plurality of second test pins and a first short-circuit wire, and the display panel is provided with a second short-circuit wire; the circuit board is further provided with a plurality of first test points which are in one-to-one correspondence with and connected with the plurality of first test pins and a plurality of second test points which are in one-to-one correspondence with and connected with the plurality of second test pins, the first short circuit is used for short-circuiting the plurality of first test pins, and the second short circuit is used for short-circuiting the plurality of second test pins. The display panel assembly and the detection method thereof can display the production efficiency of the display panel assembly.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the application, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic plan view of a first embodiment of a display panel assembly provided herein;
FIG. 2 is a schematic plan view of a second embodiment of a display panel assembly provided herein;
fig. 3 is a schematic flowchart of a testing method of a display panel assembly provided in the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative and are only for the purpose of explaining the present application and are not to be construed as limiting the present application.
Referring to fig. 1, fig. 1 is a schematic plan view of a display panel assembly according to a first embodiment of the present disclosure. The present application provides a display panel assembly 1, which includes a display panel 10, a circuit board 20, a chip on film 30, a first test pin 40, a second test pin 50, a first shorting stub 60 and a second shorting stub 70.
The chip on film 30 is used for connecting the display panel 10 and the circuit board 20, and a plurality of first test pins 40, a plurality of second test pins 50 and first shorting wires 60 are disposed on the chip on film 30. The first test pin 40 and the second test pin 50 may be both metal pins, and neither the first test pin 40 nor the second test pin 50 is connected to a signal. The second shorting line 70 is disposed on the display panel 10. In addition, a plurality of first test points 80 and a plurality of second test points 90 are further disposed on the circuit board 20, the plurality of first test points 80 are in one-to-one correspondence with and connected to the plurality of first test pins 40, the plurality of second test points 90 are in one-to-one correspondence with and connected to the plurality of second test pins 50, the first short-circuit line 60 is used for short-circuiting the plurality of first test pins 80, and the second short-circuit line 70 is used for short-circuiting the plurality of second test pins 90.
It should be noted that the one-to-one correspondence between the plurality of first test points 80 and the plurality of first test pins 40 means: each first test point 80 corresponds to a first test pin 40. Similarly, each second test point 90 corresponds to a second test pin 50.
In an actual production process, the test pencil may be used to detect the impedances of the first test points 80 and the second test points 90 to obtain the impedance values of the first test pins 40 and the impedance values of the second test pins 50, so as to obtain the binding result between the flip-chip film 30 and the display panel 10 and the binding result between the flip-chip film 30 and the circuit board 20.
The number of the first test pins 40 and the number of the second test pins 50 may be equal or unequal. For example, the number of the first test pins 40 may be two, and the number of the second test pins 50 may also be two, as shown in fig. 1, during actual production, only the impedance values of the four test pins need to be detected to obtain the binding result between the flip-chip film 30 and the display panel 10 and the binding result between the flip-chip film 30 and the circuit board 20, so that the detection time is shortened, and the production efficiency of the display panel assembly 1 is further improved.
In addition, because the first test pins 40 and the second test pins 50 are not connected to signals, the situation of electrostatic damage between the adjacent first test pins 40 and the situation of electrostatic damage between the adjacent second test pins 50 can be avoided, and therefore the product yield of the display panel assembly 1 can be improved.
Referring to fig. 1, the flip chip film 30 has a first end 31 and a second end 32 opposite to each other in the first direction, the first end 31 is bonded to the display panel 10, and the second end 32 is bonded to the circuit board 20. Further, the first test pin 40 includes a first sub-test pin 41, a second sub-test pin 42 and a first connection line 43, and the second test pin 50 includes a third sub-test pin 51, a fourth sub-test pin 52 and a second connection line 53.
Wherein the first sub-test pin 41 is disposed on the first end 31, the second sub-test pin 42 is disposed on the second end 32, and the first sub-test pin 41 is connected to the second sub-test pin 42 through the first connection line 43. The third sub-test pin 51 is disposed on the first end 31, the fourth sub-test pin 52 is disposed on the second end 32, and the third sub-test pin 51 is connected to the fourth sub-test pin 52 through a second connection line 53. Each second sub-test pin 42 corresponds to a first test point 80 and each fourth sub-test pin 52 corresponds to a second test point 90.
For example, two first test pins 40 and two second test pins 50 are disposed on the chip on film 30, i.e., two first sub-test pins 41, two second sub-test pins 42, two third sub-test pins 51 and two fourth sub-test pins 52 are disposed on the chip on film 30. The first shorting line 60 shorts adjacent first connecting lines 43 so that adjacent second sub-test pins 42 are shorted by the first shorting line 60. The second shorting line 70 shorts adjacent second connecting lines 53 so that adjacent fourth sub-test pins 52 are shorted by the second shorting line 70. In practical production, the impedance value of the circuit board 20 can be obtained only by testing the impedances of the two second sub-test pins 42, the impedance value of the display panel 10 can be obtained by testing the impedances of the two fourth sub-test pins 52 and according to the impedances of the two second sub-test pins 42, and the binding result between the flip-chip film 30 and the display panel 10 and the binding result between the flip-chip film 30 and the circuit board 20 can be obtained based on the impedance value of the display panel 10 and the impedance value of the circuit board 20. Therefore, the inspection time is shortened, thereby improving the production efficiency of the display panel assembly 1.
In some embodiments, first test point 80 and second test point 90 are both copper-leakage test points. The first test point 80 and the second test point 90 are both set as the copper leakage test points, which facilitates detection of the impedance values of the first test point 80 and the second test point, and therefore, the production efficiency of the display panel assembly 1 can be further improved.
In addition, the two sides of the flip chip film 1 are regions that are not easy to bind, so that the binding result between the flip chip film 30 and the display panel 10 and the binding result between the flip chip film 30 and the circuit board 20 can be obtained by testing the impedance values of the two sides of the flip chip film 1. That is, in some embodiments, the first test pins 40 are disposed on one side of the chip on film 1, and the second test pins 50 are disposed on the other side of the chip on film 1. As shown in fig. 1.
In some embodiments, please refer to fig. 2, and fig. 2 is a schematic plan view illustrating a display panel assembly according to a second embodiment of the present disclosure. The present application further provides a display panel assembly 1, the display panel assembly 1 of fig. 2 is different from the display panel assembly 1 of fig. 1 in that: the chip on film 1 includes a first chip on film 30A, a second chip on film 30B and a third chip on film 30C arranged along a first direction.
The first shorting wire 60 and the first testing pin 40 are disposed on the first chip on film 30A, the second testing pin 50 is disposed on the third chip on film 30C, and the second shorting wire 70 is disposed on the display panel 10 and near one end of the third chip on film 30C.
For example, the first direction may be a horizontal direction, the number of the first flip-chip films 30A may be the same as the number of the third flip-chip films 30C, and both the first flip-chip films and the third flip-chip films are one, and the number of the second flip-chip films 30B may be one or more, which is determined according to the actual situation. The number of the first test pins 40 may be two, and the number of the second test pins 50 may also be two, as shown in fig. 2, during actual production, only the impedance values of the four test pins need to be detected to obtain the binding result between the flip chip 30 and the display panel 10 and the binding result between the flip chip 30 and the circuit board 20, so that the detection time is shortened, and the production efficiency of the display panel assembly 1 is further improved.
It should be noted that the specific setting method of the first test pin 40, the second test pin 50, the first shorting bar 60, the second shorting bar 70, the first test point 80 and the second test point 90 is similar to that of the previous embodiment, please refer to the previous embodiment, and details thereof are not repeated.
Accordingly, please refer to fig. 3, and fig. 3 is a schematic flow chart of a testing method of a display panel assembly provided in the present application. The present application further provides a method for detecting a display panel assembly, which includes:
110. a display panel assembly is provided.
120. And detecting the impedance value of the flip chip film.
130. And generating the impedance value of the display panel and the impedance value of the circuit board according to the impedance value of the chip on film.
140. And determining the binding result of the chip on film and the display panel and the binding result of the chip on film and the circuit board according to the impedance value of the display panel and the impedance value of the circuit board.
For example, the display panel assembly may include a display panel, a circuit board, a chip on film, a plurality of first test pins, a plurality of second test pins, a first short wire, and a second short wire, which are not described herein with reference to the foregoing embodiments.
The method includes the steps of firstly, detecting an impedance value of the chip on film, for example, detecting an impedance value of a first test pin and an impedance value of a second test pin, then, generating an impedance value of the display panel and an impedance value of the circuit board based on the impedance value of the first test pin and the impedance value of the second test pin, and finally, determining a binding result of the chip on film and the display panel and a binding result of the chip on film and the circuit board according to the impedance value of the display panel and the impedance value of the circuit board.
In some embodiments, the steps of first detecting the impedance value of the first test pin, directly obtaining the impedance value of the circuit board, detecting the impedance value of the second test pin, then calculating a difference between the impedance value of the first test pin and the impedance value of the second test pin, and generating the impedance value of the display panel, that is, generating the impedance value of the display panel and the impedance value of the circuit board according to the impedance value of the chip on film may specifically include:
(11) and detecting the impedance value of the first measuring point to generate the impedance value of the circuit board.
(12) And detecting the impedance value of the second set point.
(13) And calculating the difference value between the impedance value of the first measuring point and the impedance value of the second measuring point to generate the impedance value of the display panel.
In some embodiments, the step of determining the bonding result between the flip chip film and the display panel and the bonding result between the flip chip film and the circuit board according to the impedance value of the display panel and the impedance value of the circuit board may specifically include:
(21) and judging whether the impedance value of the circuit board is larger than a first threshold value.
(22) And when the impedance value of the circuit board is greater than the first threshold value, judging whether the impedance value of the display panel is greater than a second threshold value.
(23) And when the impedance value of the display panel is larger than the second threshold value, determining that the bonding between the chip on film and the display panel is successful, and determining that the bonding between the chip on film and the circuit board is successful.
In order to save the time of the process, it can be first determined whether the impedance value of the circuit board is greater than a first threshold, and when the impedance value of the circuit board is greater than the first threshold, it is determined whether the impedance value of the display panel is greater than a second threshold. And when the impedance value of the display panel is larger than the second threshold value, determining that the bonding between the chip on film and the display panel is successful, and determining that the bonding between the chip on film and the circuit board is successful.
It should be noted that, when the impedance value of the circuit board is smaller than the first threshold, it is determined that the flip-chip film is not bound to the circuit board, and at this time, the operation of re-binding the flip-chip film may be performed until the impedance value of the circuit board is larger than the first threshold, and it is determined whether the impedance value of the display panel is larger than the second threshold.
The application provides a detection method of a display panel assembly, which comprises the steps of providing the display panel assembly, detecting an impedance value of a chip on film, generating an impedance value of the display panel and an impedance value of a circuit board according to the impedance value of the chip on film, determining a binding result of the chip on film and the display panel and a binding result of the chip on film and the circuit board according to the impedance value of the display panel and the impedance value of the circuit board, and obtaining the binding result of the chip on film and the display panel and the binding result of the chip on film and the circuit board by detecting the impedance value of the display panel and the impedance value of the circuit board. Therefore, the detection time is shortened, and the production efficiency of the display panel assembly is improved.
The display panel assembly and the detection method thereof provided by the embodiments of the present application are described in detail above, and the principles and embodiments of the present application are explained herein by applying specific examples, and the description of the above embodiments is only used to help understanding the present application. Meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A display panel assembly, comprising: the display device comprises a display panel, a circuit board and a chip on film for connecting the display panel and the circuit board;
the chip on film is provided with a plurality of first test pins, a plurality of second test pins and a first short-circuit wire, and the display panel is provided with a second short-circuit wire;
the circuit board is further provided with a plurality of first test points which are in one-to-one correspondence with and connected with the plurality of first test pins and a plurality of second test points which are in one-to-one correspondence with and connected with the plurality of second test pins, the first short circuit is used for short-circuiting the plurality of first test pins, and the second short circuit is used for short-circuiting the plurality of second test pins.
2. The display panel assembly of claim 1, wherein the flip-chip film has a first end and a second end opposite to each other in a first direction, the first end being bonded to the display panel, and the second end being bonded to the circuit board.
3. The display panel assembly of claim 2, wherein the first test pin comprises a first sub-test pin, a second sub-test pin, and a first connection line, and the second test pin comprises a third sub-test pin, a fourth sub-test pin, and a second connection line;
the first sub-test pin is arranged on the first end, the second sub-test pin is arranged on the second end, and the first sub-test pin is connected with the second sub-test pin through the first connecting line;
the third sub-test pin is arranged on the first end, the fourth sub-test pin is arranged on the second end, and the third sub-test pin is connected with the fourth sub-test pin through the second connecting line.
4. The display panel assembly of claim 3, wherein each of the second sub-test pins corresponds to one of the first test points, and each of the fourth sub-test pins corresponds to one of the second test points.
5. The display panel assembly of claim 4, wherein the first test point and the second test point are both copper leakage test points.
6. The display panel assembly of claim 1, wherein the first test pin is disposed on one side of the chip on film and the second test pin is disposed on the other side of the chip on film.
7. The display panel assembly of claim 1, wherein the flip-chip film comprises a first flip-chip film, a second flip-chip film and a third flip-chip film arranged along a first direction;
the first short wire and the first test pin are arranged on the first chip on film, the second test pin is arranged on the third chip on film, and the second short wire is arranged on the display panel and one end close to the third chip on film.
8. A method for inspecting a display panel assembly, comprising:
providing a display panel assembly, wherein the display panel assembly comprises a display panel, a circuit board, a chip on film, a plurality of first test pins, a plurality of second test pins, a first short wire and a second short wire;
detecting the impedance value of the flip chip film;
generating an impedance value of the display panel and an impedance value of the circuit board according to the impedance value of the chip on film;
and determining the binding result of the chip on film and the display panel and the binding result of the chip on film and the circuit board according to the impedance value of the display panel and the impedance value of the circuit board.
9. The method according to claim 8, wherein the generating the impedance value of the display panel and the impedance value of the circuit board according to the impedance value of the chip on film comprises:
detecting the impedance value of the first measuring point to generate the impedance value of the circuit board;
detecting the impedance value of the second measuring point;
and calculating the difference value between the impedance value of the first measuring point and the impedance value of the second measuring point to generate the impedance value of the display panel.
10. The method according to claim 8, wherein the determining the bonding result between the flip-chip film and the display panel and the bonding result between the flip-chip film and the circuit board according to the impedance value of the display panel and the impedance value of the circuit board comprises:
judging whether the impedance value of the circuit board is larger than a first threshold value or not;
when the impedance value of the circuit board is larger than a first threshold value, judging whether the impedance value of the display panel is larger than a second threshold value;
and when the impedance value of the display panel is larger than a second threshold value, determining that the bonding between the chip on film and the display panel is successful, and determining that the bonding between the chip on film and the circuit board is successful.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910916325.7A CN110675737A (en) | 2019-09-26 | 2019-09-26 | Pixel driving circuit and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910916325.7A CN110675737A (en) | 2019-09-26 | 2019-09-26 | Pixel driving circuit and display panel |
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| CN110675737A true CN110675737A (en) | 2020-01-10 |
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| CN201910916325.7A Pending CN110675737A (en) | 2019-09-26 | 2019-09-26 | Pixel driving circuit and display panel |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111816124A (en) * | 2020-08-07 | 2020-10-23 | 合肥奕斯伟集成电路有限公司 | Driving circuit, display device and detection method using time sequence controller |
| CN112540229A (en) * | 2020-12-02 | 2021-03-23 | Tcl华星光电技术有限公司 | Display device and method for detecting impedance of display device |
| CN113539085A (en) * | 2021-05-25 | 2021-10-22 | 昆山国显光电有限公司 | Array substrate, testing method of array substrate and display panel |
| CN114446218A (en) * | 2022-03-21 | 2022-05-06 | 昆山国显光电有限公司 | Display panel and display device |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104810638A (en) * | 2015-05-19 | 2015-07-29 | 合肥京东方光电科技有限公司 | Printed circuit board, connection detection method of flexible circuit board and printed circuit board and display panel |
| CN105702188A (en) * | 2016-02-05 | 2016-06-22 | 昆山龙腾光电有限公司 | Liquid crystal display device and testing method therefor |
| CN106226684A (en) * | 2016-09-22 | 2016-12-14 | 合肥京东方光电科技有限公司 | Assembling printed circuit board test fixture |
| CN106908971A (en) * | 2017-04-28 | 2017-06-30 | 南京中电熊猫平板显示科技有限公司 | The binding blocking apparatus and its binding hold-up interception method of liquid crystal display panel |
| CN107144602A (en) * | 2017-05-16 | 2017-09-08 | 武汉华星光电技术有限公司 | Binding region conducting particles presses detection method |
| CN108594017A (en) * | 2018-07-02 | 2018-09-28 | 京东方科技集团股份有限公司 | A kind of bonding impedance detection system and method |
| CN110018352A (en) * | 2018-01-10 | 2019-07-16 | 三星显示有限公司 | Display device |
-
2019
- 2019-09-26 CN CN201910916325.7A patent/CN110675737A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104810638A (en) * | 2015-05-19 | 2015-07-29 | 合肥京东方光电科技有限公司 | Printed circuit board, connection detection method of flexible circuit board and printed circuit board and display panel |
| CN105702188A (en) * | 2016-02-05 | 2016-06-22 | 昆山龙腾光电有限公司 | Liquid crystal display device and testing method therefor |
| CN106226684A (en) * | 2016-09-22 | 2016-12-14 | 合肥京东方光电科技有限公司 | Assembling printed circuit board test fixture |
| CN106908971A (en) * | 2017-04-28 | 2017-06-30 | 南京中电熊猫平板显示科技有限公司 | The binding blocking apparatus and its binding hold-up interception method of liquid crystal display panel |
| CN107144602A (en) * | 2017-05-16 | 2017-09-08 | 武汉华星光电技术有限公司 | Binding region conducting particles presses detection method |
| CN110018352A (en) * | 2018-01-10 | 2019-07-16 | 三星显示有限公司 | Display device |
| CN108594017A (en) * | 2018-07-02 | 2018-09-28 | 京东方科技集团股份有限公司 | A kind of bonding impedance detection system and method |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111816124A (en) * | 2020-08-07 | 2020-10-23 | 合肥奕斯伟集成电路有限公司 | Driving circuit, display device and detection method using time sequence controller |
| CN111816124B (en) * | 2020-08-07 | 2021-06-04 | 合肥奕斯伟集成电路有限公司 | Driving circuit, display device and detection method using time sequence controller |
| CN112540229A (en) * | 2020-12-02 | 2021-03-23 | Tcl华星光电技术有限公司 | Display device and method for detecting impedance of display device |
| WO2022116311A1 (en) * | 2020-12-02 | 2022-06-09 | Tcl华星光电技术有限公司 | Display device and impedance detection method for display device |
| US11860204B2 (en) | 2020-12-02 | 2024-01-02 | Tcl China Star Optoelectronics Technology Co., Ltd. | Display device and detection method for impedance of display device |
| CN113539085A (en) * | 2021-05-25 | 2021-10-22 | 昆山国显光电有限公司 | Array substrate, testing method of array substrate and display panel |
| CN113539085B (en) * | 2021-05-25 | 2023-10-24 | 昆山国显光电有限公司 | Array substrate, testing method of array substrate and display panel |
| CN114446218A (en) * | 2022-03-21 | 2022-05-06 | 昆山国显光电有限公司 | Display panel and display device |
| CN114446218B (en) * | 2022-03-21 | 2024-01-30 | 昆山国显光电有限公司 | Display panel and display device |
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Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Applicant after: TCL Huaxing Photoelectric Technology Co.,Ltd. Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Applicant before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |
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