CN110444135B - Display device and detection method thereof and chip on film - Google Patents
Display device and detection method thereof and chip on film Download PDFInfo
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- CN110444135B CN110444135B CN201910500013.8A CN201910500013A CN110444135B CN 110444135 B CN110444135 B CN 110444135B CN 201910500013 A CN201910500013 A CN 201910500013A CN 110444135 B CN110444135 B CN 110444135B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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Abstract
The application discloses a display device, a detection method thereof and a chip on film, wherein the display device comprises a display panel, a circuit board, a source chip on film and a test wire for detecting whether the source chip on film is correctly bound; the test wire is communicated with the circuit board input pin and the circuit board output pin to form a loop. The test wiring is arranged in the display device, and the corresponding circuit board pin, the chip on film pin and the display panel pin are conducted through the lead wires to form a loop, so that two ends of the circuit of the loop can be formed through connection of an external power supply, and the whole test circuit is conducted; when the test wire is not conducted after being connected with an external power supply, the abnormal binding of the pins is indicated; when the test wiring is connected and conducted with an external power supply, the pin binding is not problematic, and the method can quickly detect the binding problem of the pins in the circuit board, the chip on film and the display panel.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a display device, a detection method thereof, and a chip on film.
Background
With the development of the liquid crystal display field, the liquid crystal display has been widely applied in the fields of television, mobile communication, medical treatment, etc., the connection between the panel and the PCBA (Printed Circuit Board) is through a COF (Chip On Film), the COF has many input pins and output pins, the COF has a function of converting input data of the PCBA into TFT (Thin Film Transistor) voltage driving signals of the panel and outputting the signals to the panel, and the COF connecting Circuit Board and the display panel are completed through a binding process, specifically, the pins of the COF and the pins of the panel are connected in a matching manner.
Because the pin quantity is more and intensive, generally when checking whether pin binds correctly, need place the pin under the microscope and observe, but because present panel resolution ratio is bigger and bigger, the pin is more and more, and the work load that needs the inspection is more and more, leads to the efficiency of detection very low.
Disclosure of Invention
The present application is directed to a display device, a method for detecting the same, and a flip chip film, so as to quickly detect whether a pin is abnormally bonded.
The application discloses a display device, which comprises a display panel, a circuit board, a chip on film and a test wire; the display panel is used for displaying pictures and comprises a plurality of panel pins; the circuit board drives the display panel, the circuit board comprises a plurality of circuit board pins, and the circuit board pins comprise circuit board input pins for receiving test signals and circuit board output pins for outputting the test signals; the chip on film comprises an input drive pin and an output drive pin, the output drive pin is bound and connected with the panel pin, and the input drive pin is bound and connected with the circuit board pin; the test routing is communicated with the circuit board input pin and the circuit board output pin to form a loop.
Optionally, the test trace includes: the test signal input end connecting point is arranged at the circuit board and is communicated with one of the circuit board pins so as to receive a test signal; the test signal output end connecting point is arranged at the circuit board and is communicated with a circuit board output pin in the circuit board pins so as to output a test signal; and the conducting lead is communicated with the test signal input end connecting point and the test signal output end connecting point to form a loop.
Optionally, the flip chip on film includes a source flip chip on film, and at least two source flip chips are bound to the same circuit board side by side, where at least one of the source flip chips is a main-side source flip chip, and the main-side source flip chip is provided with a first input driving pin and a first output driving pin near two ends of the circuit board, respectively, where the first input driving pin is connected to the test signal input end connection point through the circuit board input pin, and the first output driving pin is connected to the test signal output end connection point through the circuit board output pin; the conducting lead is communicated with the first input driving pin and the first output driving pin.
Optionally, the source electrode chip on film further includes at least one auxiliary side source electrode chip on film arranged in parallel with the main side source electrode chip on film; the conducting lead comprises a display panel side conducting lead which is arranged at the display panel and positioned between two adjacent source electrode chip on films, and a circuit board side conducting lead which is arranged at the circuit board and positioned between two input driving pins of the auxiliary side source electrode chip on film; the source electrode chip on film positioned at the first end of the circuit board and the source electrode chip on film positioned at the second end of the circuit board are two source electrode chip on films which are communicated.
Optionally, the source electrode chip on film at the first end of the circuit board is a first end source electrode chip on film, and the source electrode chip on film at the second end of the circuit board is a second end source electrode chip on film; the display panel is provided with a conducting long line, and the conducting long line is respectively connected with an output driving pin at one end of the first end source electrode chip on film, which is far away from the second end source electrode chip on film, and an output driving pin at one end of the second end source electrode chip on film, which is far away from the first end source electrode chip on film after the display panel is bound with the source electrode chip on film; the conducting long line is arranged in a non-display area of the display panel and surrounds a display area of the display panel.
Optionally, the chip on film further includes a gate chip on film, the gate chip on film is provided with a gate conducting lead for testing whether the gate chip on film is bound and aligned, and the gate conducting lead is communicated with the conducting long line to form a testing loop.
Optionally, the chip on film includes a source chip on film, and the source chip on film includes at least a first source chip on film and a second source chip on film which are adjacently disposed; the conducting lead is connected with the output driving pin at one end of the first source electrode chip on film adjacent to the second source electrode chip on film and the output driving pin at one end of the second source electrode chip on film adjacent to the first source electrode chip on film.
Optionally, the source electrode chip on film at the first end of the circuit board is a first end source electrode chip on film, and the source electrode chip on film at the second end of the circuit board is a second end source electrode chip on film; the display panel is provided with a conducting long line, and the conducting long line is respectively connected with an output driving pin at one end of the first end source electrode chip on film, which is far away from the second end source electrode chip on film, and an output driving pin at one end of the second end source electrode chip on film, which is far away from the first end source electrode chip on film after the display panel is bound with the source electrode chip on film; the conducting long line is arranged in a non-display area of the display panel and surrounds a display area of the display panel; the connection point of the test signal input end is communicated with the input driving pin of the first end source electrode chip on film through the input pin of the circuit board; the test signal output end connecting point is communicated with the output driving pin of the second end source electrode chip on film through the circuit board output pin.
The application also discloses a detection method of the display device, which comprises the following steps:
connecting the input drive pins of the chip on film with corresponding circuit board pins in a circuit board, and connecting the output drive pins of the chip on film with corresponding panel pins in a display panel;
and arranging a test wire to communicate the circuit board input pin and the circuit board output pin to form a loop.
The application discloses a chip on film, which comprises a driving chip, a driving pin, an input driving pin, an output driving pin and a conducting lead; the driving pins are arranged at two ends or one end of the driving chip and are communicated with the driving chip; the input driving pin is arranged at one end of the driving chip and is not communicated with the driving chip; the output driving pin is arranged at one end or the other end of the driving chip and is not communicated with the driving chip; the conducting lead conducts the input driving pin and the output driving pin.
This application is through setting up the test in display device and walk the line, switches on corresponding circuit board pin, cover brilliant film pin and display panel pin with the lead wire, forms a return circuit, just so can be through connecting the circuit both ends that form the return circuit with the power outside to switch on whole test circuit. When the test wire is not conducted after being connected with an external power supply, the abnormal binding of the pins is indicated; when the test wire is connected and conducted with an external power supply, the pin binding is not problematic. The method can quickly detect the binding problem of the pins in the circuit board, the chip on film and the display panel without observing one by one, thereby improving the production efficiency.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the application, are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is obvious that the drawings in the following description are only some embodiments of the application, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:
fig. 1 is a schematic diagram of a display device according to an embodiment of the present application;
fig. 2 is a schematic view of a display device according to another embodiment of the present application;
fig. 3 is a schematic view of a display device according to another embodiment of the present application;
fig. 4 is a schematic view of a display device according to another embodiment of the present application;
fig. 5 is a schematic view of a display device according to another embodiment of the present application;
fig. 6 is a schematic view of a display device according to another embodiment of the present application;
fig. 7 is a schematic view of a display device according to another embodiment of the present application;
fig. 8 is a schematic view of a display device according to another embodiment of the present application;
FIG. 9 is a flow chart of a method of fabricating a display device according to an embodiment of the present application;
FIG. 10 is a schematic view of a chip on film according to an embodiment of the present application;
FIG. 11 is a schematic view of a chip on film according to another embodiment of the present application;
fig. 12 is a schematic diagram of a chip on film according to another embodiment of the present application.
100, a display device; 110. a circuit board; 111. a circuit board pin; 1111. a circuit board input pin; 1112. a circuit board output pin; 120. a display panel; 121. panel pins; 1211. an input panel pin; 1212. an output panel pin; 122. a binding region; 1221. a first metal layer; 1222. a second metal layer; 1223. an insulating layer; 130. a source electrode flip chip film; 131. inputting a driving pin; 1311. a first input drive pin; 1312. a second input drive pin; 132. an output drive pin; 1321. a first output drive pin; 1322. a second output drive pin; 133. a primary side source electrode flip chip film; 134. an auxiliary side source electrode chip on film; 135. a first end source electrode chip on film; 136. a second end source electrode chip on film; 137. a first source electrode flip-chip film; 138. a second source electrode flip chip film; 140. a gate chip on film; 141. a gate conducting lead; 1411. a gate input pin; 1412. a gate output pin; 1414. a second gate lead; 150. testing the wiring; 151. a test signal input end connection point; 152. a test signal output end connection point; 153. conducting a lead; 1531. conducting the long line; 1532. a display panel side lead; 1533. a circuit board side conduction lead; 160. a chip on film; 161. a driving chip; 162. a drive pin.
Detailed Description
It is to be understood that the terminology, the specific structural and functional details disclosed herein are for the purpose of describing particular embodiments only, and are representative, but that the present application may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
In the description of the present application, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating relative importance or as implicitly indicating the number of technical features indicated. Thus, unless stated otherwise, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; "plurality" means two or more. The terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that one or more other features, integers, steps, operations, elements, components, and/or combinations thereof may be present or added.
Further, terms of orientation or positional relationship indicated by "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, are described based on the orientation or relative positional relationship shown in the drawings, are simply for convenience of description of the present application, and do not indicate that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present application.
Furthermore, unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly and may include, for example, fixed connections, removable connections, and integral connections; can be mechanically or electrically connected; either directly or indirectly through intervening media, or through both elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
The application is further described with reference to the drawings and alternative embodiments.
As shown in fig. 1 to 8, an embodiment of the present application discloses a display device 100, including a display panel 120 for displaying a picture, where the display panel 120 includes a plurality of panel pins 121; there is also a circuit board 110 driving the display panel 120, the circuit board 110 including a plurality of circuit board pins 111, the circuit board pins 111 including a circuit board input pin 1111 receiving a test signal, and a circuit board output pin 1112 outputting the test signal; a chip on film 160 is further provided, wherein the chip on film 160 includes a plurality of input driving pins 131 and a plurality of output driving pins 132, the output driving pins 132 are bound and connected with the panel pins 121, and the input driving pins 131 are bound and connected with the circuit board pins 111; the display device 100 finally comprises a test trace 150 for detecting whether the flip-chip film 160 is correctly bonded; the test trace 150 connects the circuit board input pin 1111 and the circuit board output pin 1112 to form a loop. The test trace 150 further includes a test signal input terminal connection point 151 disposed at the circuit board 110, communicating with a circuit board input pin 1111 of the circuit board pins 111, to receive a test signal; a test signal output end connection point 152 provided at the circuit board 110 and communicating with a circuit board output pin 1112 among the circuit board pins 111 to output a test signal; finally, the test trace 150 further includes a conducting wire 153 for connecting the test signal input terminal connection point 151 and the test signal output terminal connection point 152 to form a loop. The display device 100 generally includes a display panel 120, a flip-chip 160 and a circuit board 110, wherein the flip-chip 160 is connected to the display panel 120 and the circuit board 110, the circuit board 110 provides data signals, and the flip-chip 160 converts the data signals provided by the circuit board 110 into different voltages to be provided to the display panel 120, so that the display panel 120 displays different images. The signal transmission among the chip on film 160, the circuit board 110 and the display panel 120 is through pin transmission, the circuit board 110 transmits the signal to the chip on film 160 through the pin, and the chip on film 160 converts the signal and transmits the signal to the display panel 120 through the pin.
When the flip-chip film 160 is mounted, the driving pins 162 at two ends of the flip-chip film 160 need to be connected to the panel pins 121 of the display panel 120 and the circuit board pins 111 of the circuit board 110 in a one-to-one correspondence manner. When the pin binding is abnormal, for example, the pin alignment is inaccurate, the pin is broken, or the pin connection is misplaced, or other problems occur, the display panel 120 may have abnormal display and may not display the picture correctly. Therefore, after the chip on film 160 is mounted, it is necessary to check whether the bonding of the pins at the two ends of the chip on film 160 is problematic, and generally, the pins are directly observed by using a microscope in a manner of detecting the bonding of the pins, which requires to observe the pins of each chip on film 160 one by one, and the display device 100 can be put into the next process only if it is determined that all the pins are bonded without errors; this observation is time consuming, wasting manpower and increasing time costs. In order to improve the detection efficiency of bonding the pins in the chip on film 160, the invention provides a method for connecting corresponding pins by using the test wire 150 to form a serial test circuit, wherein the test circuit comprises corresponding circuit board pins 111, chip on film 160 pins and display panel 120 pins, and the test wire 150 plays a role of connecting the pins, and the pin bonding problem in the chip on film 160 is judged by testing the connection effect of the test circuit. After the display device 100 of the application is used, only the conduction effect of the whole test circuit needs to be tested when the pins are detected to be bound, the process is simple, and the detection efficiency is high.
It should be noted that the external world can directly connect the circuit board input pin 1111 and the circuit board output pin 1112 in the circuit board 110 through the testing device to test the pin binding condition in the whole loop; the test device may also indirectly turn on the circuit board input pin and 1111 the circuit board output pin 1112 through the test signal input terminal connection point 151 and the test signal output terminal connection point 152. The test signal input terminal connection point 151 and the test signal output terminal connection point 152 may be pads or wires, and are not limited thereto.
There may be only one test circuit in the whole display device 100, that is, only one loop of the conductive pin through the test trace 150, and then both ends of the whole test circuit are disposed at the circuit board 110, and are communicated with the circuit board input pin 1111 of the circuit board pin 111 to receive the test signal input connection point 151, and are disposed at the circuit board 110, and are communicated with the circuit board output pin 1112 of the circuit board pin 111 to output the test signal output connection point 152. Specifically, the test signal input terminal connection point 151 and the test signal output terminal connection point 152 in the test circuit can be connected to the same chip on film 160 through the circuit board pins 111; the test signal input terminal connection point 151 and the test signal output terminal connection point 152 in the test circuit may be connected to different flip-chip films 160 through the circuit board pins 111. More specifically, in the case that the test signal input terminal connection point 151 and the test signal output terminal connection point 152 in the test circuit can be connected to the same flip-chip film 160 through the circuit board pins 111, the test circuit also includes the case that the test circuit only tests the pin binding in one flip-chip film 160, and the test circuit simultaneously tests the pin binding in a plurality of flip-chip films 160; the conditions that the test signal input terminal connection point 151 and the test signal output terminal connection point 152 in the test circuit can be connected to different flip chips 160 through the circuit board pins 111 include the condition that the test circuit only tests the pin binding in two adjacent flip chips 160 and the condition that the pin binding in two non-adjacent flip chips 160.
As shown in fig. 2, in the case that the testing circuit simultaneously tests the bonding of the pins in a plurality of flip-chips 160, the flip-chip 160 includes source flip-chips 130, and at least two source flip-chips 130 are bonded to the same circuit board 110 side by side, wherein one source flip-chip 130 is a main-side source flip-chip 133, and the other source flip-chips 130 are auxiliary-side source flip-chips 134; a first input driving pin 1311 and a first output driving pin 1321 are respectively disposed at two ends of the primary side source flip-chip film 133 close to the circuit board 110, the first input driving pin 1311 is connected to the test signal input terminal connection point 151 through the circuit board input pin 1111, and the first output driving pin 1321 is connected to the test signal output terminal connection point 152 through the circuit board output pin 1112; a second input driving pin 1312 and a second output driving pin 1322 are respectively disposed at two ends of the primary side source flip-chip film 133 close to the display panel 120, the panel pin 121 connected to the second input driving pin 1312 is an input panel pin 1211, and the panel pin 121 connected to the second output driving pin 1322 is an output panel pin 1212; the conducting leads 153 include a display panel side conducting lead 1532 disposed at the display panel 120 and located between two adjacent source flip-chip films 130, and a circuit board side conducting lead 1533 disposed at the circuit board 110 and located between two input driving pins 131 of the secondary side source flip-chip film 134; the source flip-chip film 130 at the first end of the circuit board 110 and the source flip-chip film 130 at the second end of the circuit board 110 are two source flip-chip films 130 communicated with each other. The test circuit can simultaneously detect a plurality of source flip-chip films 130, because the display device 100 usually comprises a plurality of source flip-chip films 130, when the pins of the source flip-chip films 130 are bound, the binding of some pins of the source flip-chip films 130 is correct, and the binding of some pins of the source flip-chip films 130 is abnormal, therefore, the test circuit can simultaneously test a plurality of even all source flip-chip films 130, can simultaneously find the binding problem of a plurality of even all source flip-chip films 130, and when the test circuit is communicated with all source flip-chip films 130, as long as the test circuit is in a conducting state during testing, the binding of the pins of the source flip-chip films 130 of the whole display device 100 has no problem.
When the testing circuit is connected to all the source flip-chip-films 130 in the display device 100, the source flip-chip-film 130 at the first end of the circuit board 110 is a first end source flip-chip-film 135, and the source flip-chip-film 130 at the second end of the circuit board 110 is a second end source flip-chip-film 136; the display panel 120 is provided with a conducting long line 1531, and the conducting long line 1531 is connected to the output driving pin 132 at the end of the first end source flip-chip film 135 far away from the second end source flip-chip film 136 and the output driving pin 132 at the end of the second end source flip-chip film 136 far away from the first end source flip-chip film 135 respectively after the display panel 120 is bound to the source flip-chip film 130; the conducting long line 1531 is disposed in a non-display region of the display panel 120 and surrounds a display region of the display panel 120. Since the conducting long line 1531 connecting the source flip-chip film 130 at the first end of the circuit board 110 and the source flip-chip film 130 at the second end is disposed around the non-display region of the display panel 120, the conducting long line 1531 will not interfere with other metal lines in the display panel 120, and will not interfere with the panel pin 121 connected to the source flip-chip film 130, thereby avoiding the short circuit.
As shown in fig. 3, the testing circuit can also test the pin bonding problem in the gate flip-chip film 140, the flip-chip film 160 further includes the gate flip-chip film 140, the gate flip-chip film 140 is provided with a gate conducting lead 141 for testing whether the gate flip-chip film 140 is bonded and aligned, and the gate conducting lead 141 is connected to the conducting long line 1531 to form a testing loop. The test circuit can test the pin binding problem of one gate flip-chip film 140, and also can test the pin binding problem of a plurality of gate flip-chip films 140 at the same time. When testing the pin binding problem of one gate COF 140, the gate conducting lead 141 includes the gate input pin 1411 and the gate output pin 1412 of the gate COF 140, and the panel pin 121 connected to the gate input pin 1411 and the gate output pin 1412, because the gate COF 140 is connected to the side edge of the display panel 120, the conducting long wire 1531 conducting the first end-source COF 135 and the second end-source COF 136 can be directly connected to the gate conducting lead 141, so that the pin binding problem of the gate COF 140 can be detected while detecting the pin of the source COF 130. If a plurality of gate flip-chips 140 are to be tested simultaneously, the second gate lead 1414 of the gate-on lead 141 only needs to be connected to the gate input pin 1411 and the gate output pin 1412 that are adjacent to each other in two adjacent gate flip-chips 140, and the second gate lead 1414 is disposed in the non-display region of the display panel 120. The test circuit can directly test all the pins of the source flip-chip film 130 and all the pins of the gate flip-chip film 140 in the whole display device 100, can know the binding problem in the whole display device 100 through one test process, and greatly improves the detection efficiency.
As shown in fig. 4 and 5, in the case that the test circuit only tests the pin bonding of one source flip-chip film 130, the display panel 120 includes a bonding region 122 bonded to the flip-chip film 160, the bonding region 122 includes a first metal layer 1221 and a second metal layer 1222, and the second metal layer 1222 is provided with a panel pin 121 bonded to the main-side source flip-chip film 133; the first metal layer 1221 is provided with the conducting lead 153 to communicate with the panel pin 121, and the whole test circuit has a structure that: a test signal input terminal connection point 151, a circuit board input pin 1111, a first input drive pin 1311, a second input drive pin 1312, an input panel pin 1211, a turn-on lead 153, an output panel pin 1212, a second output drive pin 1322, a first output drive pin 1321, a circuit board output pin 1112, and a test signal output terminal connection point 152. The conducting lead 153 in this embodiment is connected to the panel pin 121 connected to the second input driving pin 1312 and the second output driving pin 1322 by the shortest distance, and the conducting lead 153 does not need to be arranged around the display panel 120, so that the loss of the conducting lead 153 is reduced. In addition, in order to prevent the first metal layer 1221 and the second metal layer 1222 from being short-circuited, an insulating layer 1223 may be disposed between the first metal layer 1221 and the second metal layer 1222 to separate the conductive leads 153 from the pins in the display panel 120.
As shown in fig. 6, in the case that the testing circuit only tests the bonding of the pins in two adjacent flip-chips 160, the source flip-chip film 130 at least includes a first source flip-chip film 137 and a second source flip-chip film 138 which are adjacently disposed; the conducting lead 153 is connected to the output driving pin 132 of the first source chip on film 137 at the end adjacent to the second source chip on film 138, and the output driving pin 132 of the second source chip on film 138 at the end adjacent to the first source chip on film 137; namely, the structure included in the test circuit is: a test signal input terminal connection point 151, a circuit board input pin 1111, a first input drive pin 1311 in the first source flip-chip film 137, a second input drive pin 1321 in the first source flip-chip film 137, an input panel pin 1211 corresponding to the second input drive pin 1321, a conduction lead 153 between the first source flip-chip film 137 and the second source flip-chip film 138, an output panel pin 1212, a second output drive pin 1322 in the second source flip-chip film 138, a first output drive pin 1321 in the second source flip-chip film 138, a circuit board output pin 1112 connected to the first output drive pin 1321, and a test signal output terminal connection point 152. The bonding problem of the pins in the two source electrode flip-chip films 130 can be determined at the same time by testing the leads in the adjacent source electrode flip-chip films 130, and generally, if there is no problem in the pin alignment of the two source electrode flip-chip films 160, the probability of the problem in the pin alignment of the flip-chip films 160 is low, and the embodiment does not need to design excessive wires, reduces the production steps, and improves the productivity.
As shown in fig. 7, in the case of testing the pin bonding between two non-adjacent flip chips 160, the source flip chip 130 at the first end of the circuit board 110 is a first end source flip chip 135, and the source flip chip 130 at the second end of the circuit board 110 is a second end source flip chip 136; the display panel 120 is provided with a conducting long line 1531, and the conducting long line 1531 is connected to the output driving pin 132 at the end of the first end source flip-chip film 135 far away from the second end source flip-chip film 136 and the output driving pin 132 at the end of the second end source flip-chip film 136 far away from the first end source flip-chip film 135 respectively after the display panel 120 is bound to the source flip-chip film 130; the conducting long line 1531 is disposed in the non-display region of the display panel 120 and surrounds the display region of the display panel 120; the test signal input terminal connection point 151 is connected to a first input driving pin 1311 of the first end-source COF 135 via the circuit board input pin 1111, the first input driving pin 1311 is connected to an input panel pin 1211 via a corresponding second input driving pin 1312, and the input panel pin 1211 is connected to the conducting long line 1531; the test signal output end connection point 152 is communicated with the first output driving pin 1321 of the second end-source chip-on-film 136 through the circuit board output pin 1112, the first output driving pin 1321 is connected with the output panel pin 1212 through the corresponding second output driving pin 1322, and the output panel pin 1212 is communicated with the conduction long wire 1531. Because the testing circuit tests the pins of the source flip-chip films 130 at the two ends of the circuit board 110, when the pins of the first end-source flip-chip film 135 and the second end-source flip-chip film 136 at the two ends of the circuit board 110 are aligned normally, the pins in the flip-chip films 160 between the first end-source flip-chip film 135 and the second end-source flip-chip film 136 will not have the alignment problem, and when the pins of the source flip-chip films 130 are aligned, because the pins in the flip-chip films 160 between the first end-source flip-chip film 135 and the second end-source flip-chip film 136 have the alignment problem, the pins of the first end-source flip-chip film 135 and the second end-source flip-chip film 136 must have the alignment problem.
The whole display device 100 may also have a plurality of test circuits at the same time, both ends of each test circuit are disposed on the circuit board 110, and each test circuit has a test signal input terminal connection point 151 communicating with a circuit board input pin 1111 of the circuit board pins 111 to receive a test signal, and a test signal output terminal connection point 152 disposed at the circuit board 110 communicating with a circuit board output pin 1112 of the circuit board pins 111 to output a test signal. Specifically, the test signal input terminal connection point 151 and the test signal output terminal connection point 152 in each test circuit may be connected to one flip-chip film 160, or may be connected to different source flip-chip films 130, as shown in fig. 8, one test circuit is: the first end-source flip-chip film 135 is connected by a test signal input end connection point 151, and the second end-source flip-chip film 136 is connected by a test signal output end connection point 152, and the first end-source flip-chip film 135 and the second end-source flip-chip film 136 are connected by a conducting long line 1531 arranged around the non-display region of the display panel 120; other test circuits are: the first source chip on film 137 is connected by the test signal input terminal connection point 151, the second source chip on film 138 is connected by the test signal output terminal connection point 152, and the first source chip on film 137 and the second source chip on film 138 are adjacent chip on films 160 and are connected by a conduction lead 153. In the present embodiment, by providing a plurality of test circuits in the display device 100, each test circuit can test the lead bonding condition of two source flip-chip films 130, and after the problem is found by measuring the leads of the first end-source flip-chip film 135 and the second end-source flip-chip film 160, it can test whether the bonding of two adjacent source flip-chip films 130 leads is problematic one by one until which lead of the source flip-chip film 130 has the problem is found, so that the source flip-chip film 130 with the problem can be accurately located. Of course, the test circuit can also measure the pins of the adjacent gate flip-chip films 140, connect the test signal input terminal connection point 151 with one pin of one gate flip-chip film 140, connect the test signal output terminal lead with the pin of the adjacent gate flip-chip film 140, and connect the corresponding panel pin 121 with the conducting signal. This can find the gate-on-chip-film 140 with abnormal pin bonding.
In the above embodiment, the pins of the COF 160 in the test circuit may be the edge-most pins of the COF 160, which can solve the problem of all the pins in the entire COF 160. And the corresponding input driving pin 131 and output driving pin 132 in the flip chip 160 can be connected through the conducting wire 153, so that the other pins in the flip chip 160 can be prevented from affecting the test circuit.
As shown in fig. 9, as another embodiment of the present application, a method for detecting a display device is disclosed, which includes the steps of:
s1: connecting the input drive pins of the chip on film with corresponding circuit board pins in a circuit board, and connecting the output drive pins of the chip on film with corresponding panel pins in a display panel;
s2: and arranging a test wire to communicate the circuit board input pin and the circuit board output pin to form a loop.
In addition, one end of the circuit forming the loop is connected with a power supply, and the other end of the circuit is connected with a light-emitting piece and a grounding wire. After the power is turned on, if the light-emitting element is not bright, it indicates that the bonding of the pins of the source chip on film 130 in the display device 100 is problematic and needs to be modified; after the power is turned on, if the light emitting device is normal, it indicates that the bonding of the leads of the source flip-chip film 130 is correct, and the next step can be performed.
As shown in fig. 10 and 12, as another embodiment of the present application, a chip on film 160 is disclosed, the chip on film 160 comprising: a driving chip 161, a driving pin 162, an input driving pin 131, an output driving pin 132 and a conducting lead 153; the driving pins 162 are disposed at two ends or one end of the driving chip 161, and are communicated with the driving chip 161; the input driving pin 131 is arranged at one end of the driving chip 161 and is not communicated with the driving chip 161; the output driving pin 132 is disposed at one end or the other end of the driving chip 161, and is not communicated with the driving chip 161; the conduction wire 153 conducts the input driving pin 131 and the output driving pin 132.
The chip on film 160 in fig. 10 includes two input driving pins 131 and two output driving pins 132, the input driving pins 131 and the output driving pins 132 are respectively disposed at two ends of the driving chip 161, and mainly perform a test function, and are connected to the test signal input terminal connection point 151 and the test signal output terminal connection point 152 in the test circuit in the above embodiment. Certainly, one of the flip-chip films 160 may also have only one set of input driving pins 131 and output driving pins 132, the input driving pins 131 and the output driving pins 132 in one of the flip-chip films 160 are conducted by conducting wires 153, in order to form a loop, a set of input driving pins 131 and output driving pins 132 are also arranged in the other flip-chip film 160, the output driving pins 132 in the two flip-chip films 160 near the display panel 120 are conducted, and the input driving pins 131 near the circuit board 110 are respectively conducted with the test signal input terminal connection point 151 and the test signal output terminal connection point 152, as shown in fig. 11. As shown in fig. 12, the input driving lead 131 and the output driving lead 132 may be on the same side of the driving chip 161, and the conducting lead 151 is connected to the input driving lead 131 and the output driving lead 132 around the edge of the chip on film 160.
It should be noted that, the limitations of each step in the present disclosure are not considered to limit the order of the steps without affecting the implementation of the specific embodiments, and the steps written in the foregoing may be executed first, or executed later, or even executed simultaneously, and as long as the present disclosure can be implemented, all the steps should be considered as belonging to the protection scope of the present application.
The technical solution of the present application can be widely applied to various display panels, such as a Twisted Nematic (TN) display panel, an In-Plane Switching (IPS) display panel, a Vertical Alignment (VA) display panel, and a Multi-Domain Vertical Alignment (MVA) display panel, and of course, other types of display panels, such as an Organic Light-Emitting Diode (OLED) display panel, can also be applied to the above solution.
The foregoing is a more detailed description of the present application in connection with specific alternative embodiments, and the present application is not intended to be limited to the specific embodiments shown. For those skilled in the art to which the present application pertains, several simple deductions or substitutions may be made without departing from the concept of the present application, and all should be considered as belonging to the protection scope of the present application.
Claims (8)
1. A display device, comprising:
the display panel is used for displaying pictures and comprises a plurality of panel pins;
the circuit board drives the display panel and comprises a plurality of circuit board pins, wherein the circuit board pins comprise circuit board input pins for receiving test signals and circuit board output pins for outputting the test signals;
the chip on film comprises an input drive pin and an output drive pin, wherein the output drive pin is in binding connection with the panel pin, and the input drive pin is in binding connection with the circuit board pin; and
the test routing is communicated with the circuit board input pin and the circuit board output pin to form a loop;
the test signal input end connecting point is arranged at the circuit board and is communicated with a circuit board input pin in the circuit board pins so as to receive a test signal;
the test signal output end connecting point is arranged at the circuit board and is communicated with one of the circuit board pins so as to output a test signal; and
the conducting lead is communicated with the test signal input end connecting point and the test signal output end connecting point to form a loop;
the flip chip on film comprises a source flip chip on film, and the source flip chip on film at least comprises a first source flip chip on film and a second source flip chip on film which are adjacently arranged;
the conducting lead is connected with an output driving pin at one end of the first source electrode chip on film, which is adjacent to the second source electrode chip on film, and an output driving pin at one end of the second source electrode chip on film, which is adjacent to the first source electrode chip on film.
2. The display apparatus according to claim 1, wherein at least two source flip-chips are bonded side by side to the same circuit board, wherein at least one of the source flip-chips is a main-side source flip-chip;
the two ends of the main side source electrode chip on film, which are close to the circuit board, are respectively provided with a first input driving pin and a first output driving pin;
the first input driving pin is connected with the connection point of the test signal input end through the circuit board input pin, and the first output driving pin is connected with the connection point of the test signal output end through the circuit board output pin;
the conducting lead is communicated with the first input driving pin and the first output driving pin.
3. The display device according to claim 2, wherein the source flip-chip film further comprises at least one auxiliary side source flip-chip film disposed side by side with the main side source flip-chip film;
the conducting leads comprise a display panel side conducting lead which is arranged at the display panel and positioned between two adjacent source electrode chip-on-film chips, and a circuit board side conducting lead which is arranged at the circuit board and positioned between two input driving pins of the auxiliary side source electrode chip-on-film chips;
the source electrode chip on film positioned at the first end of the circuit board and the source electrode chip on film positioned at the second end of the circuit board are two source electrode chip on films which are communicated.
4. The display apparatus according to claim 3, wherein the source flip-chip on film at the first end of the circuit board is a first end source flip-chip on film, and the source flip-chip on film at the second end of the circuit board is a second end source flip-chip on film;
the display panel is provided with a conducting long line, and the conducting long line is respectively connected with an output driving pin at one end of the first end source electrode chip on film far away from the second end source electrode chip on film and an output driving pin at one end of the second end source electrode chip on film far away from the first end source electrode chip on film after the display panel is bound with the source electrode chip on film;
the conducting long line is arranged in a non-display area of the display panel and surrounds a display area of the display panel.
5. The display device according to claim 4, wherein the COF further comprises a gate COF, the gate COF is provided with a gate conducting lead for testing whether the gate COF is bonded and aligned, and the gate conducting lead is communicated with the conducting long line to form a testing loop.
6. The display apparatus according to claim 1, wherein the source flip-chip on film at the first end of the circuit board is a first end source flip-chip on film, and the source flip-chip on film at the second end of the circuit board is a second end source flip-chip on film;
the display panel is provided with a conducting long line, and the conducting long line is respectively connected with an output driving pin at one end of the first end source electrode chip on film, which is far away from the second end source electrode chip on film, and an output driving pin at one end of the second end source electrode chip on film, which is far away from the first end source electrode chip on film after the display panel is bound with the source electrode chip on film;
the conducting long line is arranged in a non-display area of the display panel and surrounds a display area of the display panel;
the test signal input end connecting point is communicated with the input driving pin of the first end source electrode chip on film through the circuit board input pin;
the test signal output end connecting point is communicated with the output driving pin of the second end source electrode chip on film through the circuit board output pin.
7. A method of inspecting a display device for inspecting the display device according to any one of claims 1 to 6, comprising the steps of:
connecting the input drive pins of the chip on film with corresponding circuit board pins in a circuit board, and connecting the output drive pins of the chip on film with corresponding panel pins in a display panel;
and arranging a test wire to communicate the circuit board input pin and the circuit board output pin to form a loop.
8. A chip on film for a display device, the chip on film comprising:
a driving chip;
the driving pins are arranged at two ends or one end of the driving chip and are communicated with the driving chip;
the input driving pin is arranged at one end of the driving chip and is not communicated with the driving chip;
the output driving pin is arranged at one end or the other end of the driving chip and is not communicated with the driving chip; and
a conducting lead for conducting the input driving pin and the output driving pin;
the flip chip on film comprises a source flip chip on film, and the source flip chip on film at least comprises a first source flip chip on film and a second source flip chip on film which are adjacently arranged;
the conducting lead is connected with the output driving pin at one end of the first source electrode chip on film adjacent to the second source electrode chip on film and the output driving pin at one end of the second source electrode chip on film adjacent to the first source electrode chip on film.
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| CN110827729B (en) * | 2019-11-26 | 2022-09-27 | 京东方科技集团股份有限公司 | Detection structure, display panel, manufacturing method and detection method |
| CN111445841B (en) * | 2020-05-14 | 2022-04-08 | 京东方科技集团股份有限公司 | Display device and detection method thereof |
| CN113963642A (en) * | 2020-07-20 | 2022-01-21 | 苏州华星光电显示有限公司 | Display device and method for checking wire binding position of display device |
| CN111816124B (en) * | 2020-08-07 | 2021-06-04 | 合肥奕斯伟集成电路有限公司 | Driving circuit, display device and detection method using time sequence controller |
| CN112782238A (en) * | 2021-01-18 | 2021-05-11 | Oppo广东移动通信有限公司 | Binding exception testing and repairing method and device, electronic equipment and storage medium |
| CN112800713B (en) * | 2021-02-10 | 2024-01-26 | 深圳市华星光电半导体显示技术有限公司 | Binding pin automatic conversion method and system |
| CN112992027A (en) * | 2021-03-02 | 2021-06-18 | 重庆先进光电显示技术研究院 | Chip on film assembly and display terminal |
| CN113516934B (en) * | 2021-03-17 | 2023-09-29 | 合肥维信诺科技有限公司 | Screen body, circuit board and display device |
| CN113193017B (en) * | 2021-04-21 | 2023-05-05 | 武汉华星光电技术有限公司 | Display panel and display device |
| CN113450691B (en) * | 2021-06-24 | 2023-08-08 | 京东方科技集团股份有限公司 | Display module and display device |
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