CN109508063B - Error amplifier with feedforward compensation network - Google Patents
Error amplifier with feedforward compensation network Download PDFInfo
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- CN109508063B CN109508063B CN201811624526.1A CN201811624526A CN109508063B CN 109508063 B CN109508063 B CN 109508063B CN 201811624526 A CN201811624526 A CN 201811624526A CN 109508063 B CN109508063 B CN 109508063B
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- 230000003321 amplification Effects 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
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- 238000010586 diagram Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
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- 238000012986 modification Methods 0.000 description 1
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- 230000006641 stabilisation Effects 0.000 description 1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
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Abstract
The invention provides an error amplifier with a feedforward compensation network, which is characterized by comprising a main gain module, a feedforward gain module, a gain resistor, a compensation resistor, a main compensation capacitor and an auxiliary compensation capacitor.
Description
Technical Field
The invention relates to the field of power supplies, in particular to an error amplifier with a feedforward compensation network.
Background
In recent years, consumer electronic markets continue to expand, the power supply field of integrated circuits is also expanding at a rapid speed, and along with the continuous reduction of the cost of a power supply chip, the cost of devices such as capacitors, resistors and the like at the periphery of the power supply chip far exceeds the cost of the chip, so that the reduction of the size and the cost of peripheral devices becomes one of key factors of the design of the power supply IC. The core of the peripheral device reduction is to improve the switching frequency of a switching power supply chip product, but the frequency of the current mode controlled power supply chip product with better stability cannot be further improved, and the traditional voltage mode controlled power supply chip product can improve the switching frequency to 6 MHz-8 MHz, so that the peripheral device reduction has huge cost advantages, but the voltage mode controlled power supply chip is often poor in stability due to the influence of LC bipolar poles.
Disclosure of Invention
In order to solve the technical problems, the invention provides the following technical scheme:
an error amplifier with a feedforward compensation network comprises a main gain module, a feedforward gain module, a gain resistor, a compensation resistor, a main compensation capacitor and an auxiliary compensation capacitor;
the output of the main gain module is connected with an upper polar plate of a main compensation capacitor of the circuit, a lower polar plate of the main compensation capacitor is grounded, the output of the feedforward gain module is connected with one end of a gain resistor, the other end of the gain resistor is grounded, the output of the feedforward gain module is connected with an upper polar plate of an auxiliary compensation capacitor, a lower substrate of the auxiliary compensation capacitor is connected with one end of a compensation resistor, the other end of the compensation resistor is connected with the upper polar plate of the compensation capacitor and the output of the main gain module, and a signal of the lower polar plate of the auxiliary compensation capacitor connected with one end of the compensation resistor is an output signal of the error amplifier.
In a further aspect of the present invention,
the main gain module comprises 4P-type MOS tubes PM1, PM2, PM3 and PM4, and further comprises 4N-type MOS tubes NM1, NM2, NM3 and NM4, wherein the specific connection mode is that the PM1 and the PM2 are input geminate transistors, the grid electrodes are respectively connected with positive and negative differential input signals, the source electrode of the PM1 is connected with the source electrode of the PM2, the bias current signal is connected with the drain electrode of the PM1, the grid electrode of the NM2 and the grid electrode of the NM1 to form a current mirror structure, the drain electrode of the PM2 is connected with the drain electrode of the NM3, the grid electrode of the NM3 and the grid electrode of the NM4 to form a mirror structure, the drain end of the NM4 is connected with the drain end of the PM4, the signal is an output signal of the main gain module, and is connected with one end of the main compensation capacitor.
In a further aspect of the present invention,
the feedforward gain module comprises 4P-type MOS tubes PM5, PM6, PM7 and PM8 and 3N-type MOS tubes NM5, NM6 and NM7, wherein the specific connection mode is that NM5 is connected with PM1 and NM2 and is used as the other mirror image output of the transconductance amplifier, the drain electrode of NM5 is connected with the drain electrode of PM5, the grid electrode of PM5 and the grid electrode of PM6 to form a mirror image structure, and the width-length ratio of PM6 is 2 times larger than that of PM5 to form a transconductance 2-time amplifying structure;
the drain electrode of PM6 is connected with the drain electrode of NM6, the grid electrode of NM6 and the grid electrode of NM7 to form a mirror image structure, wherein NM7 is 4 times larger than NM6 in width-to-length ratio to form a transconductance 4 times amplifying structure;
the drain electrode of NM7 is connected with the drain electrode of PM7, the grid electrode of PM7 and the grid electrode of PM8 to form a mirror image structure, wherein the width-to-length ratio of PM8 is 4 times greater than that of PM7, and a transconductance 4 times amplifying structure is formed.
In a further aspect of the present invention,
the main gain module and the feedforward gain module are both of a transconductance amplifier type.
The beneficial effects of adopting above-mentioned technical scheme are:
according to the error amplifier with the feedforward compensation network, two zero points for compensating the LC double poles are provided through the feedforward compensation network, so that the stability of the system is improved, the response is quick and the integration level is high under the condition that an excessive internal capacitance is not introduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a diagram of a system small signal according to the present invention;
FIG. 2 is a schematic diagram of the circuit configuration of the present invention;
Detailed Description
The invention relates to an error amplifier with a feedforward compensation network, which comprises a main gain module, a feedforward gain module, a gain resistor, a compensation resistor, a main compensation capacitor and an auxiliary compensation capacitor,
as shown in fig. 1, the main gain module and the gain module are both of a transconductance amplifier type, wherein the transconductance of the main gain module is GM, the transconductance of the feedforward gain module is hGM, the gain of the main gain module is h times greater than that of the feedforward gain module, the gain resistor is a resistor R1, the compensation resistor is RX, the main compensation capacitor is CEA and the auxiliary compensation capacitor CX form a compensation network, and REA and CEA represent the output resistor and the output capacitor of the error amplifier respectively.
The output of the main gain module is connected with an upper polar plate of a main compensation capacitor of the circuit, a lower polar plate of the main compensation capacitor is grounded, the output of the feedforward gain module is connected with one end of a gain resistor, the other end of the gain resistor is grounded, the output of the feedforward gain module is connected with an upper polar plate of an auxiliary compensation capacitor, a lower substrate of the auxiliary compensation capacitor is connected with one end of a compensation resistor, the other end of the compensation resistor is connected with the upper polar plate of the compensation capacitor and the output of the main gain module, and a signal of the lower polar plate of the auxiliary compensation capacitor connected with one end of the compensation resistor is an output signal of the error amplifier.
The output impedance of the main gain module is REA, the output signal is VB, the resistors R1, RX and the capacitor CX form a compensation network, REA and CEA respectively represent the output resistor and the output capacitor of the error amplifier, gm represents the transconductance of the normal path of the error amplifier, hGm represents the transconductance of the fast path of the error amplifier, and h is a constant. Considering the transfer function of the error amplifier, since there are two small signal paths, the output can be regarded as a value resulting from the superposition of the two small signal paths, and the Gm path is 1 path and the hGm path is 2 path.
For this circuit topology, the node voltage equation for each node is listed as follows:
V C ＝V B +(V A -V C )·s·C X ·R X
finally, the transfer function of the error amplifier is obtained as follows:
from this transfer function, it can be seen that the error amplifier of the invention comprises two zeros and two poles, the two zeros being respectively:
the two poles are respectively:
by proper selection of R1, RX, CEA, CX, the pole-zero locations required for loop stabilization can be created.
As shown in fig. 2, the main gain module includes 4P-type MOS transistors PM1, PM2, PM3 and PM4, and further includes 4N-type MOS transistors NM1, NM2, NM3 and NM4, where the specific connection mode is that PM1 and PM2 are input pairs, the gates are respectively connected with positive and negative differential input signals, the source of PM1 is connected with the source of PM2, the drain of PM1 is connected with the drain of NM2, the gate of NM2 and the gate of NM1 to form a current mirror structure, the drain of PM2 is connected with the drain of NM3, the gate of NM3 and the gate of NM4 to form a mirror structure, the drain of NM1 is connected with the drain of PM3, the gate of PM3 and the gate of PM4 to form a mirror structure, the drain of NM4 is connected with the drain of PM4, the signal is an output signal of the main gain module, and is connected with one end of the main compensation capacitor.
The feedforward gain module comprises 4P-type MOS tubes PM5, PM6, PM7 and PM8 and 3N-type MOS tubes NM5, NM6 and NM7, wherein the specific connection mode is that NM5 is connected with PM1 and NM2 and is used as the other mirror image output of the transconductance amplifier, the drain electrode of NM5 is connected with the drain electrode of PM5, the grid electrode of PM5 and the grid electrode of PM6 to form a mirror image structure, and the width-length ratio of PM6 is 2 times larger than that of PM5 to form a transconductance 2-time amplifying structure; the drain electrode of PM6 is connected with the drain electrode of NM6, the grid electrode of NM6 and the grid electrode of NM7 to form a mirror image structure, wherein NM7 is 4 times larger than NM6 in width-to-length ratio to form a transconductance 4 times amplifying structure; the drain electrode of NM7 is connected with the drain electrode of PM7, the grid electrode of PM7 and the grid electrode of PM8 to form a mirror image structure, wherein the width-to-length ratio of PM8 is 4 times greater than that of PM7, and a transconductance 4 times amplifying structure is formed.
The circuit of the invention has a feed forward path to accommodate the fast response of the loop under load saving conditions and provides two low frequency zeros that can be used to compensate the LC bipolar pole of the voltage mode controlled DC-DC converter.
Although the invention has been described hereinabove with reference to certain embodiments, various modifications can be made and equivalents can be substituted for elements thereof without departing from the scope of the invention, and in particular, the features of the various embodiments missed by the present invention can be used in any combination, provided that there is no technical conflict, and the lack of description of such combinations in this invention is merely for the sake of brevity and economy of resources. Therefore, it is intended that the invention not be limited to the particular embodiments disclosed herein, but that the invention will include the claims appended hereto.
Claims (1)
1. An error amplifier with a feedforward compensation network is characterized by comprising a main gain module, a feedforward gain module, a gain resistor, a compensation resistor, a main compensation capacitor and an auxiliary compensation capacitor;
wherein the main gain module and the feedforward gain module are respectively connected with the same input signals VREF and VFB, the output of the main gain module is connected with the upper polar plate of the main compensation capacitor of the circuit, the lower polar plate of the main compensation capacitor is grounded, the output of the feedforward gain module is connected with one end of a gain resistor, the other end of the gain resistor is grounded, the output of the feedforward gain module is connected with the upper polar plate of the auxiliary compensation capacitor, the lower polar plate of the auxiliary compensation capacitor is connected with one end of a compensation resistor, the other end of the compensation resistor is connected with the upper polar plate of the compensation capacitor and the output of the main gain module, the signal of the lower polar plate of the auxiliary compensation capacitor connected with one end of the compensation resistor is the output signal of the error amplifier,
the main gain module comprises 4P-type MOS tubes PM1, PM2, PM3 and PM4, and also comprises 4N-type MOS tubes NM1, NM2, NM3 and NM4, wherein the specific connection mode is that PM1 and PM2 are input geminate transistors, grid electrodes are respectively connected with positive and negative differential input signals, the source electrode of PM1 is connected with the source electrode of PM2, bias current signals are connected, the drain electrode of PM1 is connected with the drain electrode of NM2, the grid electrode of NM2 and the grid electrode of NM1 to form a current mirror structure, the drain electrode of PM2 is connected with the drain electrode of NM3, the grid electrode of NM3 and the grid electrode of NM4 to form a mirror structure, the drain end of NM4 is connected with the drain end of PM4, the signals are output signals of the main gain module, the signals are connected with a main compensation capacitor, and one end of the compensation resistor is connected,
the feedforward gain module comprises 4P-type MOS tubes PM5, PM6, PM7 and PM8 and 3N-type MOS tubes NM5, NM6 and NM7, wherein the specific connection mode is that a grid electrode of NM5 is connected with a drain electrode of PM1 and a grid electrode and a drain electrode of NM2, a grid electrode of PM1 is connected with an input, a drain electrode is connected with a grid electrode of NM5 and a grid electrode and a drain electrode of NM2, a grid electrode of NM2 is connected with a drain electrode of NM5 and a drain electrode of PM1, the grid electrode of NM5 is connected with a grid electrode of PM5 and a grid electrode of PM6 to form a mirror image structure, and the width-length ratio of PM6 is 2 times larger than that of PM5 to form a transconductance 2 times amplification structure;
the drain electrode of PM6 is connected with the drain electrode of NM6, the grid electrode of NM6 and the grid electrode of NM7 to form a mirror image structure, wherein NM7 is 4 times larger than NM6 in width-to-length ratio to form a transconductance 4 times amplifying structure;
the drain electrode of NM7 is connected with the drain electrode of PM7, the grid electrode of PM7 and the grid electrode of PM8 to form a mirror image structure, wherein the width-to-length ratio of PM8 is 4 times greater than that of PM7 to form a transconductance 4-time amplifying structure, and the main gain module and the feedforward gain module are both of a transconductance amplifier type.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811624526.1A CN109508063B (en) | 2018-12-28 | 2018-12-28 | Error amplifier with feedforward compensation network |
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| CN201811624526.1A CN109508063B (en) | 2018-12-28 | 2018-12-28 | Error amplifier with feedforward compensation network |
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| CN109508063B true CN109508063B (en) | 2024-03-15 |
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Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040032533A (en) * | 2002-10-10 | 2004-04-17 | 주식회사 하이닉스반도체 | Method for cancellation of poll-zero of feed-forward amplifier |
| CN101197558A (en) * | 2006-12-07 | 2008-06-11 | 株式会社日立国际电气 | Feed-forward amplifier |
| KR20080086048A (en) * | 2007-03-21 | 2008-09-25 | 엘지전자 주식회사 | Operational amplifier |
| EP2312751A1 (en) * | 2009-10-13 | 2011-04-20 | Sequans Communications | Differential amplifier with common-mode feedback |
| CN103780213A (en) * | 2013-12-24 | 2014-05-07 | 南京中科微电子有限公司 | Multistage operational amplifier |
| CN103986429A (en) * | 2013-02-07 | 2014-08-13 | 联发科技股份有限公司 | Dynamic feed-forward OPAMP-based circuit |
| CN105811889A (en) * | 2016-04-20 | 2016-07-27 | 佛山臻智微芯科技有限公司 | Feedforward compensation type transconductance operational amplifier |
| CN106774614A (en) * | 2016-12-05 | 2017-05-31 | 电子科技大学 | A kind of low pressure difference linear voltage regulator with super transconductance structure |
| CN109004911A (en) * | 2017-06-07 | 2018-12-14 | 亚德诺半导体集团 | The difference amplifier of common mode inhibition with adjusting and circuit with improved common mode rejection ratio |
| CN209231807U (en) * | 2018-12-28 | 2019-08-09 | 西安航天民芯科技有限公司 | A kind of error amplifier with feedforward compensation network |
-
2018
- 2018-12-28 CN CN201811624526.1A patent/CN109508063B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040032533A (en) * | 2002-10-10 | 2004-04-17 | 주식회사 하이닉스반도체 | Method for cancellation of poll-zero of feed-forward amplifier |
| CN101197558A (en) * | 2006-12-07 | 2008-06-11 | 株式会社日立国际电气 | Feed-forward amplifier |
| KR20080086048A (en) * | 2007-03-21 | 2008-09-25 | 엘지전자 주식회사 | Operational amplifier |
| EP2312751A1 (en) * | 2009-10-13 | 2011-04-20 | Sequans Communications | Differential amplifier with common-mode feedback |
| CN103986429A (en) * | 2013-02-07 | 2014-08-13 | 联发科技股份有限公司 | Dynamic feed-forward OPAMP-based circuit |
| CN103780213A (en) * | 2013-12-24 | 2014-05-07 | 南京中科微电子有限公司 | Multistage operational amplifier |
| CN105811889A (en) * | 2016-04-20 | 2016-07-27 | 佛山臻智微芯科技有限公司 | Feedforward compensation type transconductance operational amplifier |
| CN106774614A (en) * | 2016-12-05 | 2017-05-31 | 电子科技大学 | A kind of low pressure difference linear voltage regulator with super transconductance structure |
| CN109004911A (en) * | 2017-06-07 | 2018-12-14 | 亚德诺半导体集团 | The difference amplifier of common mode inhibition with adjusting and circuit with improved common mode rejection ratio |
| CN209231807U (en) * | 2018-12-28 | 2019-08-09 | 西安航天民芯科技有限公司 | A kind of error amplifier with feedforward compensation network |
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