CN114337609A - Ring oscillator system - Google Patents
Ring oscillator system Download PDFInfo
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- CN114337609A CN114337609A CN202111472447.5A CN202111472447A CN114337609A CN 114337609 A CN114337609 A CN 114337609A CN 202111472447 A CN202111472447 A CN 202111472447A CN 114337609 A CN114337609 A CN 114337609A
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Abstract
The invention provides an annular oscillator system, which belongs to the field of oscillators and comprises a current mirror module and an oscillator module connected with the current mirror module, wherein the current mirror module is respectively connected with the anode and the cathode of a power supply; wherein the current mirror module is used for providing bias current for the oscillator module; the oscillator module is used for converting the bias current into a clock signal and outputting the clock signal, and the bias current is provided for the oscillator through the current mirror circuit, so that the circuit is simplified, and an independent LDO power supply is not required to be connected externally.
Description
Technical Field
The present invention relates to the field of oscillators, and more particularly to ring oscillator systems.
Background
The existing oscillator scheme is generally complex in structure, and power supply noise can be well suppressed only by an independent LDO external power supply.
Disclosure of Invention
The invention mainly aims to provide a ring oscillator system, and aims to solve the technical problems that an oscillator scheme in the prior art is generally complex in structure and needs an independent LDO (low dropout regulator) to suppress power supply noise.
It is a primary object of the present invention to provide a ring oscillator system, comprising:
the current mirror module is connected with the oscillator module and is respectively connected with the anode and the cathode of a power supply; wherein the content of the first and second substances,
the current mirror module is used for providing bias current for the oscillator module;
the oscillator module is used for converting the bias current into a clock signal and outputting the clock signal.
Optionally, the current mirror module comprises:
the current mirror unit and the adjusting unit are connected with each other, the current mirror unit is respectively connected with the anode of the power supply and the adjusting unit, and the adjusting unit is connected with the cathode of the power supply; wherein the content of the first and second substances,
the current mirror unit is used for outputting bias current;
and the adjusting unit is used for adjusting the value of the bias current output by the current mirror unit.
Optionally, the current mirror unit includes three PMOS transistors and three NMOS transistors, and the adjusting unit includes: a resistance; wherein the content of the first and second substances,
the source electrode of the first PMOS tube, the source electrode of the second PMOS tube and the source electrode of the third PMOS tube are connected and connected with the positive electrode of the power supply;
the grid electrode of the first PMOS tube, the grid electrode of the second PMOS tube and the grid electrode of the third PMOS tube are connected and respectively connected with the drain electrode of the second PMOS tube and the drain electrode of the second NMOS tube;
the drain electrode of the first PMOS tube is respectively connected with the grid electrode of the first NMOS tube, the grid electrode of the second NMOS tube and the drain electrode of the first NMOS tube;
the drain electrode of the third PMOS tube is connected with the oscillator module;
the source electrode of the first NMOS tube is respectively connected with the drain electrode of a third NMOS tube and the grid electrode of the third NMOS tube;
the source electrode of the second NMOS tube is connected with one end of the resistor;
and the source electrode of the third NMOS tube is respectively connected with the negative electrode of the power supply and the other end of the resistor and is grounded.
Optionally, the current mirror unit includes five PMOS transistors and three NMOS transistors, and the adjusting unit includes: a resistance; wherein the content of the first and second substances,
substrates of the five PMOS tubes are respectively connected with source electrodes of the PMOS tubes;
the source electrode of the first PMOS tube is connected with the source electrode of the fourth PMOS tube, the source electrode of the fifth PMOS tube, one end of the resistor and the positive electrode of the power supply;
the grid electrode of the first PMOS tube is connected with the drain electrode of the first PMOS tube and the source electrode of the second PMOS tube;
the other end of the resistor is connected with a source electrode of a third PMOS tube;
the grid electrode of the fourth PMOS tube is connected with the grid electrode of the fifth PMOS tube, the drain electrode of the fifth PMOS tube and the oscillator module;
the drain electrode of the fourth PMOS tube is connected with the drain electrode of the third NMOS tube;
the grid electrode of the second PMOS tube is connected with the grid electrode of the third PMOS tube, the drain electrode of the second PMOS tube and the drain electrode of the first NMOS tube;
the drain electrode of the third PMOS tube is connected with the grid electrode of the first NMOS tube, the drain electrode of the second NMOS tube, the grid electrode of the second NMOS tube and the grid electrode of the third NMOS tube;
and the source electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube, the source electrode of the third NMOS tube and the negative electrode of the power supply and is grounded.
Optionally, the oscillator module comprises at least three inverters; wherein the content of the first and second substances,
the at least three inverters are sequentially connected in series to form a loop;
the power supply ends of the at least three inverters are connected with the output end of the current mirror module;
and the grounding end of the phase inverter is connected with the negative pole of the power supply and grounded.
Optionally, the oscillator module further comprises a capacitor connected between the output of the inverter and the negative pole of the power supply; wherein the content of the first and second substances,
one end of the capacitor is connected with the output end of the phase inverter;
the other end of the capacitor is connected with the negative electrode of the power supply and grounded.
Optionally, the current mirror unit includes three PMOS transistors and three NMOS transistors, and the adjusting unit includes: a resistance; wherein the content of the first and second substances,
the substrates of the three PMOS tubes are respectively connected with the source electrodes of the PMOS tubes;
the source electrode of the first PMOS tube is connected with one end of the resistor and the positive electrode of the power supply;
the grid electrode of the first PMOS tube is connected with the drain electrode of the first PMOS tube and the source electrode of the second PMOS tube;
the other end of the resistor is connected with a source electrode of a third PMOS tube;
the grid electrode of the second PMOS tube is connected with the grid electrode of the third PMOS tube, the drain electrode of the second PMOS tube and the drain electrode of the first NMOS tube;
the drain electrode of the third PMOS tube is connected with the grid electrode of the first NMOS tube, the grid electrode of the second NMOS tube, the grid electrode of the third NMOS tube and the drain electrode of the second NMOS tube;
the drain electrode of the third NMOS tube is connected with the input end of the oscillator module;
and the source electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube, the source electrode of the third NMOS tube and the negative electrode of the power supply and is grounded.
Optionally, the oscillator module comprises at least three inverters; wherein the content of the first and second substances,
the at least three inverters are sequentially connected in series to form a loop;
the grounding ends of the at least three phase inverters are connected with the drain electrode of the third NMOS tube;
and the power end of the phase inverter is connected with the positive stage of the power supply.
Optionally, the oscillator module further comprises a capacitor connected between the output of the inverter and the positive electrode of the power supply; wherein the content of the first and second substances,
one end of the capacitor is connected with the output end of the phase inverter;
the other end of the capacitor is connected with the positive pole of the power supply.
Optionally, the system includes a voltage regulation module connected in parallel with the oscillator module; wherein the content of the first and second substances,
the voltage stabilizing module comprises a capacitor;
the voltage stabilizing module is used for: reducing the oscillator module output clock jitter.
The annular oscillator system provided by the embodiment of the invention comprises a current mirror module and an oscillator module connected with the current mirror module, wherein the current mirror module is respectively connected with the anode and the cathode of a power supply; wherein the current mirror module is used for providing bias current for the oscillator module; the oscillator module is used for converting the bias current into alternating voltage with preset frequency, and provides the bias current for the oscillator through the current mirror circuit, so that the circuit is simplified, and an independent LDO power supply is not required to be connected externally.
Drawings
FIG. 1 is a block diagram of a ring oscillator system according to a first embodiment of the present invention;
FIG. 2 is a schematic circuit diagram of a ring oscillator system according to a third embodiment of the present invention;
FIG. 3 is a schematic circuit diagram of a ring oscillator system according to a fourth embodiment of the present invention;
FIG. 4 is a schematic circuit diagram of a ring oscillator system according to a fifth embodiment of the present invention;
FIG. 5 is a schematic circuit diagram of a ring oscillator system according to a sixth embodiment of the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The main solution of the embodiment of the invention is as follows: the oscillator comprises a current mirror module and an oscillator module connected with the current mirror module, wherein the current mirror module is respectively connected with the anode and the cathode of a power supply; wherein the current mirror module is used for providing bias current for the oscillator module; the oscillator module is used for converting the bias current into a clock signal and outputting the clock signal.
Because the oscillator circuit of the prior art is complex in structure and needs an external LDO power supply to suppress power supply noise.
The invention provides a solution, which provides bias current for an oscillator through a current mirror circuit, realizes a simplified circuit, and can well inhibit power noise without externally connecting a separate LDO power supply.
Referring to fig. 1, fig. 1 is a schematic block diagram of a ring oscillator system according to a first embodiment of the present invention, the ring oscillator system including:
the current mirror module is connected with the oscillator module and is respectively connected with the anode and the cathode of a power supply; wherein the content of the first and second substances,
the current mirror module is used for providing bias current for the oscillator module;
the oscillator module is used for converting the bias current into alternating voltage with preset frequency.
Wherein the frequency of the alternating voltage is determined in dependence on the supply current of the oscillator module, it being understood that the supply current of the oscillator is provided by the current mirror module.
Further, as an alternative embodiment, the system includes a voltage stabilizing module connected in parallel with the oscillator module; wherein the content of the first and second substances,
the voltage stabilizing module comprises a capacitor;
the voltage stabilizing module is used for: reducing the oscillator module output clock jitter.
The annular oscillator system provided by the embodiment of the invention comprises a current mirror module and an oscillator module connected with the current mirror module, wherein the current mirror module is respectively connected with the anode and the cathode of a power supply; wherein the current mirror module is used for providing bias current for the oscillator module; the oscillator module is used for converting the bias current into alternating voltage with preset frequency, and provides the bias current for the oscillator through the current mirror circuit, so that the circuit is simplified, and an independent LDO power supply is not required to be connected externally.
Further, on the basis of the above first embodiment of the ring oscillator system, a second embodiment of the ring oscillator system of the present invention is proposed, wherein the current mirror module includes:
the current mirror unit and the adjusting unit are connected with each other, the current mirror unit is respectively connected with the anode of the power supply and the adjusting unit, and the adjusting unit is connected with the cathode of the power supply; wherein the content of the first and second substances,
the current mirror unit is used for outputting bias current;
the adjusting unit is used for adjusting the value of the bias current output by the current mirror unit;
the adjusting unit can comprise a resistor, and the magnitude of the current value output by the current mirror unit can be adjusted by adjusting the magnitude of the resistor.
Specifically, on the basis of the second embodiment of the ring oscillator system, a third embodiment of the ring oscillator system of the present invention is provided, referring to fig. 2, and fig. 2 is a schematic circuit structure diagram of the third embodiment of the ring oscillator system of the present invention, wherein the current mirror unit includes three PMOS transistors and three NMOS transistors, and the adjusting unit includes: a resistance; wherein the content of the first and second substances,
the source electrode of the first PMOS transistor PM11, the source electrode of the second PMOS transistor PM12 and the source electrode of the third PMOS transistor PM13 are connected and connected with the positive electrode VDD of the power supply;
the gate of the PM11, the gate of the PM12 and the gate of the PM13 are connected to the drain of the PM12 and the drain of the second NMOS transistor NM12, respectively;
the drain of the PM11 is connected with the gate of the first NMOS transistor NM11, the gate of NM12 and the drain of NM11, respectively;
the drain of the PM13 is connected with the oscillator module;
the source of the NM11 is connected to the drain of the third NMOS transistor NM13 and the gate of NM13, respectively;
the source of NM12 is connected with one end of the resistor R11;
the source of NM13 is connected to the negative terminal of the power supply and the other end of R11, respectively, and is grounded.
Wherein, NM11, NM12, PM11, PM12 and PM13 constitute a current mirror, so that the currents flowing through PM11, PM12 and PM13 are equal, and the current value is equal to
Further, the oscillator module comprises at least three inverters; wherein the content of the first and second substances,
the at least three inverters are sequentially connected in series to form a loop;
the power supply ends of the at least three inverters are connected with the output end of the current mirror module;
the grounding end of the phase inverter is connected with the negative pole of the power supply and grounded;
the inverter size is adjusted so that Vgs0 ≈ Vosc, so the oscillator clock period is:
the clock frequency is determined by the resistance and capacitance values, independent of other parameters. From the analysis, the current is related to the resistance value of the resistor, the power consumption can be reduced by increasing the resistance value of the resistor, the resistor and the capacitor with smaller temperature coefficients are selected, the frequency of the oscillator changes little with the temperature, and after the size of the capacitor is determined, the size of the resistor can be adjusted again to enable the oscillation frequency to meet the requirement. In this embodiment, the parasitic capacitance of the MOS transistor in the inverter is used to replace the function of the capacitor.
In this embodiment, as an alternative embodiment, the oscillator module includes five inverters: PI11, PI12, PI13, PI14 and PI15,
the output end of the PI11 is connected with the input end of the PI12, the output end of the PI12 is connected with the input end of the PI13, the output end of the PI13 is connected with the input end of the PI14, the output end of the PI14 is connected with the input end of the PI15, and the output end of the PI15 is connected with the input end of the PI11 to form a loop.
The ground terminals of PI11, PI12, PI13, PI14, and PI15 are also connected to the power supply negative electrode VSS and grounded, respectively.
The power supply terminals of PI11, PI12, PI13, PI14, and PI15 are connected to the drain of PM 13.
Further, on the basis of the third embodiment, since the size of the inverter is determined and the capacitance is relatively fixed under the premise that Vgs0 ≈ Vosc, in order to change the capacitance value, referring to fig. 3, fig. 3 is a schematic circuit structure diagram of a fourth embodiment of the ring oscillator system of the present invention.
In this embodiment, the oscillator module further includes a capacitor connected between the output terminal of the inverter and the negative electrode of the power supply; wherein the content of the first and second substances,
one end of the capacitor is connected with the output end of the phase inverter;
the other end of the capacitor is connected with the negative electrode of the power supply and grounded.
Further, in this embodiment, the output terminal of PI11 is connected to the input terminal of PI12, the output terminal of PI12 is connected to the input terminal of PI13, the output terminal of PI13 is connected to the input terminal of PI14, the output terminal of PI14 is connected to the input terminal of PI15, and the output terminal of PI15 is connected to the input terminal of PI11, so as to form a loop.
C11 is connected to the output terminal of PI11 and the negative power supply VSS, C12 is connected to the output terminal of PI12 and the negative power supply VSS, C13 is connected to the output terminal of PI13 and the negative power supply VSS, C14 is connected to the output terminal of PI14 and the negative power supply VSS, and C15 is connected to the output terminal of PI15 and the negative power supply VSS.
The ground terminals of PI11, PI12, PI13, PI14, and PI15 are also connected to the power supply negative electrode VSS and grounded, respectively.
The power supply terminals of PI11, PI12, PI13, PI14, and PI15 are connected to the drain of PM 13.
It will be appreciated that by adding a capacitor between the output of the inverter and the negative pole of the power supply, the adjustability of the circuit can be improved.
Further, on the basis of the fourth embodiment, in order to avoid the substrate bias effect of NM11 and NM12 transistors and reduce the requirement for the lowest value of the power supply voltage, referring to fig. 4, fig. 4 is a schematic circuit structure diagram of a fifth embodiment of the ring oscillator system of the present invention, which is different from the fourth embodiment,
the current mirror unit comprises five PMOS tubes and three NMOS tubes, and the adjusting unit comprises: a resistance; wherein the content of the first and second substances,
substrates of the five PMOS tubes are respectively connected with source electrodes of the PMOS tubes;
the source electrode of the first PMOS transistor PM21 is connected with the source electrode of the fourth PMOS transistor PM24, the source electrode of the fifth PMOS transistor PM25, one end of the resistor R2 and the positive electrode VDD of the power supply;
the gate of PM21 is connected to the drain of PM21 and the source of PM 22;
the other end of the R2 is connected with the source electrode of a third PMOS tube PM 23;
the gate of the PM24 is connected to the gate of the PM25, the drain of the PM25 and the oscillator module;
the drain electrode of the PM24 is connected with the drain electrode of a third NMOS tube NM 23;
the gate of the PM22 is connected with the gate of the PM23, the drain of the PM22 and the drain of the first NMOS transistor NM 21;
the drain of the PM23 is connected with the gate of the NM21, the drain of the second NMOS transistor NM22, the gate of the NM22 and the gate of the NM 23;
the source of NM21 is connected to the source of NM22, the source of NM23 and the negative VSS of the power supply and to ground.
Further, in this embodiment, the oscillator module includes five inverters: PI21, PI22, PI23, PI24, and PI25, and a capacitor connected between an output terminal of the inverter and a negative electrode of the power supply; wherein the content of the first and second substances,
the output end of the PI21 is connected with the input end of the PI22, the output end of the PI22 is connected with the input end of the PI23, the output end of the PI23 is connected with the input end of the PI24, the output end of the PI24 is connected with the input end of the PI25, and the output end of the PI25 is connected with the input end of the PI21 to form a loop.
C21 is connected to the output terminal of PI21 and the power supply negative electrode VSS, C22 is connected to the output terminal of PI22 and the power supply negative electrode VSS, C23 is connected to the output terminal of PI23 and the power supply negative electrode VSS, C24 is connected to the output terminal of PI24 and the power supply negative electrode VSS, and C25 is connected to the output terminal of PI25 and the power supply negative electrode VSS.
The power supply terminals of PI21, PI22, PI23, PI24, and PI25 are connected to the drain of PM 25.
The ground terminals of PI21, PI22, PI23, PI24, and PI25 are also connected to the power supply negative electrode VSS and grounded, respectively.
Based on the above embodiments, a sixth embodiment of the oscillator system of the present invention is proposed, in which 1 current mirror branch is reduced compared to the fifth embodiment of the present invention by connecting the oscillator loop to the drain of the current mirror NM3 and the power supply VDD. Compared to the fourth embodiment of the present invention, lower supply voltage operation is supported without increasing current consumption. Referring specifically to fig. 5, fig. 5 is a schematic circuit diagram of an oscillator system according to a sixth embodiment of the present invention, wherein,
the current mirror unit includes three PMOS pipe, three NMOS pipe, the adjustment unit includes: a resistance; wherein the content of the first and second substances,
the substrates of the three PMOS tubes are respectively connected with the source electrodes of the PMOS tubes;
the source electrode of the first PMOS pipe PM31 is connected with one end of the resistor R3 and the positive electrode of the power supply;
the gate of the PM31 is connected with the drain of the PM31 and the source of a second PMOS transistor PM 32;
the other end of the R3 is connected with the source electrode of a third PMOS tube PM 32;
the gate of the PM32 is connected with the gate of the PM33, the drain of the PM32 and the drain of the first NMOS transistor NM 31;
the drain of the PM33 is connected with the gate of the NM31, the gate of the second NMOS transistor NM32, the gate of the third NMOS transistor NM33 and the drain of the NM 32;
the drain of NM33 is connected to the input of the oscillator module;
the source of NM31 is connected to the source of NM32, the source of NM33 and the negative VSS of the power supply and to ground.
Further, the oscillator module comprises at least three inverters; wherein, the at least three inverters are connected in series in sequence to form a loop;
the grounding ends of the at least three inverters are connected with the drain of the NM 33;
and the power end of the phase inverter is connected with the positive stage of the power supply.
Still further, the oscillator module further includes a capacitor connected between the output of the inverter and the positive electrode of the power supply; wherein the content of the first and second substances,
one end of the capacitor is connected with the output end of the phase inverter;
the other end of the capacitor is connected with the positive pole of the power supply.
Specifically, in this embodiment, the oscillator module includes five inverters: PI31, PI32, PI33, PI34, and PI35, and a capacitor connected between an output terminal of the inverter and a positive electrode of the power supply; wherein the content of the first and second substances,
the power supply end of the PI31 is connected with the power supply positive electrode VDD, the power supply end of the PI32 is connected with the power supply positive electrode VDD, the power supply end of the PI33 is connected with the power supply positive electrode VDD, the power supply end of the PI34 is connected with the power supply positive electrode VDD, and the power supply end of the PI35 is connected with the power supply positive electrode VDD.
The output end of the PI31 is connected with the input end of the PI32, the output end of the PI32 is connected with the input end of the PI33, the output end of the PI33 is connected with the input end of the PI34, the output end of the PI34 is connected with the input end of the PI35, and the output end of the PI35 is connected with the input end of the PI31 to form a loop.
C31 is connected to the output terminal of PI31 and the positive power supply VDD, C32 is connected to the output terminal of PI32 and the positive power supply VDD, C33 is connected to the output terminal of PI33 and the positive power supply VDD, C34 is connected to the output terminal of PI34 and the positive power supply VDD, and C35 is connected to the output terminal of PI35 and the positive power supply VDD.
The ground terminals of PI31, PI32, PI33, PI34, and PI35 are connected to the drain of NM 33.
It should be noted that, on the basis of the third to sixth embodiments, in the oscillator module circuit, if the oscillator module circuit is a single-ended output premise, the number of the inverters must be an odd number, and if the oscillator module circuit is a differential output premise, the number of the inverters does not have odd or even requirements, and further, any one inverter output end can be used as an output port of the oscillator module to output a clock signal.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A ring oscillator system, comprising:
the current mirror module is connected with the oscillator module and is respectively connected with the anode and the cathode of a power supply; wherein the content of the first and second substances,
the current mirror module is used for providing bias current for the oscillator module;
the oscillator module is used for converting the bias current into a clock signal and outputting the clock signal.
2. The ring oscillator system of claim 1 wherein the current mirror module comprises:
the current mirror unit and the adjusting unit are connected with each other, the current mirror unit is respectively connected with the anode of the power supply and the adjusting unit, and the adjusting unit is connected with the cathode of the power supply; wherein the content of the first and second substances,
the current mirror unit is used for outputting bias current;
and the adjusting unit is used for adjusting the value of the bias current output by the current mirror unit.
3. The ring oscillator system of claim 2 wherein the current mirror unit includes three PMOS transistors, three NMOS transistors, the adjustment unit including: a resistance; wherein the content of the first and second substances,
the source electrode of the first PMOS tube, the source electrode of the second PMOS tube and the source electrode of the third PMOS tube are connected and connected with the positive electrode of the power supply;
the grid electrode of the first PMOS tube, the grid electrode of the second PMOS tube and the grid electrode of the third PMOS tube are connected and respectively connected with the drain electrode of the second PMOS tube and the drain electrode of the second NMOS tube;
the drain electrode of the first PMOS tube is respectively connected with the grid electrode of the first NMOS tube, the grid electrode of the second NMOS tube and the drain electrode of the first NMOS tube;
the drain electrode of the third PMOS tube is connected with the oscillator module;
the source electrode of the first NMOS tube is respectively connected with the drain electrode of a third NMOS tube and the grid electrode of the third NMOS tube;
the source electrode of the second NMOS tube is connected with one end of the resistor;
and the source electrode of the third NMOS tube is respectively connected with the negative electrode of the power supply and the other end of the resistor and is grounded.
4. The ring oscillator system of claim 2 wherein the current mirror unit includes five PMOS transistors, three NMOS transistors, and the adjustment unit includes: a resistance; wherein the content of the first and second substances,
substrates of the five PMOS tubes are respectively connected with source electrodes of the PMOS tubes;
the source electrode of the first PMOS tube is connected with the source electrode of the fourth PMOS tube, the source electrode of the fifth PMOS tube, one end of the resistor and the positive electrode of the power supply;
the grid electrode of the first PMOS tube is connected with the drain electrode of the first PMOS tube and the source electrode of the second PMOS tube;
the other end of the resistor is connected with a source electrode of a third PMOS tube;
the grid electrode of the fourth PMOS tube is connected with the grid electrode of the fifth PMOS tube, the drain electrode of the fifth PMOS tube and the oscillator module;
the drain electrode of the fourth PMOS tube is connected with the drain electrode of the third NMOS tube;
the grid electrode of the second PMOS tube is connected with the grid electrode of the third PMOS tube, the drain electrode of the second PMOS tube and the drain electrode of the first NMOS tube;
the drain electrode of the third PMOS tube is connected with the grid electrode of the first NMOS tube, the drain electrode of the second NMOS tube, the grid electrode of the second NMOS tube and the grid electrode of the third NMOS tube;
and the source electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube, the source electrode of the third NMOS tube and the negative electrode of the power supply and is grounded.
5. The ring oscillator system of claim 3 or 4 wherein the oscillator module comprises at least three inverters; wherein the content of the first and second substances,
the at least three inverters are sequentially connected in series to form a loop;
the power supply ends of the at least three inverters are connected with the output end of the current mirror module;
and the grounding end of the phase inverter is connected with the negative pole of the power supply and grounded.
6. The ring oscillator system of claim 5 wherein the oscillator module further comprises a capacitor connected between the output of the inverter and the negative pole of the power supply; wherein the content of the first and second substances,
one end of the capacitor is connected with the output end of the phase inverter;
the other end of the capacitor is connected with the negative electrode of the power supply and grounded.
7. The ring oscillator system of claim 2 wherein the current mirror unit includes three PMOS transistors, three NMOS transistors, the adjustment unit including: a resistance; wherein the content of the first and second substances,
the substrates of the three PMOS tubes are respectively connected with the source electrodes of the PMOS tubes;
the source electrode of the first PMOS tube is connected with one end of the resistor and the positive electrode of the power supply;
the grid electrode of the first PMOS tube is connected with the drain electrode of the first PMOS tube and the source electrode of the second PMOS tube;
the other end of the resistor is connected with a source electrode of a third PMOS tube;
the grid electrode of the second PMOS tube is connected with the grid electrode of the third PMOS tube, the drain electrode of the second PMOS tube and the drain electrode of the first NMOS tube;
the drain electrode of the third PMOS tube is connected with the grid electrode of the first NMOS tube, the grid electrode of the second NMOS tube, the grid electrode of the third NMOS tube and the drain electrode of the second NMOS tube;
the drain electrode of the third NMOS tube is connected with the input end of the oscillator module;
and the source electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube, the source electrode of the third NMOS tube and the negative electrode of the power supply and is grounded.
8. The ring oscillator system of claim 7 wherein the oscillator module includes at least three inverters; wherein the content of the first and second substances,
the at least three inverters are sequentially connected in series to form a loop;
the grounding ends of the at least three phase inverters are connected with the drain electrode of the third NMOS tube;
and the power end of the phase inverter is connected with the positive stage of the power supply.
9. The ring oscillator system of claim 8 wherein the oscillator module further comprises a capacitor connected between the input of the inverter and the positive pole of the power supply; wherein the content of the first and second substances,
one end of the capacitor is connected with the input end of the phase inverter;
the other end of the capacitor is connected with the positive pole of the power supply.
10. A ring oscillator system according to claim 1, wherein the system includes a voltage regulator module connected in parallel with the oscillator module; wherein the content of the first and second substances,
the voltage stabilizing module comprises a capacitor;
the voltage stabilizing module is used for: reducing the oscillator module output clock jitter.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115021726A (en) * | 2022-05-10 | 2022-09-06 | 上海韬润半导体有限公司 | Clock buffer circuit and analog-to-digital converter |
| CN117200700A (en) * | 2023-09-18 | 2023-12-08 | 上海帝迪集成电路设计有限公司 | Low-cost high-precision ring oscillator circuit and control method thereof |
-
2021
- 2021-12-02 CN CN202111472447.5A patent/CN114337609A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115021726A (en) * | 2022-05-10 | 2022-09-06 | 上海韬润半导体有限公司 | Clock buffer circuit and analog-to-digital converter |
| CN115021726B (en) * | 2022-05-10 | 2023-02-17 | 上海韬润半导体有限公司 | Clock buffer circuit and analog-to-digital converter |
| CN117200700A (en) * | 2023-09-18 | 2023-12-08 | 上海帝迪集成电路设计有限公司 | Low-cost high-precision ring oscillator circuit and control method thereof |
| CN117200700B (en) * | 2023-09-18 | 2024-03-08 | 上海帝迪集成电路设计有限公司 | Low-cost high-precision ring oscillator circuit and control method thereof |
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