CN109496021A - A kind of LED light control of zero quiescent current and key-press input time-sharing multiplex circuit - Google Patents
A kind of LED light control of zero quiescent current and key-press input time-sharing multiplex circuit Download PDFInfo
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- CN109496021A CN109496021A CN201910019850.9A CN201910019850A CN109496021A CN 109496021 A CN109496021 A CN 109496021A CN 201910019850 A CN201910019850 A CN 201910019850A CN 109496021 A CN109496021 A CN 109496021A
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- 230000002093 peripheral effect Effects 0.000 claims abstract description 7
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- 239000003990 capacitor Substances 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 8
- 230000005611 electricity Effects 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 5
- 230000007257 malfunction Effects 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
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- 108010076504 Protein Sorting Signals Proteins 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- 230000003111 delayed effect Effects 0.000 description 1
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- 238000007493 shaping process Methods 0.000 description 1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
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Abstract
A kind of LED light control of zero quiescent current and key-press input time-sharing multiplex circuit, including the first transmission gate (TG1), the second transmission gate (TG2), first phase inverter (INV1), first PMOS tube (P1), first resistor (R1), second resistance (R2), keystroke handling circuit and peripheral applications device;The control terminal of first transmission gate (TG1) connects the output end of the first phase inverter (INV1), the grid of the input terminal connection the first PMOS tube (P1) of first phase inverter (INV1) after being connected with the C opposite ends of the second transmission gate (TG2).This patent leans on logical device to realize that LED light control and key-press input detect time-sharing multiplex function completely, regardless of not consuming quiescent current, also not increasing chip area in standby mode or normal operating conditions, system power dissipation is effectively reduced, chip cost is saved;This patent does not have particular device, completely mutually compatible with CMOS technology, for low-power consumption and battery powered electronic equipment, advantageously than traditional scheme.
Description
Technical field
The present invention relates to time-sharing multiplex circuits, and the LED light control for especially providing a kind of zero quiescent current divides with key-press input
When multiplex circuit.
Background technique
In integrated circuit design, it often will appear and realize time-sharing multiplex function using a terminal, it is most common to LED
Lighting control and the time-sharing multiplex circuit of key-press input detection are more using device as shown in Figure 1, circuit structure is complicated, and one
Major defect is that tube chip is not in running order or standby mode, and comparator can all consume certain quiescent current, low
The disadvantage is just more prominent in power consumption or battery powered system.
Summary of the invention
To solve the above-mentioned problems, the object of the present invention is to provide one kind to have the advantages of simple structure and easy realization, and at low cost zero is quiet
The LED control of state electric current and key-press input time-sharing multiplex circuit.
In order to achieve the above objectives, technical scheme is as follows: the LED light control of zero quiescent current of one kind and key are defeated
Enter time-sharing multiplex circuit, including the first transmission gate (TG1), the second transmission gate (TG2), the first phase inverter (INV1), the first PMOS
It manages (P1), first resistor (R1), second resistance (R2), keystroke handling circuit and peripheral applications device;The peripheral applications device
Including LED light and key (K1);First transmission gate (TG1) connects core after being connected with the input terminal of the second transmission gate (TG2)
Piece pin (KEY_PIN), junction is grounded by LED light, while junction is also sequentially connected in series first resistor (R1), key (K1)
After be grounded;The control terminal of first transmission gate (TG1) connects the first reverse phase after being connected with the C opposite ends of the second transmission gate (TG2)
The output end of device (INV1), the grid of the input terminal connection the first PMOS tube (P1) of first phase inverter (INV1);Described
The C opposite ends of one transmission gate (TG1) and the control terminal of the second transmission gate (TG2), which are connected, to be followed by the first phase inverter (INV1) and first
Between PMOS tube (P1);Output end connection second resistance (R2) of first transmission gate (TG1) connects the first PMOS tube afterwards
(P1) drain electrode;The source electrode of first PMOS tube (P1) meets power input (VIN), and substrate is connected with source electrode;Described second passes
Output signal after the output end connection keystroke handling circuit of defeated door (TG2).
Further, the keystroke handling circuit is by 3rd resistor (R3), the 4th resistance (R4), schmitt inverter
(Schmitt), the second phase inverter (INV2), third phase inverter (INV3), NAND gate (NAND1) and delay noise elimination module composition;
Described 3rd resistor one end (R3) connects power input (VIN), and the other end is connected to IN signal and the 4th junction resistance (R4);
Shown 4th resistance (R4) other end is sequentially connected schmitt inverter (Schmitt), third phase inverter (INV3), the second reverse phase
Device (INV2);The output end of second phase inverter (INV2) is directly connected to an input terminal of NAND gate (NAND1), leads to simultaneously
Cross another input terminal of delay noise elimination module connection NAND gate (NAND1);The delay noise elimination module output end connects key
Output signal (KEY_OUT).
Further, the delay noise elimination module is by the second PMOS tube (P2), the first NMOS tube (N1), the second NMOS tube
(N2), capacitor (C0) and phase inverter (INV0) composition;Second PMOS tube (P2), the first NMOS tube (N1) and the second NMOS tube
(N2) grid, which connects together, connects IN signal;The source electrode of second PMOS tube (P2) is connected with substrate, drain electrode and the first NMOS
The drain electrode of pipe (N1), which is connected, is followed by the input terminal of phase inverter (INV0);The source electrode of first NMOS tube (N1) connects the 2nd NMOS
Manage the drain electrode of (N2);Described capacitor (C0) one end connects the input terminal of phase inverter (INV0), the other end and the second NMOS tube (N2)
Source electrode is grounded after being connected, the substrate of the substrate of the first NMOS tube (N1) connection the second NMOS tube (N2) be followed by capacitor (C0) and
Between ground wire.
The beneficial effects of the present invention are: this patent leans on logical device to realize LED light control and key-press input detection point completely
Shi Fuyong function, regardless of not consuming quiescent current, also not increasing chip face in standby mode or normal operating conditions
Product, effectively reduces system power dissipation, saves chip cost;This patent does not have particular device, completely mutually compatible with CMOS technology,
For low-power consumption and battery powered electronic equipment, advantageously than traditional scheme.
Detailed description of the invention
Fig. 1 is traditional LED control and key-press input time-sharing multiplex circuit diagram;Fig. 2 is circuit diagram of the present invention;Fig. 3 is this
Invention keystroke handling circuit structure diagram;Fig. 4 is present invention delay noise elimination module circuit diagram;Fig. 5 is present invention control signal sequence
Figure.
Specific embodiment
It describes the specific embodiments of the present invention in detail with reference to the accompanying drawing.
As shown in Fig. 2, being below illustrated its working principle: the LED light control of zero quiescent current of one kind and key are defeated
Entering time-sharing multiplex circuit includes the first transmission gate (TG1), the second transmission gate (TG2), the first phase inverter (INV1), the first PMOS tube
(P1), first resistor (R1), second resistance (R2), keystroke handling circuit and peripheral applications device;Second resistance (R2) is current limliting
Resistance prevents LED light from super-high-current occur.Wherein LED light, key (K1) are peripheral applications devices.KEY_PIN is that chip draws
Foot, for connecting LED light and key (K1), KEY_OUT, which is represented, presses key output signal, and detecting in key allowed in the time, if not
Effective actuation of keys, then KEY_OUT exports high level, if effective actuation of keys, KEY_OUT exports low level.CTR is
Time-sharing multiplex controls signal, and when CTR is low level, CTR_b is high level, control the first PMOS tube (P1) conducting, the first transmission
Door (TG1) conducting, the second transmission gate (TG2) cut-off allows to realize LED light and controls, in CTR between low period, due to the
Two transmission gates (TG2) cut-off, key-press input will not have an impact to by key output signal KEY_OUT, and KEY_OUT is defeated during this period
It is permanent high out.When CTR is high level, CTR_b is low level, and control the first PMOS tube (P1) cut-off, the first transmission gate (TG1) is cut
Only, the second transmission gate (TG2) is connected, and allows key-press input.In CTR between high period, since the first transmission gate (TG1) is cut
Only, LED light is in the state not worked, interior during this period, if effective actuation of keys occurs, by the second transmission gate (TG2), then passes through
It crosses after keystroke handling processing of circuit and exports low level by key output signal KEY_OUT, representative has by key pressing.Fig. 5 is that timesharing is multiple
With the timing diagram of control signal (CTR), allow to control LED light between T1 low period, it is interior regardless of key during this period
Whether, it is high level by key output signal KEY_OUT perseverance;Allow to detect key-press input between T2 high period, if hair
Raw effective actuation of keys then exports low level by key output signal KEY_OUT, and representative has by key pressing, if there is no effective
Actuation of keys then presses key output signal KEY_OUT and exports high level, represents without pressing key pressing, and interior LED light is in during this period
The state not worked.
As shown in figure 3, being illustrated to the working principle of keystroke handling circuit: the module is by 3rd resistor (R3), the 4th
Resistance (R4), schmitt inverter (Schmitt), the second phase inverter (INV2), third phase inverter (INV3), NAND gate
(NAND1) it is formed with delay noise elimination module.Wherein 3rd resistor (R3) is pull-up resistor, whether guarantee the key during T1
It is high level by key output signal KEY_OUT perseverance when with there is no actuation of keys during T2.If it is dynamic that effective key occurs for outside
Make, 3rd resistor (R3), first resistor (R1) form access by key (K1) and ground, form resitstance voltage divider, first resistor
(R1) and the node voltage of 3rd resistor (R3) is flipped schmitt inverter (Schmitt), by key output signal KEY_
OUT becomes low.In circuit design first resistor (R1), 3rd resistor (R3) composition divider resistance, first resistor (R1) and
The voltage of 3rd resistor (R3) node should guarantee that schmitt inverter (Schmitt) is normally overturn, again leading less than LED light
Be powered pressure, guarantees that LED light does not work during allowing key.First resistor (R1), 3rd resistor (R3) want sufficiently large, have prevented
There is high current in first resistor (R1), 3rd resistor (R3) and key (K1) access when actuation of keys.4th resistance (R4) is quiet
Electric (ESD) protects device, prevents static damage chip when human body or machine touching KEY_PIN.Schmitt inverter
(Schmitt) it is used to detect whether that actuation of keys occurs.First phase inverter (INV1) and the second phase inverter (INV2) are used for shaping
It is driven with increasing.Delay noise elimination module circuit (Fig. 4) is used to eliminate the malfunction of key (K1) generation, and delay time can basis
It needs to be adjusted.
As shown in figure 4, delay noise elimination module by the second PMOS tube (P2), the first NMOS tube (N1), the second NMOS tube (N2),
Capacitor (C0) and phase inverter (INV0) composition.The breadth length ratio of second PMOS tube (P2) is larger, the first NMOS tube (N1), the 2nd NMOS
The breadth length ratio for managing (N2) is smaller, and when the module input is high level, capacitor (C0) passes through the first NMOS tube (N1), second
NMOS tube (N2) electric discharge, since the breadth length ratio of the first NMOS tube (N1), the second NMOS tube (N2) is smaller, the velocity of discharge is slow,
If key (K1) end due to malfunction be pressed, if malfunction the duration it is shorter, less than delay noise elimination module delay when
Between, the constant state of KEY_OUT is still high level, to play the role of the de-noising that is delayed.The output KEY_ of NAND gate (NAND1)
OUT represents key-case, and key (K1) is represented when KEY_OUT is high level and is not pressed, when KEY_OUT is low level
Key (K1) is represented to press.
Below as its working principle of time-sharing multiplex control two kinds of signal CTR low and high level briefing.
The first situation, during time-sharing multiplex signal CTR is low level T1 (Fig. 5), CTR_b is high level, control first
PMOS tube (P1) conducting, the first transmission gate (TG1) conducting, the second transmission gate (TG2) cut-off allow to control LED light realization,
CTR is between low period, and since the second transmission gate (TG2) ends, key-press input will not generate shadow to key output KEY_OUT
It rings, KEY_OUT output is permanent high during this period.LED light is lighted or is extinguished, institute according to the low and high level situation of control signal CTR
The frequency for stating time-sharing multiplex control signal CTR will be higher than human eye sensitivity's frequency, keep human eye imperceptible much higher than 24Hz
LED glittering situation.It should be noted that during T1, if there is actuation of keys, first resistor (R1), second resistance (R2)
Divider resistance is formed, to guarantee that the partial pressure at first resistor (R1) and second resistance (R2) node is less than the conducting of LED light at this time
Voltage prevents LED light from the bright light instruction of mistake occur.
Second situation, (Fig. 5): CTR_b is low level during time-sharing multiplex signal CTR is high level T2, control first
PMOS tube (P1) cut-off, the first transmission gate (TG1) cut-off, the second transmission gate (TG2) conducting allow key-press input.It is height in CTR
During level, since the first transmission gate (TG1) ends, LED light is in the state extinguished, interior during this period, if occurring effective
Actuation of keys is exported by the second transmission gate (TG2) using key output signal KEY_OUT is pressed after keystroke handling processing of circuit
Low level, representative have by key pressing.It should be noted that for first resistor (R1), 3rd resistor (R3) (keystroke handling circuit
In resistance) value, first resistor (R1), 3rd resistor (R3) want sufficiently large, first resistor (R1), third electricity when preventing key
There is high current in resistance (R3) and key (K1) access, point that first resistor (R1), 3rd resistor (R3) form in circuit design
The voltage of piezoresistance, first resistor (R1) and 3rd resistor (R3) node should guarantee that schmitt inverter (Schmitt) is normal
Overturning is less than the conducting voltage of LED light again, guarantees that LED light is in OFF state during allowing key.For time-sharing multiplex
The frequency for controlling signal CTR will be much higher than 24Hz, that is, be higher than human eye sensitivity's frequency, keep the imperceptible LED light of human eye glittering
Situation.
It is to be illustrated to preferable implementation of the invention, but the invention is not limited to the implementation above
Example, those skilled in the art can also make various equivalent variations on the premise of without prejudice to spirit of the invention or replace
It changes, these equivalent deformations or replacement are all included in the scope defined by the claims of the present application.
Claims (3)
1. a kind of LED light control of zero quiescent current and key-press input time-sharing multiplex circuit, it is characterised in that: including the first transmission
Door (TG1), the second transmission gate (TG2), the first phase inverter (INV1), the first PMOS tube (P1), first resistor (R1), second resistance
(R2), keystroke handling circuit and peripheral applications device;The peripheral applications device includes LED light and key (K1);Described first
Transmission gate (TG1) connects chip pin (KEY_PIN) after being connected with the input terminal of the second transmission gate (TG2), and junction passes through LED
Lamp ground connection, while junction is also sequentially connected in series first resistor (R1), key (K1) is grounded afterwards;First transmission gate (TG1)
Control terminal connects the output end of the first phase inverter (INV1), first reverse phase after being connected with the C opposite ends of the second transmission gate (TG2)
The grid of the input terminal connection the first PMOS tube (P1) of device (INV1);The C opposite ends of first transmission gate (TG1) and the second transmission
The control terminal of door (TG2), which is connected, to be followed by between the first phase inverter (INV1) and the first PMOS tube (P1);First transmission gate
(TG1) output end connection second resistance (R2) connects the drain electrode of the first PMOS tube (P1) afterwards;First PMOS tube (P1)
Source electrode meets power input (VIN), and substrate is connected with source electrode;The output end connection keystroke handling electricity of second transmission gate (TG2)
Output signal behind road.
2. a kind of LED light control of zero quiescent current according to claim 1 and key-press input time-sharing multiplex circuit, special
Sign is: the keystroke handling circuit is by 3rd resistor (R3), the 4th resistance (R4), schmitt inverter (Schmitt), second
Phase inverter (INV2), third phase inverter (INV3), NAND gate (NAND1) and delay noise elimination module composition;The 3rd resistor
(R3) one end connection power input (VIN), the other end are connected to IN signal and the 4th junction resistance (R4);Shown 4th resistance
(R4) other end is sequentially connected schmitt inverter (Schmitt), third phase inverter (INV3), the second phase inverter (INV2);Institute
The output end for stating the second phase inverter (INV2) is directly connected to an input terminal of NAND gate (NAND1), while passing through delay de-noising
Module connects another input terminal of NAND gate (NAND1);Key output signal is pressed in the delay noise elimination module output end connection
(KEY_OUT).
3. a kind of LED light control of zero quiescent current according to claim 2 and key-press input time-sharing multiplex circuit, special
Sign is: the delay noise elimination module is by the second PMOS tube (P2), the first NMOS tube (N1), the second NMOS tube (N2), capacitor
(C0) it is formed with phase inverter (INV0);Second PMOS tube (P2), the first NMOS tube (N1) and the second NMOS tube (N2) grid
Pole, which connects together, connects IN signal;The source electrode of second PMOS tube (P2) is connected with substrate, drain electrode and the first NMOS tube (N1)
Drain electrode, which is connected, is followed by the input terminal of phase inverter (INV0);The source electrode connection the second NMOS tube (N2) of first NMOS tube (N1)
Drain electrode;Described capacitor (C0) one end connects the input terminal of phase inverter (INV0), and the source electrode of the other end and the second NMOS tube (N2) is connected
After be grounded, the substrate of the substrate of the first NMOS tube (N1) connection the second NMOS tube (N2) be followed by capacitor (C0) and ground wire it
Between.
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CN201910019850.9A CN109496021A (en) | 2019-01-09 | 2019-01-09 | A kind of LED light control of zero quiescent current and key-press input time-sharing multiplex circuit |
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CN201910019850.9A CN109496021A (en) | 2019-01-09 | 2019-01-09 | A kind of LED light control of zero quiescent current and key-press input time-sharing multiplex circuit |
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CN204425312U (en) * | 2014-11-19 | 2015-06-24 | 萨康电子(上海)有限公司 | A kind of input and output time-sharing multiplex circuit |
CN107682951A (en) * | 2016-12-26 | 2018-02-09 | 深圳市华芯邦科技有限公司 | LED controls and key-press input time-sharing multiplex circuit and its control method |
CN207135318U (en) * | 2017-07-16 | 2018-03-23 | 杭州展虹科技有限公司 | One kind utilizes oscillator drives LED circuit |
CN209710388U (en) * | 2019-01-09 | 2019-11-29 | 厦门安斯通微电子技术有限公司 | A kind of LED light control of zero quiescent current and key-press input time-sharing multiplex circuit |
-
2019
- 2019-01-09 CN CN201910019850.9A patent/CN109496021A/en active Pending
Patent Citations (6)
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KR19980033767A (en) * | 1996-11-01 | 1998-08-05 | 문정환 | Power-On Reset Signal Output Circuit |
CN102291110A (en) * | 2011-06-21 | 2011-12-21 | 东南大学 | Power-on-reset circuit with zero steady state current consumption and stable pull-up voltage |
CN204425312U (en) * | 2014-11-19 | 2015-06-24 | 萨康电子(上海)有限公司 | A kind of input and output time-sharing multiplex circuit |
CN107682951A (en) * | 2016-12-26 | 2018-02-09 | 深圳市华芯邦科技有限公司 | LED controls and key-press input time-sharing multiplex circuit and its control method |
CN207135318U (en) * | 2017-07-16 | 2018-03-23 | 杭州展虹科技有限公司 | One kind utilizes oscillator drives LED circuit |
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Title |
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